Dong-Muk CHOI Che-Young KIM Kwang-Hee KWON
This letter presents a Monte-Carlo FDTD technique to determine the scattered field from a perfectly conducting fractal surface from which the useful information on the incoherent pattern tendency could be observed. A one-dimensional fractal surface was generated by the bandlimited Weierstrass function. In order to verify the numerical results by this technique, these results are compared with those of Kirchhoff approximations, which show a good match between them. To investigate the incoherent pattern tendency involved, the dependence of the fitting curve slope on the different D and is discussed for the bistatic and back scattering case, respectively.
Peilin LIU Li JIANG Hiroshi NAKAYAMA Toshiyuki YOSHITAKE Hiroshi KOMAZAKI Yasuhiro WATANABE Hisakatsu ARAKI Kiyonori MORIOKA Shinhaeng LEE Hajime KUBOSAWA Yukio OTOBE
We have developed a low-power, high-performance MPEG-4 codec LSI for mobile video applications. This codec LSI is capable of up to CIF 30-fps encoding, making it suitable for various visual applications. The measured power consumption of the codec core was 9 mW for QCIF 15-fps codec operation and 38 mW for CIF 30-fps encoding. To provide an error-robust MPEG-4 codec, we implemented an error-resilience function in the LSI. We describe the techniques that have enabled low power consumption and high performance and discuss our test results.
Masayuki MIYAMA Osamu TOOYAMA Naoki TAKAMATSU Tsuyoshi KODAKE Kazuo NAKAMURA Ai KATO Junichi MIYAKOSHI Kousuke IMAMURA Hideo HASHIMOTO Satoshi KOMATSU Mikio YAGI Masao MORIMOTO Kazuo TAKI Masahiko YOSHIMOTO
This paper describes an ultra low power, motion estimation (ME) processor for MPEG2 HDTV resolution video. It adopts a Gradient Descent Search (GDS) algorithm that drastically reduces required computational power to 6 GOPS. A SIMD datapath architecture optimized for the GDS algorithm decreases the clock frequency and operating voltage. A low power 3-port SRAM with a write-disturb-free cell array arrangement is newly designed for image data caches of the processor. The proposed ME processor contains 7-M transistors, integrated in 4.50 mm 3.35 mm area using 0.13 µm CMOS technology. Estimated power consumption is less than 100 mW at 81 MHz@1.0 V. The processor is applicable to a portable HDTV system.
In this paper, two low power hardware structures essential for MPEG-4 video codec are proposed for portable applications. First, an adaptive bit resolution control (ABRC) scheme is proposed for a processing element (PE) in a systolic-array type motion estimator (ME). By appropriately modifying the datapath of PE to exploit the correlations in pixel values, its structure is optimized in terms of both hardware cost and low power consumption. As a result, power is saved up to 29% compared with a conventional PE while the computation accuracy is preserved and the overhead is kept negligible. Second, a low power motion compensation (MC) accelerator is proposed. By embedding DRAM whose structure is optimized for low power consumption, the power consumption for external data I/Os is dramatically reduced. In addition, distributed nine-tiled block mapping (DNTBM) with partial activation scheme in the frame buffer reduces the power for accessing frame buffer up to 31% compared to a conventional 1-bank tiled mapping. With the proposed MC accelerator, MPEG-4 SP@L1 decoding system is fabricated using 0.18 µm embedded memory logic (EML) technology.
Tadayoshi ENOMOTO Akira KOTABE
A fast-motion-estimation (ME) algorithm called a "breaking-off-search (BOS)" was developed. It can improve processing speed of the full-search (FS) method by a factor of 3.4. The BOS algorithm can not only sometimes achieve better visual quality than FS, but can also solve visual degradation problems associated with conventional fast-ME algorithms whenever picture patterns change (i. e. , presence of scene changes). The power dissipation of a 0.6-µ m CMOS parallel Wallace-tree motion estimator using BOS was reduced to about 281 mW which was 1/28.7 that of the 0.6-µ m CMOS binary-tree motion estimator using FS.
Salvatore M. CARTA Luigi RAFFO
A reconfigurable coprocessor for ETSI-GSM voice coding application domain is presented, synthesized and tested. An average overall reduction of more than 55% cycles with respect to standard RISC processors with DSP features is obtained. Such improvement together with locality and temporal correlation allows a reduction of power consumption, while standard interfacing technique ensures maximum flexibility.
Wataru TAMAMURA Koji NAKAMAE Hiromu FUJIOKA
An automatic LSI package lead inspection system for backside lead specification is proposed. The proposed system inspects not only lead backside contamination but also the mechanical lead specification such as lead pitch, lead offset and lead overhangs (variations in lead lengths). The total inspection time of a UQFP package with a lead count of 256 is less than the required time of 1 second. Our proposed method is superior to the threshold method used usually, especially for the defect between leads.
In this paper, we propose two channel allocation schemes for supporting voice and multimedia traffic in hierarchical cellular systems. They are guaranteed to satisfy the required quality of service for multimedia traffic in accordance with their characteristics such as a mobile velocity for voice calls and a delay tolerance for multimedia calls. In the first, only slow-speed voice calls are allowed to overflow from macrocell to microcell and only adaptive multimedia calls can overflow from microcell to macrocell after reducing their bandwidth to the minimum channel bandwidth. In the second, in addition to the first scheme, non-adaptive multimedia calls can occupy the required channel bandwidth through reducing the channel bandwidth of adaptive multimedia calls. The proposed schemes are analyzed using the 2-dimensional Markov model. Through computer simulations, it is shown that the proposed schemes yield a significant improvement in terms of the forced termination probability of handoff calls. In particular, the second decreases the blocking probability of new calls as well as the forced termination probability of handoff calls.
Naoki KANAYAMA Koh-ichi NAGAO Shigenori UCHIYAMA
This paper proposes an improvement of Elkies' point counting algorithm for the Jacobian of a genus 2 hyperelliptic curve defined over a finite field in a practical sense and introduces experimental results. Our experimental results show that we can generate a cryptographic secure genus 2 hyperelliptic curve, where the order of its Jacobian is a 160-bit prime number in about 8.1 minutes on average, on a 700 MHz PentiumIII level PC. We improve Elkies' algorithm by proposing some complementary techniques for speeding up the baby-step giant-step.
Choon-Woo KWON Il HAN Dong-Ho CHO
Intelligent paging uses the sequential paging technique with additional user information in order to reduce the paging delay cost and the paging load cost. Our proposed paging scheme uses distribution density information of users as required additional user information. This letter addresses an optimal paging sequence and introduces formulas to calculate the paging costs. These formulas are necessary to evaluate the performance of location management. The paging delay cost and the paging load cost for the proposed paging scheme and two other paging schemes are calculated and numerical analyses for these paging schemes are performed. Results show how the paging delay cost and the paging load cost vary as either the paging request arrival rates or the number of cells in an LA increases. The proposed paging scheme is more efficient in view of both the paging delay cost and the paging load cost.
This paper proposes a hybrid on-demand content delivery scheme employing modified pyramid broadcasting. Our scheme delivers a fixed-sized head portion of the video content to each client individually via an individual channel and the remaining portion via multiple broadcasting channels by using a modified form of pyramid broadcasting. The feature of this scheme is that it can be used together with forward error correction using block coding. Therefore, it can deliver high-quality content upon request with high network bandwidth efficiency even if data containers, such as Ethernet frames, are lost in the IP network. This is not possible with conventional schemes. Evaluation results show that its network bandwidth performance is still excellent even though it supports well-known FEC schemes using block coding.
A new pilot-aided channel estimation technique is proposed and applied to wideband CDMA (WCDMA) systems. This technique is based on conventional pilot-aided decision directed (PADD) algorithms. In this letter, conventional PADD algorithms are studied extensively and a modified PADD algorithm is presented. The performance of the proposed algorithm is compared with that of conventional PADD algorithms through computer simulations in Rayleigh fading environments.
Tomoharu SHIBUYA Kohichi SAKANIWA
A parity check matrix for a binary linear code defines a bipartite graph (Tanner graph) which is isomorphic to a subgraph of a factor graph which explains a mechanism of the iterative decoding based on the sum-product algorithm. It is known that this decoding algorithm well approximates MAP decoding, but degradation of the approximation becomes serious when there exist cycles of short length, especially length 4, in Tanner graph. In this paper, based on the generating idempotents, we propose some methods to design parity check matrices for cyclic codes which define Tanner graphs with no cycles of length 4. We also show numerically error performance of cyclic codes by the iterative decoding implemented on factor graphs derived from the proposed parity check matrices.
Yasuki NAKAMURA Hiroshi OKANO Atsuhiro SUGA Hiromasa TAKAHASHI
A 12.8GOPS/2.1GFLOPS that operates at 533 MHz, and which is equipped with an 8-way embedded VLIW processor fabricated with 6-layer Cu and 1-layer Al metal 0.11 µm CMOS process technology is introduced in this paper. The processor is also equipped with a 4-way integer pipeline, a 4-way floating/media pipeline, and separate 32 KB 4-way set associative instruction and data caches. It is also equipped with instruction fetch prediction, and non-aligned dual data load/store mechanisms. The performance evaluation that was successfully conducted using the MPEG2 IDCT routine and JPEG decoding program shows that it offers twice the performance of the previous work . 10.4 M transistors are integrated on a 7.8 mm 7.8 mm die. The chip consumes 2.5 W at 533 MHz.
This paper presents a BER performance derivation considering imperfect channel estimation for a pilot-aided coherent forward link of W-CDMA system under multipath Rayleigh fading channels. In the forward link of the W-CDMA system, pilot signal is usually used for coherent demodulation. In this paper, the maximum likelihood estimator, Wiener filter, and moving average filter are applied to estimate the channel effect due to mobile speed and frequency offset. Then, we concentrate on determining optimal parameter values of the estimators such as the observation length, delay parameters for causal/non-causal filter, and filter resolution. Also it is verified that these parameters are closely associated with the performance, hardware complexity, and characteristics of OVSF code. In particular, effect of data rate and filter resolution on the BER performance is analyzed in more detail. In addition, we show the performance comparison between the estimators considering various imperfections. Finally, we verify the derived BER by using an extensive Monte-Carlo computer simulation.
Hidefumi KUROKAWA Hiroyuki IKEGAMI Motohide OTSUBO Kiyoshi ASAO Kazuhisa KIRIGAYA Katsuya MISU Satoshi TAKAHASHI Tetsuji KAWATSU Kouji NITTA Hiroshi RYU Kazutoshi WAKABAYASHI Minoru TOMOBE Wataru TAKAHASHI Akira MUKOUYAMA Takashi TAKENAKA
This paper describes the effects of system LSI design with C language-based behavioral synthesis following several trials of design period reduction and quality improvement for a variety of circuit types. The results of these trials are analyzed from the viewpoints of description productivity, verification productivity, reusability and design flexibility as well as hardware and software co-verification. First the C-based design flow proposed by the authors is described, and the design productivity and verification productivity under this design flow is compared to RTL design. The reusability of the behavioral IP core and its efficiency with HW/SW co-verification are also shown using design examples. Next, using the example of an MPEG-4 video decoder design, a typical design process in a C-based design is shown with considerations regarding verification efficiency, reusability of the IP core and HW/SW co-verification. Finally, the authors' perspectives regarding future directions of system LSI design are discussed.
Since the beginning of the last two decades, many researchers have been involved in the problem of Blind Source Separation (BSS). Whilst hundreds of algorithms have been proposed to solve BSS. These algorithms are well known as Independent Component Analysis (ICA) algorithms. Nowadays, ICA algorithms have been used to deal with various applications and they are using many performance indices. This paper is dedicated to classify the different algorithms according to their applications and performances.
Takatoshi JITSUHIRO Hirofumi YAMAMOTO Setsuo YAMADA Genichiro KIKUI Yoshinori SAGISAKA
We propose new language models to represent phrasal structures by patterns extracted from parse trees. First, modified word trigram models are proposed. They are extracted from sentences analyzed by the preprocessing of the parser with knowledge. Since sentences are analyzed to create sub-trees of a few words, these trigram models can represent relations among a few neighbor words more strongly than conventional word trigram models. Second, word pattern models are used on these modified word trigram models. The word patterns are extracted from parse trees and can represent phrasal structures and much longer word-dependency than trigram models. Experimental results show that modified trigram models are more effective than traditional trigram models and that pattern models attain slight improvements over modified trigram models. Furthermore, additional experiments show that pattern models are more effective for long sentences.
In this paper, we investigate the electron-hole energy states and energy gap in three-dimensional (3D) InAs/GaAs quantum rings and dots with different shapes under external magnetic fields. Our realistic model formulation includes: (i) the effective mass Hamiltonian in non-parabolic approximation for electrons, (ii) the effective mass Hamiltonian in parabolic approximation for holes, (iii) the position- and energy-dependent quasi-particle effective mass approximation for electrons, (iv) the finite hard wall confinement potential, and (v) the Ben Daniel-Duke boundary conditions. To solve the 3D nonlinear problem without any fitting parameters, we have applied the nonlinear iterative method to obtain self-consistent solutions. Due to the penetration of applied magnetic fields into torus ring region, for ellipsoidal- and rectangular-shaped quantum rings we find nonperiodical oscillations of the energy gap between the lowest electron and hole states as a function of external magnetic fields. The nonperiodical oscillation is different from 1D periodical argument and strongly dependent on structure shape and size. The result is useful to study magneto-optical properties of the nanoscale quantum rings and dots.
Tomoko OHSUGA Yasuo HORIUCHI Akira ICHIKAWA
In this study, we introduce a method for estimating the syntactic structure of Japanese speech from F0 contour and pause duration. We defined a prosodic unit (PU) which is divided by the local minimal point of an F0 contour or pause. Combining PUs repeatedly (a pair of PUs is combined into one PU), a tree structure is gradually generated. Which pair of PUs in a sequence of three PUs should be combined is decided by a discriminant function based on the discriminant analysis of a corpus of speech data. We applied the method to the ATR Phonetically Balanced Sentences read by four Japanese speakers. We found that with this method, the correct rate of judgement for each sequence of three PUs is 79% and the estimation accuracy of the entire syntactic structure for each sentence is 26%. We consider this result to demonstrate a good degree of accuracy for the difficult task of estimating syntactic structure only from prosody.