A maximal-ratio-combining (MRC) digital beamformer has been studied to attain open-loop and automatic self-beam steering towards both desired and multipath signals at the same time and diversity combining of the signals, which are made possible by spatial digital signal processing. This paper describes the performance of this beamformer under the multipath signal arrivals with various path delays using numerical simulation, aimed at application to future mobile radios with high spatial utilization efficiency. The results indicate the robustness of the MRC beamformer in a multipath environment. It features multidirectional beam steering when there is small path delay in the multipath signal and gain suppression in multipath signals when their path delay is more than about one symbol. Moreover, improvement in suppression by employing low-sidelobe amplitude distribution is discussed as a means to reduce inter-symbol interference without null-beam steering.

Handprinted Chinese character recognition (HCCR) can be classified into two major approaches: statistical and structural. While neither of these two approaches can lead to a total and practical solution for HCCR, integrating them to take advantages of both seems to be a promising and obviously feasible approach. But, how to integrate them would be a big issue. In this paper, we propose an integrated HCCR system. The system starts from a statistical phase. This phase uses line-density-distribution-based features extracted after nonlinear normalization to guarantee that different writing variations of the same character have similar feature vectors. It removes accurately and efficiently the impossible candidates and results in a final candidate set. Then follows the structural phase, which inherits the line segments used in the statistical phase and extracts a set of stroke substructures as features. These features are used to discriminate the similar characters in the final candidate set and hence improve the recognition rate. Tested by using a large set of characters in a handprinted Chinese character database, the proposed HCCR system is robust and can achieve 96 percent accuracy for characters in the first 100 variations of the database.

We have applied hot-carrier circuit-level simulation to memory peripheral circuits of a few thousand to over 12K transistors using a simple but accurate degradation model for reliability verification of actual memory products. By applying simulation to entire circuits, it was found that the location of maximum degradation depended greatly upon circuit configuration and device technology. A design curve has been developed to quickly relate device-level DC lifetime to circuit-level performance lifetime. Using these results in conjunction with a methodology that has been developed to predict hot-carrier degradation early in the design cycle before TEG fabrication, accurate total-circuit simulation is applied early in the design process, making reliability simulation a crucial design tool rather than a verification tool as technology advances into the deep sub-micron high clock rate regime.

In this paper, we give a new approach to the computation of primary decomposition and associated prime components of a zero-dimensional polynomial ideal (f1,f2,. . . ,fn), where fi are multivariate polynomials on Z (the ring of integer). Over the past several years, a considerable number of studies have been made on the computation of primary decomposition of a zero-dimensional polynomial ideal. Many algorithms to compute primary decomposition are proposed. Most of the algorithms recently proposed are based on Groebner basis. However, the computation of Groebner basis can be very expensive to perform. Some computations are even impossible because of the physical limitation of memory in a computer. On the other hand, recent advance in numerical methods such as homotopy method made access to the zeros of a polynomial system relatively easy. Hence, instead of Groebner basis, we use the zeros of a given ideal to compute primary decomposition and associated prime components. More specifically, given a zero-dimensional ideal, we use LLL reduction algorithm by Lenstra et al. to determine the integer coefficients of irreducible polynomials in the ideal. It is shown that primary decomposition and associated prime components of the ideal can be computed, provided the zeros of the ideal are computed with enough accuracy. A numerical experiment is given to show effectiveness of our algorithm.

In this paper, we discuss ferroelectric materials suitable for a metal ferroelectric metal insulator semiconductor FET (MFMIS FET). It is important for a ferroelectric material to have a low dielectric constant to enable the application of sufficient electric field to a ferroelectric layer. Films of Sr2Nb2O7 (SNO) and Sr2(Ta1-xNbx)2O7 (STNO) were prepared by the sol-gel method on Pt/IrO2 electrodes for an MFMIS FET. The ferroelectricities of STNO films were confirmed in the range of x=0. 1-0. 3. In case of x=0. 3, the largest remanent polarization was obtained in the hysteresis loop. The remanent polarization and the coercive field are 0. 5 µ C/cm2 and 44 kV/cm, respectively. The film had a low dielectric constant (ε=53). It is considered that the characteristics of STNO thin films are suitable for MFMIS FET.

Process algebras with name passing have been proposed for concurrent mobile processes. They can be suitable to describe dynamical changes of connections among processes. To describe mobile communication or mobile computing systems, however, it is necessary to consider locations at which processes run. We propose a description method to design mobile communication systems using a concurrent calculus in this paper. The concept of a field is introduced to model locality of communication. An extension of π-calculus with a field is proposed. The extension does not include locality represented by a field while most related works treat locality within their languages. A field is given when behavior of a target system is verified in a particular environment. The aim of the extension is to verify and to test connectivity between processes under various geographical constraints. This method could be design-oriented in this context. Equivalence relations with/without location in this calculus are also discussed.

This paper presents a routing methodology and a routing algorithm used in designing Gb/s LSIs with deep-submicron technology. A routing method for controlling wire width and spacing is adopted for net groups classified according to wire length and maximum-allowable-delay constraints. A high-performance router using this method has been developed and can handle variable wire widths, variable spacing, wire shape control, and low-delay routing. For multi-terminal net routing, a modification of variable-cost maze routing (GVMR) is effective for reducing wire capacitance (net length) and decreasing net delay. The methodology described here has been used to design an ATM-switch LSI using 0. 25-µm CMOS/SIMOX technology. The LSI has a throughput of 40 Gb/s (2. 5 Gbps/pin) and an internal clock frequency of 312 MHz.

We have developed a half-duplex spread spectrum-direct sequence (SS-DS) 2. 4 GHz band transceiver (T/R) unit having a smaller size and lower power consumption. A highly efficient elastic SAW convolver with chirp interdigital transducers (IDTs) has been used in the correlation circuit of receiver unit. The code shift keying (CSK) modulation is used in the T/R unit. The size of T/R unit is 90 50 11 mm and the weight is 75 grams. The power consumption of T/R unit is 1. 4 watts. We found that the bit error rate (BER) was less than 10-6 over the range of 0-150 m outdoors and 0-80 m indoors without a digital error detection and correction method. In this case, the data rate was 102 kbps and the transmit RF power was 2. 5 mW/MHz. The electrical characteristics, anti-interference and anti-multipath fading were also evaluated.

In a distributed concurrent system such as a computer communication network, the system components communicate with each other via communication links in order to accomplish a desired distributed application. If the links are dynamically established among the components, the system configuration as well as its behavior becomes complex. In this paper, we give formal specification of such a dynamically reconfigurable system in which the components are modeled by communicating finite state machines executed concurrently with the communication links which are dynamically established and disconnected. We also present an algorithm to validate the safety and link-related properties in the specified behavior. Finally, we design and implement a simulator and a validator that enables execution and validation of the given specification, respectively.

Users of computer communication systems and their requirements are rapidly increasing and changing. In order to deal such a situation a rapid development method of communication systems is necessary. One of the such development methods is to change an existing specification of the system to obtain the desired specification of the system. However, a very little work has been done to support making changes in formal specifications. In this paper, we propose a mechanism for making changes in formal protocol specifications by adding protocol functions in an existing protocol specification.

Unfolding originally introduced by McMillan is gaining ground as a partial-order based method for the verification of concurrent systems without state space explosion. However, it can be exposed to redundancy which may increase its size exponentially. So far, there have been trials to reduce such redundancy resulting from conflicts by improving McMillan's cut-off criterion. In this paper, we show that concurrency is also another cause of redundancy in unfolding, and present an algorithm to reduce such redundancy in live, bounded and reversible Petri nets which is independent of any cut-off algorithm.

Basic structural characteristics, which are useful in modular synthesis based on strongly connected state machines, of SMA/LBFC nets are discussed in this paper. A more convincing and direct proof of the equivalence of two structural characterization of the class of Petri nets is given. This proof will give clearer view of the structural characteristics of LBFC/SMA nets. On the other hand, however, the structural characteristics are not practically amenable in application to modular synthesis of SMA nets from a given set of SCSM's since all possible SCSM's should be examined for the verification of the given conditions. The later half of this paper is devoted into strengthening the results, i. e. , in composition of an SMA net from a given set of SCSM's the condition is also satisfied in any SCSM generated by composition.

It is important to test the various kinds of interconnect faults between chips on a card/module. When boundary scan design techniques are adopted, the chip to chip interconnection test generation and application of test patterns is greatly simplified. Various test generation algorithms have been developed for interconnect faults. A new interconnect test generation algorithm is introduced. It reduces the number of test patterns by half over present techniques. It also guarantees the complete diagnosis of multiple interconnect faults.

Verification of responsive communication protocols is to determine whether they can recover to a normal state within a predetermined time, even when they enter an abnormal state due to any fault. In this paper, we propose a new verification method for responsive communication protocols using virtual system states, each of which represents several system states. Next, in order to evaluate the effectiveness of the new method, we develop a verification tool based on the proposed method. Then we apply the tool to a broadcasting protocol and measure several metrics on the tool. The experimental results show that (1) the number of system states, (2) the amount of memory used by the tool, and (3) the execution time of the tool, can be drastically reduced.

This paper proposes a new method to improve cooperation in concurrent systems within the framework of Multi-Agent Systems (MAS). Since subsystems work concurrently, achieving appropriate cooperation among them is important to improve the effectiveness of the overall system. When subsystems are modeled as agents, it is easy to explicitly deal with the interactions among them since they can be modeled naturally as communication among agents with intended information. Contrary to previous approaches which provided the syntax of communication protocols without semantics, we focus on the semantics of cooperation in MAS and aim at allowing agents to exploit the communicated information for cooperation. This is attempted by utilizing more coarse-grained communication based on the different perspective for the balance between formality and richness of communication contents so that each piece of communication contents can convey more meaningful information in application domains. In our approach agents cooperate each other by giving feedbacks based on the metaphor of explanation which is widely used in human interactions, in contrast to previous approaches which use direct orders given by the leader based on the pre-defined cooperation strategies. Agents show the difference between the proposal and counter-proposals for it, which are constructed with respect to the former and given as the feedbacks in the easily understandable terms for the receiver. From the comparison of proposals agents retrieve the information on which parts are agreed and disagreed by the relevant agents, and reflect the analysis in their following behavior. Furthermore, communication contents are annotated by agents to indicate the degree of importance in decision making for them, which contributes to making explanations or feedbacks more understandable. Our cooperation method was examined through experiments on the design of micro satellites and the result showed that it was effective to some extent to facilitate cooperation among agents.

In this article, we propose a square wave generator whose switching threshold values are switched by external inputs. This circuit is designed to simulate the synchronized luminescence of coupled fireflies. We investigate the behavior of the solutions in two coupled oscillators. The dynamics are demonstrated by a linear autonomous equation piecewisely, therefore, a one-dimensional return map is derived. We also prove the existence of stable in-phase synchronization in the coupled oscillator by using the return map, and we show the existence of regions of periodic solutions within a parameter space. Some theoretical results are confirmed by laboratory measurements.

By treating each different output pattern as a state, we propose a low power architecture for pipelined circuits using bipartition. It is possible that the output of a pipelined circuit transit mainly among some of different states. If some few states dominate most of the time, we could partition the combinational portion of a pipelined circuit into two blocks: one that contains the few states with high activity is small and the other that contains the remainder with low activity is big. The original pipelined circuit is bipartitioned into two individual pipelined circuits. An additional combination logic block is introduced to control which of the two partitioned blocks to work. Power reduction is based on the observation that most time the small block is at work and the big one is at idle. In order to minimize the power consumption of this architecture, we present an algorithm that can improve the efficiency of this additional control block. Experiments with MCNC benchmarks show high percentage of power saving by using our new architecture for low power pipelined circuit design.

In this paper we consider a parallel and distributed computation of genetic algorithms on loosely-coupled multiprocessor systems. Loosely-coupled ones are more suitable for massively parallel processing and also more easily VLSI implementation than tightly-coupled ones. However, communication overhead on parallel processing is more serious for loosely-coupled ones. We propose in this paper a parallel and distributed execution method of genetic algorithm on loosely-coupled multiprocessor systems of fixed network topologies in which each processor element carries out genetic operations on its own chromosome set and communicates with only the neighbors in order to save communication overhead. We evaluate the proposed method on the multiprocessor systems with ring, torus, and hypercube topologies for benchmark problem instances. From the results, we find that the ring topology is more suitable for the proposed parallel and distributed execution since variety of chromosomes in the ring is kept much more than that in the others. Moreover, we also propose a new network topology called cone which is a hierarchical connection of ring topologies. We show its effectiveness by experimental evaluation.

RZ signal transmission in an anomalous region with periodic dispersion compensation is examined by a straight-line experiment in terms of the compensation ratio, the signal power, and the pulse width. The optimum condition enables single-channel 20-Gbit/s RZ signal and two-WDM-channel 20-Gbit/s signals (40-Gbit/s in total) to be transmitted over 5,520 km and 2,160 km, respectively. Numerical simulations with the assistance of a basic theory enables analysis of the experimental results. It is shown that the balance between the waveform distortion and the remaining Gordon-Haus jitter determines the optimum conditions to achieve the longest transmission distance. Excess dispersion compensation results in waveform distortion, while insufficient compensation causes a greater amount of remaining jitter. Moreover, spectrum deformation during propagation is experimentally and numerically clarified to have a large effect on the transmission performance, especially for WDM transmission.

We propose Direct Sequence CDMA with Optical Multicarriers and Parallel Forward Error Correcting (PFEC) coding technique. Proposed DS-CDMA with OPTICAL MULTICARRIERS, is new in lightwave systems and its alliance with PARALLEL FEC codes, makes it further unique. Optical multicarriers approach is effective to increase throughput by combating dispersion and ISI (Intersymbol Interference), whereas FEC is effective to increase reliability by diluting interactions among optical multicarriers. Till now, both the techniques in lightwave systems have been discouraged. The former because of the wandering effect of optical multicarriers owing to unstability of laser diodes and later because it involves insertion of parity bits that changes data rate and results in insertion distortion that is not desirable in optical systems. To avoid change due to spreading code we also propose to take spreading code equal to serial to parallel converted streams. It bounds initial data (before S/P conversion) to data per carrier (after S/P conversion and spreading) on one hand and relaxes the requirement of high speed electronics on the other. The alliance of optical multicarriers with suitably applied FEC that we refer as Parallel FEC (PFEC) is effective as the beneficial aspects of each mitigate the shortcomings of the other and make the system practicable. Theoretical treatment confirms that the proposed approach is fundamentally sound and holds the potential for promising network performance.