In this study, an expression of the regression relationship with less information loss is concretely derived in the form suitable to the existence of amplitude constraint of the observed data and the prediction of response probability distribution. The effectiveness of the proposed method is confirmed experimentally by applying it to the actual acoustic data.

A novel approximate equivalent edge currents (EECs) are proposed for use in the modified edge representation (MER) for flat plates. It was reported that PO-EECs with classical PO diffraction coefficients, as applied to MER, perfectly recover PO surface integration. The inclusion of classical FW-EECs as it is, however, would not enhance the accuracy since the reality of the fringe wave is lost in the edge modification. This paper presents simple approximation for inclusion of FW-EECs in MER; FW-EECs are weighted by the function of the angle between the modified edge and the real edge. The key feature of this approach is that uniform fields are predicted everywhere though only classical diffraction coefficients are used. MER also simplifies the ray-tracing in the secondary diffraction analysis. Numerical results for diffraction from flat plates demonstrate the potential of these EECs.

A new arithmetic multiple-valued algebra with functional completeness is introduced. The algebra is called Neuro-Algebra for it has very similar formula and architecture to neural networks. Two canonical forms of multiple-valued functions of this Neuro-Algebra are presented. Since the arithmetic operations of the Neuro-Aglebra are basically a weighted-sum and a piecewise linear operations, their implementations are very simple and straightforward. Furthermore, the multiple-valued networks based on the Neuro-Algebra can be trained by the traditional back-propagation learning algorithm directly.

We have developed a new HIGFET structure achieving an extremely high K-value of 13.3 S/Vcm with a gate length of 0.15 µm. Self-aligned ion implantation is excluded to suppress a short-channel effect. An i-GaAs cap layer and an n+-GaAs contact layer are employed to reduce source resistance. The threshold voltage shift is as small as 50 mV when the gate length is reduced from 1.5 µm to 0.15 µm. Source resistance is estimated to be 53 mΩcm. We have also developed a new fabrication process that can achieve a shorter gate length than the minimum size of lithography. This process utilizes an SiO2 sidewall formed on the n+-GaAs contact layer to reduce the gate length. A gate length of 0.15 µm can be achieved using 0.35 µm lithography.

The value distribution of the partial autocorrelation of periodic sequences is important for the evaluation of the sequence performances when sequences of long period are used. But it is difficult to find the exact value distribution of the autocorrelation in general. Therefore we derived some properties of the partial autocorrelation for binary m-sequences which may be used to find the exact value distribution.

Asymptotic bounds are considered for unidirectional byte error-correcting codes. Upper bounds are developed from the concepts of the Singleton, Plotkin, and Hamming bounds. Lower bounds are also derived from a combination of the generalized concatenated code construction and the Varshamov-Gilbert bound. As the result, we find that there exist codes of low rate better than those on the basis of Hamming distance with respect to unidirectional byte error-correction.

An approximate equation of the odd periodic correlation distribution for the family of binary sequences is derived from the exact even periodic correlation distribution. The distribution means the probabilities of correlation values which appear among all the phase-shifted sequences in the family. It is shown that the approximate distribution is almost the same as the computational result of some family such as the Gold sequences with low even periodic correlation magnitudes, or the Kasami sequences, the bent sequences with optimal even periodic correlation properties in the sense of the Welch's lower bound. It is also shown that the odd periodic correlation distribution of the family with optimal periodic correlation properties is not the Gaussian distribution, but that of the family of the Gold sequences with short period seems to be similar to the Gaussian distribution.

A new circuit design of Josephson ternary δ-gate composed of Josephson junction devices is presented. Mathematical theory for synthesizing, analyzing, and realizing any given function in ternary system using Josephson ternary δ-gate is introduced. The Josephson ternary δ-gate is realized using SQUID technique. Circuit simulation results using J-SPICE demonstrated the feasibility and the reliability operations of Josephson ternary δ-gate with very high performances for both speed and power consumption (max. propagation delay time44 ps and max. power consumption2.6µW). The Josephson ternary δ-gate forms a complete set (completeness) with the ternary constants (1, 0, 1). The number of SQUIDs that are needed to perform the operation of δ-gate is 6. Different design with less than 6 SQUIDs is not possible because it can not perform the operation of δ-gate. The advantages of Josephson ternary δ-gate compared with different Josephson logic circuits are as follows: The δ-gate has the property that a simple realization to any given ternary logic function as the building blocks can be achieved. The δ-gate has simple construction with small number of SQUIDs. The δ-gate can realize a large number of ternary functions with small number of input/output pins. The performances of δ-gate is very high, very low power consumption and ultra high speed switching operation.

This paper reviews the historical aspect of contributions on the theory of analysis and diagnosis of linear circuits, which have been made by Japanese researchers in these twenty years. On papers of diagnosis, those related to element-value solvability (or determinability) are mainly reviewed. Some important problems are suggested.

The authors examined the effect of feedbacking information on learners of their test results obtained through computerized tests. The learner's acceptability of computerized tests was revealed to be improved by distribution and explanation of newly devised feedback charts including data on one's response history and response latency during computerized testing that was carried out in formative evaluation. The feedback chart composed of graphic representation of relationship between degree of difficulty of each question and its response latency got a particularly high evaluation among learners. It was revealed that types of feedback chart that stood highest in learner's estimate varied with the learner traits. This observation will serve to develop educational systems that incorporate computerized tests into school lessons.

Three dimensional (3-D) optics offers potential advantages to the massively-parallel systems over electronics from the view point of information transfer. The purpose of this paper is to survey some aspects of the 3-D optical interconnection technology for the future massively-parallel computing systems. At first, the state-of-art of the current optoelectronic array devices to build the interconnection networks are described, with emphasis on those based on the semiconductor technology. Next, the principles, basic architectures, several examples of the 3-D optical interconnection systems in neural networks and multiprocessor systems are described. Finally, the issues that are needed to be solved for putting such technology into practical use are summarized.

Design of high-speed digital circuits such as adders and multipliers is one of the most important issues to implement high performance VLSI systems. This paper proposes a new multiple-valued code assignment algorithm to implement locally computable combinational circuits for k-ary operations. By the decomposition of a given k-ary operation into unary operations, a code assignment algorithm for k-ary operations is developed. Partition theory usually used in the design of sequential circuits is effectively employed for optimal code assignment. Some examples are shown to demonstrate the usefulness of the proposed algorithm.

Toward the age of ultra-high-density digital ULSI systems, the development of new integrated circuits suitable for an ultimately fine geometry feature size will be an important issue. Resonant-tunneling (RT) diodes and transistors based on quantum effects in deep submicron geometry are such kinds of key devices in the next-generation ULSI systems. From this point of view, there has been considerable interests in RT diodes and transistors as functional devices for circuit applications. Especially, it has been recognized that RT functional devices with multiple peaks in the current-voltage (I-V) characteristic are inherently suitable for implementing multiple-valued circuits such as a multiple-state memory cell. However, very few types of the other multiple-valued logic circuits have been reported so far using RT devices. In this paper, a new multiple-valued programmable logic array (MVPLA) based on RT devices is proposed for the next-generation ULSI-oriented hardware implementation. The proposed MVPLA consists of 3 basic building blocks: a universal literal circuit, an AND circuit and a linear summation circuit. The universal literal circuit can be directly designed by the combination of the RT diodes with one peak in the I-V characteristic, which is programmable by adjusting the width of quantum well in each RT device. The other basic building blocks can be also designed easily using the wired logic or current-mode wired summation. As a result, a highdensity RT-diode-based MVPLA superior to the corresponding binary implementation can be realized. The device-model-based design method proposed in this paper is discussed using static characteristics of typical RT diode models.

This paper proposes new architecture LSIs based on wave-parallel computing to provide an essential solution to the interconnection problems in massively parallel processing. The basic concept is ferquency multiplexing of digital information, which enables us to utilize the parallelism of electrical (or optical) waves for parallel processing. This wave-parallel computing concept is capable of performing several independent binary funtions in parallel with a single module. In this paper, we discuss the design of wave-parallel image processing LSI to demonstrate the feasibility of reducing the number of interconnections among modules.

A speech coding scheme at 3.6 kbit/s has been proposed. The scheme is based on CELP (Code Excited Linear Prediction) with pitch synchronous innovation, which means even random codevectors as well as adaptive codevectors have pitch periodicity. The quality is comparable to 6.7 kbit/s VSELP coder for the Japanese cellular radio standard.

A new neural network system for object recognition is proposed which is invariant to translation, scaling and rotation. The system consists of two parts. The first is a preprocessor which obtains projection from the input image plane such that the projection features are translation and scale invariant, and then adopts the Rapid Transform which makes the transformed outputs rotation invariant. The second part is a neural net classifier which receives the outputs of preprocessing part as the input signals. The most attractive feature of this system is that, by using only a simple shift invariant transformation (Rapid transformation) in conjunction with the projection of the input image plane, invariancy is achieved and the system is of reasonably small size. Experiments with six geometrical objects with different degrees of scaling and rotation shows that the proposed system performs excellent when the neural net classifier is trained by the Cascade-correlation learning algorithm proposed by Fahlman and Lebiere.

The singular point analysis, such as the Painlev test and Yoshida's test, is a computational method and has been implemented in a symbolic computational manner. But, in applying the singular point analysis to high dimensional and/or "complex" dynamical systems, we face with some computational difficulties. To cope with these difficulties, we propose a new numerical technique of the singular point analysis with the aid of the self-validating numerics. Using this technique, the singular point analysis can now be applicable to a wide class of high dimensional and/or "complex" dynamical systems, and in many cases dynamical properties such as the algebraic non-integrability can be proven for such systems.

This review presents research topics and results on digital signal processing in the last twenty years in Japan. The main parts of the review consist of design and analysis of multidimensional digital filters, multiple-valued logic circuits and number systems for signal processing, and general purpose signal processors.

In our recent work, a forward test generation method for sequential circuits by using a single time frame was proposed. In order to improve the effectiveness of the method, we introduced an extended mode which can handle the two time frames for a hard-to-test fault and a state escaping phase which can detect a sequence of unsuitable states for test generation. The experimental results show that the improved method is effective in generating higher coverage tests with a small number of tests.

To investigate necessary conditions for the object recognition by simulations using neural network models is one of ways to acquire suggestions for understanding the neuronal representation of objects in the brain. In the present study, we trained a three layered neural network to form a geometrical feature representation in its output layer using back-propagation algorithm. After training using 73 learning examples, 65 testing patterns made by various combinations of above features could be recognized with the network at a rate of 95.3% appropriate response. We could classify four types of hidden layer units on the basis of effects on the output layer.