Time synchronization is indispensable for wide area distributed systems including sensor networks, automation systems, and measurement/control systems. Another application is clock distribution, which is indispensable to support continuous information transfer. Because of the increasing demand for more sophisticated applications, it is essential to establish a time synchronization technique that offers higher accuracy and reliability. Particularly, the accuracy of time synchronization for Ethernet must be enhanced since Ethernet is becoming more important in telecommunication networks. This paper investigates a precise time synchronization technique that supports Gb/s Ethernet. To obtain accurate time synchronization, delay variation in message transfer and processing must be minimized. For this purpose, the paper first describes the implementation of preemptive priority queuing, which decreases the message delay variation of Ethernet. Through experiments, it is shown that preemptive priority queuing effectively achieves very low delay variation. The paper then proposes a method to synchronize the time signal of a slave node to that of the master node. The proposed time synchronization method is performed in the lower protocol layer and implemented on FPGA-based hardware. The method achieves superior time accuracy through the low message transfer/processing delay variation provided by preemptive priority, lower layer execution, and hardware implementation. The effectiveness of the method is confirmed through experiments. The experiments show that the time variation achieved by the method is smaller than 0.1 µsec. This performance is better than those obtained by existing synchronization methods.

This paper presents method that offers the fast and accurate analysis of large-scale periodic array antennas by conjugate-gradient fast Fourier transform (CG-FFT) combined with an equivalent sub-array preconditioner. Method of moments (MoM) is used to discretize the electric field integral equation (EFIE) and form the impedance matrix equation. By properly dividing a large array into equivalent sub-blocks level by level, the impedance matrix becomes a structure of Three-level Block Toeplitz Matrices. The Three-level Block Toeplitz Matrices are further transformed to Circulant Matrix, whose multiplication with a vector can be rapidly implemented by one-dimension (1-D) fast Fourier transform (FFT). Thus, the conjugate-gradient fast Fourier transform (CG-FFT) is successfully applied to the analysis of a large-scale periodic dipole array by speeding up the matrix-vector multiplication in the iterative solver. Furthermore, an equivalent sub-array preconditioner is proposed to combine with the CG-FFT analysis to reduce iterative steps and the whole CPU-time of the iteration. Some numerical results are given to illustrate the high efficiency and accuracy of the present method.

In this letter, a new formula is proposed for calculating the polarization entropy, based on the least square method. There is no need to calculate the eigenvalues of a covariance matrix as well as to use logarithms of values. So the time for computing the polarization entropy is reduced. Using polarimetric SAR data, the authors validate the effectiveness of the new formula.

Sequences with ear zero correlation zones (EZCZs) are employed to suppress inter-symbol interference (ISI) and inter-user interference (IUI) in wireless communications. Theoretical limits on correlation functions of such sequences are investigated, lower bounds on the relations among length of sequence, width of EZCZs/ELCZs and family size are derived and presented, which play an important role in assessing performance of such sequences.

In this letter, an illustrative example is given, which shows that the number of integrators needed for the dynamic observer error linearization using integrators can not be bounded by a function of the dimension of the system and the number of outputs in contrast to dynamic feedback linearization results.

This paper presents a fast switching CMOS frequency synthesizer with a new coarse tuning method for PHS applications. To achieve the fast lock-time and the low phase noise performance, an efficient bandwidth control scheme is proposed. To change the bandwidth, the charge pump current and the loop filter zero resistor should be changed. Charge pump up/down current mismatches are compensated with the current mismatch compensation block. The proposed coarse tuning method selects the optimal tuning capacitances of the LC-VCO to optimize the phase noise and the lock-time. The measured lock-time is about 20 µs and the phase noise is -121 dBc/ at 600 kHz offset. This chip is fabricated with 0.25 µm CMOS technology, and the die area is 0.7 mm2.1mm. The power consumption is 54 mW at 2.7 V supply voltage.

This study is devoted to a half-wave dipole with a conductor plane at a distance much smaller than a quarter wavelength which we designate as an ultra low profile dipole (ULPD) antenna in this paper. The concerns of ULPD antenna are the feeding method and the impedance matching, because the input impedance usually tends to be lowered by the existence of a metallic structure in its proximity. In this paper, we propose a ULPD antenna with an excellent impedance matching and a coaxial feed built within the antenna structure so that the external matching and a balun are not required. A coaxial cable is used as a feed line and extended to be a half of a half wavelength dipole. The other half is made up of a parasitic element, which is connected to the outer conductor of the coaxial radiator. To make a matching, the outer conductor of the coaxial radiator is stripped off at a suitable length, and the total length of a dipole is considered for its resonance at a desired frequency of 2 GHz. The experiment has been conducted. The results show the return loss of -27 dB and the maximum gain of 9 dBi in the normal direction to the conductor plane. The computational results are also obtained, which agree well with the experimental results.

iPat/OMP is an interactive parallelization assistance tool for OpenMP. In the present paper, we describe the design concept of iPat/OMP, the parallelization sequence achieved by the tool and its current implementation status. In addition, we present an evaluation of the performance of the implemented functionalities. The experimental results show that iPat/OMP can detect parallelism and create an appropriate OpenMP directive for several for-loops.

The present paper introduces an improved construction of a class of binary sequences having a zero-correlation zone (hereafter binary ZCZ sequence set). The cross-correlation function and the side-lobe of the auto-correlation function of the proposed sequence set is zero for the phase shifts within the zero-correlation zone. The present paper shows that such a construction generates a binary ZCZ sequence set from an arbitrary M-sequence. The previously reported sequence construction of binary ZCZ sequence sets from an M-sequence can generate a single series of binary ZCZ sequence sets from an M-sequence. The present paper proposes an improved sequence construction that can generate more than one series of binary ZCZ sequence sets from an M-sequence.

Resource management for infrastructure-based two-hop fixed relay systems which are applicable to TDD-FH-OFDMA based cellular systems with sectorization is proposed in this paper. The severe interference problem caused by both inter-sector and inter-cell can be tackled by employing 6-sector directional antennas combined with the resource allocation. The simulation results demonstrate that at the outer-region of the cell, the high data rate service coverage can be extended.

The Navigational Programming (NavP) methodology is based on the principle of self-migrating computations. It is a truly incremental methodology for developing parallel programs: each step represents a functioning program, and each intermediate program is an improvement over its predecessor. The transformations are mechanical and straightforward to apply. We illustrate our methodology in the context of matrix multiplication, showing how the transformations lead from a sequential program to a fully parallel program. The NavP methodology is conducive to new ways of thinking that lead to ease of programming and high performance. Even though our parallel algorithm was derived using a sequence of mechanical transformations, it displays certain performance advantages over the classical handcrafted Gentleman's Algorithm.

A combination of horizontal expansion and vertical stacking of optical Banyan (HVOB) is the general architecture for building Banyan-based optical cross-connects (OXCs), and the intrinsic crosstalk problem of optical signals is a major constraint in designing OXCs. In this paper, we analyze the blocking behavior of HVOB networks and develop the lower bound on blocking probability of a HVOB network that is free of first-order crosstalk in switching elements. The proposed lower-bound is significant because it provides network designers an effective tool to estimate the minimum blocking probability they can expect from a HVOB architecture regardless what kind of routing strategy to be adopted. Our lower bound can accurately depict the overall blocking behavior in terms of the minimum blocking probability in a HVOB network, as verified by extensive simulation based on a network simulator with both random routing and packing routing strategies. Surprisingly, the simulated and theoretical results show that our lower bound can be used to efficiently estimate the blocking probability of HVOB networks applying packing strategy. Thus, our analytical model can guide network designers to find the tradeoff among the number of planes (stacked copies), the number of SEs, the number of stages and blocking probability in a HVOB network applying packing strategy.

In frequency-domain multiplexing (FDM) for TES signals, a magnetic field summation method utilizing a multi-input SQUID has the fundamental merit of small degradation of the signal-to-noise ratio. We formulated shifts of the operation point due to a common impedance and cross talk currents. These effects are evaluated for several FDM methods, and the requirements for the bandwidth and filters are summarized. The design parameters of multi-input SQUIDs and a flux locked loop driving circuits are also presented.

Collective transverse plasma modes in Bi2Sr2CaCu2O8+x intrinsic Josephson junctions (IJJs) can be excited by the moving fluxon lattices. Progressive transformation of the standing-wave-like fluxon-lattice configuration from a triangular lattice to a rectangular lattice takes place as the dynamic fluxon-lattice modes are in resonance with the collective transverse plasma modes. In this paper, we review the progress in terahertz-frequency-range electromagnetic wave generation from the IJJs using the resonance between moving fluxon lattice and the collective transverse plasma modes.

A parallel notch filter (PNF) for eliminating a sinusoidal signal whose frequency and phase are unknown, has been proposed previously. The PNF achieves both fast convergence and high estimation accuracy when the step-size for adaptation is appropriately determined. However, there has been no discussion of how to determine the appropriate step-size. In this paper, we derive the convergence condition on the step-size, and propose an adaptive algorithm with variable step-size so that convergence of the PNF is automatically satisfied. Moreover, we present a new filtering structure of the PNF that increases the convergence speed while keeping the estimation accuracy. We also derive a variable step-size scheme for the new PNF to guarantee the convergence. Simulation results show the effectiveness of the proposed method.

This work proposes a new method for RLCG interconnect model-order reductions in consideration with the adjoint network. Relationships between an original MNA network and its corresponding adjoint MNA network will be explored first. It will be shown that the congruence transformation matrix used in the one-sided projection can be constructed by using the bi-orthogonal bases developed from the Lanczos-type algorithms. In particular, if the multi-port driving-point impedance of RLCG interconnect circuits is the main concern, the transfer functions and system moments of the adjoint network can be directly calculated from those of the original RLCG interconnect network by exploring symmetric properties of the MNA formulation. Therefore, the cost of constructing the congruence transformation matrix can be simplified by up to 50% of the previous methods. Comparative studies among various standard methods and the proposed methods are also investigated. Experimental results on large-scale RLCG interconnect circuits will demonstrate the accuracy and the efficiency of the proposed method.

The capability of Hierarchical Mobile IP (HMIP) for intra-domain route optimization is impaired when it is combined with Network Mobility (NEMO) technology. Deviations from the optimum path, caused by traffic aggregation in the Mobility Anchor Point (MAP), can be observed within a hierarchical domain. The problem is particularly noticeable in domains that span the mesh network topology. The lack of intra-domain path optimization in multi-level Mobile IP (MIP) leads to inefficient use of network resources. A Proxy Mobility Anchor Point (PMAP) functionality is proposed in domain nodes to enable intra-domain path optimization in multi-level MIP. Numerical evaluation and simulations indicate that this proposal can improve routing efficiency and throughput. The solution can be especially rewarding in network architectures where access network is separated from global network by bottleneck links and where the majority of users accessing the network are mobile routers.

The 5-cm-diameter double-sided YBa2Cu3O7 (YBCO) films were prepared by metal organic deposition (MOD) using a commercially available metal-naphthenate coating solution. Firstly, YBCO film was prepared by MOD on one side of a double-side-polished 5-cm-diameter LaAlO3 substrate. Secondly, another side was similarly coated with YBCO by MOD. After the latter processing, degradation of average Jc value in the first side was not observed; but the fluctuation of critical current density Jc slightly increased. The double-sided YBCO films showed average Jc values of 0.8-1.0 MA/cm2 at 77 K and microwave surface resistances Rs(12 GHz) of 0.86-1.07 mΩ at 70 K.

We propose an ASK modulator and Antenna driver for multi-standard 13.56 MHz RFID readers and NFC devices. The proposed transmitters of RFID readers and NFC devices consist of ASK modulator, inverting output driving buffer and off-chip antenna with a matching circuit. The ASK modulation depth can easily be controlled by adjusting duty ratio by the delay line circuit. The test chip was fabricated by using a 0.35 µm double poly CMOS process. The measured results demonstrated that the proposed circuit has met the standard specifications.

Recent improvements in the performance of end-computers and networks have made it feasible to construct a grid system over the Internet. A grid environment consists of many computers, each having a set of components and a distinct performance. These computers are shared among many users and managed in a distributed manner. Thus, it is important to focus on a situation in which the computers are used unevenly due to decentralized management by different task schedulers. In this study, which is a preliminary investigation of the performance of task allocation schemes employed in a decentralized environment, the average execution time of a long-lived task is analytically derived using the M/G/1-PS queue. Furthermore, assuming a more realistic condition, we evaluate the performance of some task allocation schemes adopted in the analysis, and clarify which scheme is applicable to a realistic grid environment.