Regenerative Pass-transistor Logic (RPL), a modular dual-rail circuit technique for high speed logic design that gives reasonably low power consumption, was developed. The technique can be applied to basic logic gates, full adders, multiplier units, and more complicated arithmetic logics like Conditional Carry Select (CCS) circuit. The magnitude of propagation delay time of RPL is smaller than the conventional CPL(Complementary Pass-transistor Logic), or DPL (Double Pass-transistor Logic). Low power consumption can also be achieved by reduced number of transistors and metal interconnections. Simulation and layout data also proved that RPL is advantageous over existing dual-rail logics while considering speed, power consumption and layout area.

An individual identification system is developed. In this system, we unify profile curve identification and full face image identification to obtain more successful recognition rate. In profile cruve identification process, the P-type Fourier descriptor is made use of. In full face image identification process, mosaic density values are made use of. A combination of the two processes shows higher recognition rates than those obtained by each single process.

A high-Tc superconducting filter of the planar structure is proposed for handling higher power signals and for miniaturizing the filter configuration. The filter is designed with a single disk-resonator shared by two degenerate modes to operate as a two-stage bandpass filter. Thereby the proposed filter is expected to possess high power handling capability as a conventional filter with two resonator disks does while the filter configuration is about a half in area compared to the conventional one. The Tchebyscheff type filter with 5.1 GHz center frequency and 2% relative bandwidth was fabricated using a high-Tc superconducting thin film. The passband insertion loss, Lo, was approximately 0.8 dB at 77 K. The low loss performance due to the superconductivity was observed at incident signal levels up to 41.2 dBm (around 15 W) at 20 K, which is limited by the power devices in the measurement setup. In addition, good linearity in the filter responses was confirmed by observing the intermodulation distortion with the two-tone method, which indirectly shows a stable operation with higher power incident signals.

In the weakly coupled grain model which has been proposed to explain the residual surface resistance in high-Tc superconducting polycrystalline thin films, the superconducting polycrystalline thin films is described as a network of superconducting grains coupled via Josephson junctions. In order to evaluate this model we have fabricated the coplanar waveguide resonator using c-axis oriented YBa2Cu3Ox Thin Films and measured the residual surface resistance. The experimental results are in good agreement with theoretical prediction.

A maximum diameter (Dmax) of raindrop should be assumed when rainfall rate (R) is estimates from the differential reflectivity (ZDR) and the horizontal reflectivity (ZH) measured with dual-polarization radar. If the assumed Dmax is different from actual Dmax, the estimated R contains errors. Using distrometer data, it was found that ZDR correlates with Dmax, and it was verified that when Dmax is adaptively determined by an empirical relationship between ZDR and Dmax, errors in estimated R can be reduced.

A Q-band high gain and low noise Variable Gain Amplifier (VGA) module using dual gate AlGaAs/InGaAs pseudomorphic HEMTs has been developed. The dual gate HEMT can be fabricated by the same process of the single gate HEMT which has the gate length of 0.15 µm. The Q-band VGA module consists of a 1-stage low noise amplifier (LNA) MMIC using a single gate HEMT and a 2-stage VGA MMIC using dual gate HEMTs. During the design, an accurate noise modeling is introduced to achieve low noise performance. A fully passivated film is employed to achieve reliability. The VGA module has a gain of more than 20 dB from 41 GHz to 52 GHz and a maximum gain of 24.5 dB at 50 GHz. A gain control range of more than 30 dB is achieved in the same frequency range. A phase deviation is less than 10 degrees in 10 dB gain control range. A minimum noise figure of 1.8 dB with an associated gain of 22 dB is achieved at 43 GHz and the noise figure is less than 2.5 dB with associated gain of more than 20 dB from 41 GHz to 46 GHz when biased for low noise figure. This performance is comparable with the best data ever reported for LNAs at Q-band including both GaAs based HEMTs and InP based HEMTs.

In this paper, we formulate and solve a discrete-time queueing problem that has two potential applications: ATM multiplexers and DQDB networks. We first consider the modeling of an ATM multiplexer. The object of the analysis is a periodic traffic stream (CBR traffic), which is one of the inputs to the multiplexer. As in previous works of the subject, we consider a memoryless background traffic input. Here, in addition to this background traffic, we take into account the influence of a high-priority traffic, which is time-correlated and requires expedited service. We analyze the influence of these two types of traffic on the statistics of the interdeparture time (jitter process) and the delay of the periodic traffic stream. We obtain their distributions in a form of z-transforms, and from these we derive closed form expressions for the average delay and the variance of the interdeparture time. Our results show that the delay and jitter are very sensitive to the burstiness of the high priority traffic arrival process. We next apply our analytical modeling to a DQDB network when some of its stations are driven by CBR sources. We can obtain interesting results concerning the influence of the physical location of a DQDB station on the jitter.

This paper describes a 600 mV single-chip MPEG2 video decoder, implemented in a 0.5 µm triple metal CMOS technology, which operates with a 3.3-volt power supply. To achieve low power consumption, a low power dual-port RAM has been developed utilizing a selective bit line precharge scheme to reduce bit line current which is suitable for use in the bit-slice array commonly found in parametric ASIC RAM macro modules. This architecture and a non-DC current sense amp make the RAM's read power consumption one-third of that of a conventional dual-port RAM. Various techniques such as multiple-clock architecture and a system clock independent from a display clock make a system clock frequency as low as possible. The video decoder has a syntax parser, so that it can handle the higher syntactic elements of MPEG2 bit streams without any host processor and decode the Main profile at Main level of MPEG2 bit streams.

The fundamental TE10 mode in a rectangular waveguide of a square cross section is degenerate with TE01 mode. A quarter wavelength resonator made of a dielectric square waveguide is, therefore, applied for a small-sized bandpass filter, just like dual mode filters for base stations in the mobile communication. In this paper, the methods to couple the two modes are first studied, including cutting a corner of the resonator and adding some metal electrodes on its end face. Both methods help to flow the rf current of the odd mode at the corner, resulting in decrease of the series inductance and thus increase of the resonant frequency. The coupling constant, that is proportional to the difference of the odd and even-mode's resonant frequency, can be controlled by the perturbations mentioned above. The coupling to the external circuit is adjusted by an electrode fabricated also on the end face. It is connected to a microstrip line and capacitively couples to the resonant modes. The coupling strength increases with the dimension of the electrode. The adjustment of the resonant frequency is carried out by the similar electrode on the end face and connected to the center of the side of the square cross section. The frequency decreases with the length of the electrode. The unloaded Q is measured to be of around 500 for 5510 mm resonator of εr=93. The optimum aspect ratio for the resonator is found in terms of the Q value. The simplest bandpass filter, i.e., a two-stage bandpass filter is designed and fabricated using 5510 mm resonator. It is mounted in a square hole made in a printed circuit board and excited by a microstrip line. The frequency characteristics are in good agreement with the expected values.

Cross-phase modulation (XPM) induced by residual intensity modulation in coherent optical frequency-shift-keying (FSK) frequency division multiplexing (FDM) transmission systems that use dispersion-shifted fibers is evaluated theoretically and experimentally in terms of spectral profile deformation. The bit-error rate is measured in a 2.5-Gbit/s 4-channel 40-km dispersion-shifted fiber transmission experiment, and we confirm experimentally and theoretically that the power penalty in the presence of residual intensity modulation of over 4 mWp-p exceeds 1dB. Experimental results show that the penalty due to XPM is large even when the power of the newly generated lights caused by four-wave mixing is 20-dB less than that of signals. This confirms that residual intensity modulation must be reduced in continuous-phase (CP)-FSK-FDM systems even though they are designed to avoid generating four-wave mixing.

Radar signals fluctuate because of the incoherent scattering of raindrops. Dual-polarization radar estimates rainfall rates from differential reflectivity (ZDR) and horizontal reflectivity (ZH). Here, ZDR and ZH are extracted from fluctuating radar signals by averaging. Therefore, instrumentally measured ZDR and ZH always have errors, so that estimated rainfall rates also have errors. This paper evaluates rainfall rate errors caused by signal fluctuation. Computer simulation based on a physical raindrop model is used to investigate the standard deviation of rainfall rate. The simulation considers acquisition time, and uses both simultaneous and alternate sampling of horizontal and vertical polarizations for square law and logarithmic estimators at various rainfall rates and elevation angles. When measuring rainfall rates that range from 1.0 to 10.0mm/h with the alternate sampling method, using a logarithmic estimator at a relatively large elevation angle, the estimated rainfall rates have significant errors. The simultaneous sampling method is effective in reducing these errors.

A full CMOS cell technology for high density SRAMs has been developed. A 0.4 µm n+/p+ spacing has been achieved by a shallow trench isolation with a retrograde and a shallow well design. Dual gate 0.35 µm n- and p-channel MOSFETs were used for the high density full CMOS SRAM cell. The side-wall inversion problem to which MOSFETs are subject due to the trench isolation structure has been controlled by combining taper angled trench etching and a rounded trench edge shape. A dual gate 0.4 µm nMOS/pMOS spacing has also been accomplished with no lateral gate dopant diffusion by an enlarged grain size tungsten polycide gate structure. These techniques can resolve the bottleneck problem of full CMOS SRAM cell size reduction, and realize a competitive cell size against conventional polysilicon resistor load SRAM cell (E/R type cell) or thin-film-transistor load SRAM cell (TFT type cell) structures. A test chip of a 256 k bit full CMOS SRAM was fabricated to verify the process integration of the shallow trench isolation with the retrograde shallow well design and the dual gate CMOS structure. It has been recognized that the above techniques are possible solutions for deep sub-micron high density full CMOS SRAM cell structure.

This paper presents an efficient algorithm for constructing at-most-k levels of an arrangement of n lines in the plane in time O(nk+n log n), which is optimal since Ω(nk) line segments are included there. The algorithm can sweep the at-most-k levels of the arrangement using O(n) space. Although Everett et al. recently gave an algorithm for constructing the at-most-k levels with the same time complexity independently, our algorithm is superior with respect to the space complexity as a sweep algorithm. Then, we apply the algorithm to a bipartitioning problem of a bichromatic point set： For r red points and b blue points in the plane and a directed line L, the figure of demerit fd(L) associated with L is defined to be the sum of the number of blue points below L and that of red ones above L. The problem we are going to consider is to find an optimal partitioning line to minimize the figure of demerit. Given a number k, our algorithm first determines whether there is a line whose figure of demerit is at most k, and further finds an optimal bipartitioning line if there is one. It runs in O(kn+n log n) time (n=r+b), which is subquadratic if k is sublinear.

A design rule relaxation approach is one of the most important requirements for high density DRAMs. The approach relaxes the design rule of a element in comparison with the memory cell size and provides high density DRAMs with the minimum development of a scaled-down MOS structure and a fine patterning lithography process. This paper describes two design rule relaxation approaches, a close-packed folded (CPF) bit-line cell array layout and a Boosted Dual Word-Line scheme. The CPF cell array provides 1.26 times wider active area pitch and maximum 1.5 times wider isolation width. The Boosted Dual Word-Line scheme provides 2n times wider 1st Al pitch on memory cell array, double word-line driver pitch and 1.5 times larger design rule for 1st Al and contacts under 1st Al. Especially wide design rule of the Boosted Dual Word-Line scheme provides several times depth of focus (DOF) for 1st Al wiring which gives several times higher storage node and larger capacitance for capacitor over bit-line (COB) stacked capacitor cells. These approaches are successfully implemented in a 4 Mb DRAM test chip with a 0.91.8 µm2 memory cell.

Single-mode fibers with intentionally induced periodical residual strains (IIPRS) along the fiber length are proposed for the suppression of the stimulated Brillouin scattering (SBS). A change of the residual strain along a fiber will change the Brillouin frequency shift, resulting in a broadening of the Brillouin gain profile. Such an increase of the line-width of the gain profile will cause a decrease of the gain coefficient which will raise the threshold power of the stimulated Brillouin scattering in optical fibers. Two types of the IIPRS fibers were fabricated. The residual strain of one IIPRS fiber is modified rectangularly while that of the other is changed triangularly. The measured spectra of the SBS are compared with that of a fiber with a constant strain. Using a novel mathematical model presented in this report, the possible improvements of the threshold powers for these two IIPRS fibers over the constant-strain fiber can be assessed through the SBS spectra. Finally, the achieved improvements are confirmed with the experimental results. The estimated improvement of the threshold for the IIPRS fiber with the rectangular profile is 2.9dB while the measured is 2.4dB. In case of the IIPRS fiber with a triangular profile, the improvement of the threshold is 5.4dB by estimation and is 5.1dB by experiment. While the limit of the threshold improvement for rectangular IIPRS fibers is 3dB, the threshold improvement for triangular IIPRS fibers is limited only by the allowable deviation of the tension applied during the drawing of fibers. It is estimated that a 5dB improvement is not difficult to realize.

This paper proposes and investigates an adaptive equalizer with diversity-combining over a multipath fading channel. It consists of two space-diversity antennas and a Ts/2-spaced decision-feedback-equalizer (DFE). Received signals from the two antennas are alternatively switched and fed into the feed forward-filter of DFE. We call this structure a Switched Input Combining Equalizer with diversity-combining (SICE). By using an SICE, the receiver structure for combining diversity equalization can be simplified, because it needs only two receiver sections up to IF BPF. The bit error rate (BER) performance of SICE was evaluated by both computer simulation and experiment over a multipath fading channel. We experimentally confirmed the excellent BER performance, around 1% of BER over a multipath fading channel at 160Hz of maximum doppler fading frequency. Therefore, the proposed SICE is applicable to highly reliable transmission in the 1.5-GHz-band mobile radio.

This paper surveys modeling techniques for telephone call control based on a Finite State Machine (FSM) concept, and studies model simplification techniques. First, the basic concept and fundamental issues of call control modeling are described. Then, based on the analysis of layered call control configuration, it is clarified that the call control machine decomposition within the two-party service control layer has the effect of reducing the apparent size of each mate's machine. Using this effect, guidelines for call control modeling are derived, by which multiple services can be modeled independently. Finally implementation techniques and a few examples of application will be presented.

The effects of changing system parameters on job scheduling policies are studied for load balancing of multi-class jobs in a distributed computer system that consists of heterogeneous host computers connected by a single-channel communications network. A job scheduling policy decides which host should process the arriving jobs. We consider two job scheduling policies. The one is the overall optimal policy whereby jobs are scheduled so as to minimize the overall mean job response time. Tantawi and Towsley obtained the algorithm that gives the solution of the policy in the single class job environment and Kim and Kameda extended it to the multiple job class environment. The other is the individually optimal policy whereby jobs are scheduled so that every job may feel that its own expected response time is minimized. We can consider three important system parameters in a distributed computer system: the communication time of the network, the processing capacity of each node, and the job arrival rate of each node. We examine the effects of these three parameters on the two load balancing policies by numerical experiment.

A dual transformation incorporating the frequency-dependent scaling factor with the impedance dimension is proposed to synthesize the current-mode counterpart of a voltage-mode original. A general class of current-mode active-RC biquadratic filters and a switched-capacitor low-pass biquad are derived to demonstrate the synthesis procedure. Their simulation and test results show that the current transfer functions are the same as the voltage transfer functions of the originals, and thus confirm the validity of the procedure. The dual trasformation described herein is general in that with the scaling factor chosen appropriately it can meet a wide variety of circuit transformation, and thus useful also for circuit classification and identification.