Hardware Trojan (HT) has emerged as an impending security threat to hardware systems. However, conventional functional tests fail to detect HT since Trojans are triggered by rare events. Most of the existing side-channel based HT detection techniques just simply compare and analyze circuit's parameters and offer no signal calibration or error correction properties, so they suffer from the challenge and interference of large process variations (PV) and noises in modern nanotechnology which can completely mask Trojan's contribution to the circuit. This paper presents a novel HT detection method based on subspace technique which can detect tiny HT characteristics under large PV and noises. First, we formulate the HT detection problem as a weak signal detection problem, and then we model it as a feature extraction model. After that, we propose a novel subspace HT detection technique based on time domain constrained estimator. It is proved that we can distinguish the weak HT from variations and noises through particular subspace projections and reconstructed clean signal analysis. The reconstructed clean signal of the proposed algorithm can also be used for accurate parameter estimation of circuits, e.g. power estimation. The proposed technique is a general method for related HT detection schemes to eliminate noises and PV. Both simulations on benchmarks and hardware implementation validations on FPGA boards show the effectiveness and high sensitivity of the new HT detection technique.

In this paper, we present an average-case efficient algorithm to resolve the problem of determining whether two Boolean functions in trace representation are identical. Firstly, we introduce a necessary and sufficient condition for null Boolean functions in trace representation, which can be viewed as a generalization of the well-known additive Hilbert-90 theorem. Based on this condition, we propose an algorithmic method with preprocessing to address the original problem. The worst-case complexity of the algorithm is still exponential; its average-case performance, however, can be improved. We prove that the expected complexity of the refined procedure is O(n), if the coefficients of input functions are chosen i.i.d. according to the uniform distribution over F2n; therefore, it performs well in practice.

This paper reports on the image compression tolerability and high implementability of a novel proposed watermarking method that uses a morphological wavelet transform based on max-plus algebra. This algorithm is suitable for embedded low-power processors in mobile devices. For objective and unified evaluation of the capability of the proposed watermarking algorithm, we focus attention on a watermarking contest presented by the IHC, which belongs to the IEICE and investigate the image quality and tolerance against JPEG compression attack. During experiments for this contest, six benchmark images processed by the proposed watermarking is done to reduce the file size of original images to 1/10, 1/20, or less, and the error rate of embedding data is reduced to 0%. Thus, the embedded data can be completely extracted. The PSNR value is up to 54.66dB in these experiments. Furthermore, when the smallest image size is attained 0.49MB and the PSNR value become about 52dB, the proposed algorithm maintains very high quality with an error rate of 0%. Additionally, the processing time of the proposed watermarking can realize about 416.4 and 4.6 times faster than that of DCT and HWT on the ARM processor, respectively. As a result, the proposed watermarking method achieves effective processing capability for mobile processors.

We propose a novel adaptive filtering scheme named metric-combining normalized least mean square (MC-NLMS). The proposed scheme is based on iterative metric projections with a metric designed by combining multiple metric-matrices convexly in an adaptive manner, thereby taking advantages of the metrics which rely on multiple pieces of information. We compare the improved PNLMS (IPNLMS) algorithm with the natural proportionate NLMS (NPNLMS) algorithm, which is a special case of MC-NLMS, and it is shown that the performance of NPNLMS is controllable with the combination coefficient as opposed to IPNLMS. We also present an application to an acoustic echo cancellation problem and show the efficacy of the proposed scheme.

This paper presents a faster one-dimensional (1-D) phase-only correlation (POC)-based method for estimations of translations, rotation, and scaling in images. The proposed method is to project two-dimensional (2-D) images horizontally and vertically onto 1-D signals, and uses 1-D POCs of the 1-D signals to estimate the translations in images. Combined with a log-polar transform, the proposed method is extended to scaling and rotation estimations. Compared with conventional 2-D and 1-D POC-based methods, the proposed method performs in a lower computational cost. Experimental results demonstrate that the proposed method is capable of estimating large translations, rotation and scaling in images, and its accuracy is comparable to those of the conventional POC-based methods. The experimental results also show that the computational cost of the proposed method is much lower than those of the conventional POC-based methods.

This letter deals with angular position classification using the synthesized active sonar returns from targets. For the synthesis of active sonar returns, we synthesized active sonar returns based on ray tracing algorithm for 3D highlight models. Then, a fractional Fourier transform (FrFT) was applied to the sonar returns to extract the angular position information depending on the target aspect by utilizing separation capability of the time-delayed combination of linear frequency modulated (LFM) signals in the FrFT domain. With the FrFT-based features, three different target angular positions were classified using neural networks.

In this paper, we consider the problem of partitioning a given collection of node sets into k collections such that the average size of collections is the largest, where the size of a collection is defined as the cardinarity of the union of the subsets contained in the collection. More concretely, we give an upper bound on the performance ratio of an approximation algorithm proposed by Abrams et al., which is known to have a performance ratio of at least 1-1/e≅0.6321 where e is Napier's constant. The proposed upper bound is 1-(2-d+1√2)d+1/2 for any d≥1 provided that k=o(n) which approaches to 0.75 as d increases.

This paper derives the balanced realizations of second-order analog filters directly from the transfer function. Second-order analog filters are categorized into the following three cases: complex conjugate poles, distinct real poles, and multiple real poles. For each case, simple formulas are derived for the synthesis of the balanced realizations of second-order analog filters. As a result, we obtain closed form expressions of the balanced realizations of second-order analog filters.

The sparse matrix operation, y ← y+AtAx, where A is a sparse matrix and x and y are dense vectors, is a widely used computing pattern in High Performance Computing (HPC) applications. The pattern poses challenge to efficient solutions because both a matrix and its transposed version are involved. An efficient sparse matrix format, Compressed Sparse Blocks (CSB), has been proposed to provide nearly the same performance for both Ax and Atx. We develop a multithreaded implementation for the CSB format and apply it to solve y ← y+AtAx. Experiments show that our technique outperforms the Compressed Sparse Row (CSR) based solution in POSKI by up to 2.5 fold on over 70% of benchmarking matrices.

Many discrete functions are often compactly represented by Decision Diagrams (DD). The main problem in the construction of decision diagrams is the space and time requirements. While constructing a decision diagram the memory requirement may grow exponentially with the function. Also, large numbers of temporary nodes are created while constructing the decision diagram for a function. Here the problem of reducing the number of temporary nodes is addressed with respect to the PLA specification format of a function, where the function is represented using a set of cubes. Usually a DD is constructed by recursively processing the input cubes in the PLA specification. The DD, representing a sub function, is specified by a single cube. This DD is merged with a master DD, which represents the entire previously processed cubes. Thus the master DD is constructed recursively, until all the cubes in the input cube set are processed. In this paper, an efficient method is proposed, which reorders and also partitions the cube set into unequal number of cubes per subset, in such a way that, the number of temporary nodes created and the number of logical operations done, during the merging of cubes with the master DD are reduced. This results in the reduction of space and time required for the construction of DDs to a remarkable extent.

This paper describes a novel method for the bi-directional transformation between the power consumption patterns of appliances and human living activities. We have been proposing a demand-side energy management system that aims to cut down the peak power consumption and save the electric energy in a household while keeping user's quality of life based on the plan of electricity use and the dynamic priorities of the appliances. The plan of electricity use could be established in advance by predicting appliance power consumption. Regarding the priority of each appliance, it changes according to user's daily living activities, such as cooking, bathing, or entertainment. To evaluate real-time appliance priorities, real-time living activity estimation is needed. In this paper, we address the problem of the bi-directional transformation between personal living activities and power consumption patterns of appliances. We assume that personal living activities and appliance power consumption patterns are related via the following two elements: personal appliance usage patterns, and the location of people. We first propose a Living Activity - Power Consumption Model as a generative model to represent the relationship between living activities and appliance power consumption patterns, via the two elements. We then propose a method for the bidirectional transformation between living activities and appliance power consumption patterns on the model, including the estimation of personal living activities from measured appliance power consumption patterns, and the generation of appliance power consumption patterns from given living activities. Experiments conducted on real daily life demonstrate that our method can estimate living activities that are almost consistent with the real ones. We also confirm through case study that our method is applicable for simulating appliance power consumption patterns. Our contributions in this paper would be effective in saving electric energy, and may be applied to remotely monitor the daily living of older people.

As the use of information technology (IT) is explosively spreading, reducing the power consumption of IT devices such as servers has become an important social challenge. Nevertheless, while the efficiency of the power supply modules integrated into computers has recently seen significant improvements, their overall efficiency generally depends on load rates. This is especially true under low power load conditions, where it is known that efficiency decreases drastically. Recently, power-saving techniques that work by controlling the power module configuration under low power load conditions have been considered. Based on such techniques, further efficiency improvements can be expected by an adaptive efficiency controls which interlocks the real-time data processing load status with the power supply configuration control. In this study, the performance counters built into the processor of a computer are used to predict power load variations and an equation that predicts the power consumption levels is defined. In a server application experiment utilizing prototype computer hardware and regression analysis, it is validated that the equation could precisely predict processor power consumption. The evaluation shows that significant power supply efficiency improvements could be achieved especially for light load condition. The dependency of the efficiency improvement and operation period is investigated and preferable time scale of the adaptive control is proposed.

Some key challenges remain to be overcome before spectrum sensing can be widely used to identify spectrum opportunities in the TV bands. To fulfill the strict sensing requirement specified by FCC, a comprehensive sensing algorithm, which produces high SNR gain and maintains sensing robustness under complex noise conditions, needs to be implemented. In addition, carefully designed physical features and improvement on cost performance ratio are also essential if a prototype is to be commercialized. To the best of our knowledge, no success has ever been announced in developing a sensing prototype that fulfills both FCC sensing requirement and the above mentioned features. In this paper, we introduce a recently developed sensing prototype for Japanese digital TV signals of ISDB-T. The prototype operates in the Japanese UHF TV band of 470-770MHz and can reliably identify presence/absence of an ISDB-T signal at the level of -114dBm in a 6MHz channel. Moreover, it has constrained size and weight, and is capable of accurately measuring power of an ISDB-T signal at an extremely low level. Efforts on reducing cost have also been made by avoiding the use of electronic components/devices of high price. Both laboratory and field tests are performed to evaluate its sensing performance and power measurement capability. In the laboratory test, sensing performance under conditions of adjacent channel interference and frequency offset, and power measurement accuracy, are checked. In field tests, the prototype is attached in a vehicle and is checked for its capability to identify the presence of purposely broadcasted ISDB-T signals at some fixed locations and also during movement of the vehicle.

The fading channel model is seen as an important approach that can efficiently capture the basic time-varying properties of wireless channels, while physical layer security is a promising approach to providing a strong form of security. This paper focuses on the fundamental performance study of applying physical layer security to achieve secure and reliable information transmission over the fading wire-tap channel. For the practical scenario where the main channel is correlated with the eavesdropper channel but only the real time channel state information (CSI) of the main channel is known at the transmitter, we conduct a comprehensive study on the fundamental performance limits of this system by theoretically modeling its secrecy capacity, transmission outage probability and secrecy outage probability. With the help of these theoretical models, we then explore the inherent performance tradeoffs under fading wire-tap channel and also the potential impact of channel correlation on such tradeoffs.

Formalizing requirements in formal specifications is an effective way to deepen the understanding of the envisioned system and reduce ambiguities in the original requirements. However, it requires mathematical sophistication and considerable experience in using formal notations, which remains a challenge to many practitioners. To handle this challenge, this paper describes a pattern-based approach to facilitate the formalization of requirements. In this approach, a pattern system is pre-defined to guide requirements formalization where each pattern provides a specific solution for formalizing one kind of function into a formal expression. All of the patterns are classified and organized into a hierarchical structure according to the functions they can be used to formalize. The distinct characteristic of our approach is that all of the patterns are stored on computer as knowledge for creating effective guidance to facilitate the developer in requirements formalization; they are “understood” only by the computer but transparent to the developer. We also describe a prototype tool that supports the approach. It adopts Hierarchical Finite State Machine (HFSM) to represent the pattern knowledge and implements an algorithm for applying it to assist requirements formalization. Two experiments on the tool are presented to demonstrate the effectiveness of the approach.

This paper proposes a new optimization problem and several implementation algorithms for energy-efficient clouds where energy efficiency is measured by the number of physical machines that can be removed from operation and turned off. The optimization problem is formulated is such a way that solutions are considered favorable not only when the number of migrations is minimized but also when the resulting layout has more free physical machines which can therefore be turned off to save electricity.

We present an iterative method for inverse transform of nonlinear image processing. Its convergence is verified for image enhancement by an online software. We also show its application to amplification of the opacity in foggy or underwater images.

A ghost reduction algorithm for multiple angle sensors tracking objects under dual hypotheses is proposed. When multiple sensors and multiple objects exist on the same plane, the conventional method is unable to distinguish the real objects and ghosts from all possible pairs of measurement angle vectors. In order to resolve the issue stated above, the proposed algorithm utilizes tracking process considering dual hypotheses of real objects and ghosts behaviors. The proposed algorithm predicts dynamics of all the intersections of measurement angle vector pairs with the hypotheses of real objects and ghosts. Each hypothesis is evaluated by the residuals between prediction data and intersection. The appropriate hypothesis is extracted trough several data sampling. Representative simulation results demonstrate the effectiveness of the proposed algorithm.

Spectrum sensing is one of the methods to identify available white spaces for secondary usage which was specified by the regulators. However, signal quality to be sensed can plunge to a very low signal-to-noise-ratio due to signal propagation and hence readings from individual sensors will be unreliable. Distributed sensing by the cooperation of multiple sensors is one way to cope with this problem because the diversity gain due to the combining effect of data captured at different position will assist in detecting signals that might otherwise not be detected by a single sensor. In effect, the probability of detection can be improved. We have implemented a distributed sensing system to evaluate the performance of different cooperative sensing algorithms. In this paper we describe our implementation and measurement experience which include the system design, specification of the system, measurement method, the issues and solutions. This paper also confirms the performance enhancement offered by distributed sensing algorithms, and describes several ideas for further enhancement of the sensing quality.

Single view distributed video coding (DVC) is a coding method that allows for the computational complexity of the system to be shifted from the encoder to the decoder. This property promotes the use of DVC in systems where processing power or energy use at the encoder is constrained. Examples include wireless devices and surveillance. This paper proposes a multi-hypothesis transform domain single-view DVC system that performs symbol level coding with a non-binary low-density parity-check code. The main contributions of the system relate to the methods used for combining multiple side information hypotheses at the decoder. The system also combines interpolation and extrapolation in the side information creation process to improve the performance of the system over larger group-of-picture sizes.