This paper provides a new method to implement substrate integrated defected ground structure (SIDGS)-based bandpass filter (BPF) with adjustable frequency and controllable bandwidth. Compared with previous literature, this method implements a new SIDGS-like resonator capable of tunable frequency in the same plane as the slotted line using a varactor diode, increasing the design flexibility. In addition, the method solves the problem that the tunable BPF constituted by the SIDGS resonator cannot control the bandwidth by introducing a T-shaped non-resonant unit. The theoretical design method and the structural design are shown. Moreover, the configured structure is fabricated and measured to show the validity of the design method in this paper.

We developed a self-controllable voltage level (SVL) circuit and applied this circuit to a single-power-supply, six-transistor complementary metal-oxide-semiconductor static random-access memory (SRAM) to not only improve both write and read performances but also to achieve low standby power and data retention (holding) capability. The SVL circuit comprises only three MOSFETs (i.e., pull-up, pull-down and bypass MOSFETs). The SVL circuit is able to adaptively generate both optimal memory cell voltages and word line voltages depending on which mode of operation (i.e., write, read or hold operation) was used. The write margin (VWM) and read margin (VRM) of the developed (dvlp) SRAM at a supply voltage (VDD) of 1V were 0.470 and 0.1923V, respectively. These values were 1.309 and 2.093 times VWM and VRM of the conventional (conv) SRAM, respectively. At a large threshold voltage (Vt) variability (=+6σ), the minimum power supply voltage (VMin) for the write operation of the conv SRAM was 0.37V, whereas it decreased to 0.22V for the dvlp SRAM. VMin for the read operation of the conv SRAM was 1.05V when the Vt variability (=-6σ) was large, but the dvlp SRAM lowered it to 0.41V. These results show that the SVL circuit expands the operating voltage range for both write and read operations to lower voltages. The dvlp SRAM reduces the standby power consumption (PST) while retaining data. The measured PST of the 2k-bit, 90-nm dvlp SRAM was only 0.957µW at VDD=1.0V, which was 9.46% of PST of the conv SRAM (10.12µW). The Si area overhead of the SVL circuits was only 1.383% of the dvlp SRAM.

Multiplication is a key fundamental function for many error-tolerant applications. Approximate multiplication is considered to be an efficient technique for trading off energy against performance and accuracy. This paper proposes an accuracy-controllable multiplier whose final product is generated by a carry-maskable adder. The proposed scheme can dynamically select the length of the carry propagation to satisfy the accuracy requirements flexibly. The partial product tree of the multiplier is approximated by the proposed tree compressor. An 8×8 multiplier design is implemented by employing the carry-maskable adder and the compressor. Compared with a conventional Wallace tree multiplier, the proposed multiplier reduced power consumption by between 47.3% and 56.2% and critical path delay by between 29.9% and 60.5%, depending on the required accuracy. Its silicon area was also 44.6% smaller. In addition, results from two image processing applications demonstrate that the quality of the processed images can be controlled by the proposed multiplier design.

Amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistor (TFT) was fabricated by an advanced self-aligned imprint lithography (ASAIL) method with a hybrid etching process. The SAIL is a top-down method to fabricate a TFT using a three-dimensional multilayer etch mask having all pattern information for the TFT. The hybrid etching process was newly applied in the original SAIL process for the purpose of reducing plasma damage of a-IGZO channel layer during plasma etching in the ASAIL process. This research demonstrated that the a-IGZO TFT could be successfully fabricated by the ASAIL process. In particular, the hybrid etching process applied in this paper can be utilized for the back-channel-etch type a-IGZO TFT and further extended for the roll-to-roll backplane process.

We developed and applied a new circuit, called the “Self-controllable Voltage Level (SVL)” circuit, not only to expand both “write” and “read” stabilities, but also to achieve a low stand-by power and data holding capability in a single low power supply, 90-nm, 2-kbit, six-transistor CMOS SRAM. The SVL circuit can adaptively lower and higher the word-line voltages for a “read” and “write” operation, respectively. It can also adaptively lower and higher the memory cell supply voltages for the “write” and “hold” operations, and “read” operation, respectively. This paper focuses on the “hold” characteristics and the standby power dissipations (PST) of the developed SRAM. The average PST of the developed SRAM is only 0.984µW, namely, 9.57% of that (10.28µW) of the conventional SRAM at a supply voltage (VDD) of 1.0V. The data hold margin of the developed SRAM is 0.1839V and that of the conventional SRAM is 0.343V at the supply voltage of 1.0V. An area overhead of the SVL circuit is only 1.383% of the conventional SRAM.

We have demonstrated tunable extit{n}-channel fullerene and extit{p}-channel pentacene OFETs and CMOS inverter circuit based on a bilayer-dielectric structure of CYTOP (poly(perfluoroalkenyl vinyl ether)) electret and SiO$_{2}$. For both OFET types, the $V_{mathrm{th}}$ can be electrically tuned thanks to the charge-trapping at the interface of CYTOP and SiO$_{2}$. The stability of the shifted $V_{mathrm{th}}$ was investigated through monitoring a change in transistor current. The measured transistor current versus time after programming fitted very well with a stretched-exponential distribution with a long time constant up to 10$^{6}$ s. For organic CMOS inverter, after applying the program gate voltages for extit{n}-channel fullerene or extit{p}-channel pentacene elements, the voltage transfer characteristics were shifted toward more positive values, resulting in a modulation of the noise margin. We realized that at a program gate voltage of 60,V for extit{p}-channel OFET, the circuit switched at 4, 8,V, that is close to half supply voltage $V_{mathrm{DD}}$, leading to the maximum electrical noise immunity of the inverter circuit.

Hyperthermia is one of the modalities for cancer treatment, utilizing the difference of thermal sensitivity between tumor and normal tissue. Interstitial microwave hyperthermia is one of the heating schemes and it is applied to a localized tumor. In the treatments, heating pattern control around antennas are important, especially for the treatment in and around critical organs. This paper introduces a coaxial-dipole antenna, which is one of the thin microwave antennas and can generate a controllable heating pattern. Moreover, generations of an arbitrary shape heating patterns by an array applicator composed of four coaxial-dipole antennas are described.

The Processing of high-dynamic-range (HDR) images is embodied by a lot of algorithms. This paper takes notice of one of these algorithms which is presented using the iCAM06. iCAM06 is capable of making color appearance predictions of HDR images based on CIECAM02 color predictions and incorporating spatial process models in the human visual system (HVS) for contrast enhancement. The effect of user controllable factors of iCAM06 was investigated and the best factor which corresponds with Breneman's corresponding color data sets was found. A suggested model improves color matching predictions for the corresponding color data set in Breneman's experiment.

We study computation of a controllable sublanguage of a given non-prefix-closed regular specification language for an unbounded Petri net. We approximate the generated language of the unbounded Petri net by a regular language, and compute the supremal controllable sublanguage of the specification language with respect to the regular language approximation. This computed language is a controllable sublanguage with respect to the original generated language of the unbounded Petri net, but is not necessarily the supremal one. We then present a sufficient condition under which the computed sublanguage is the supremal controllable sublanguage with respect to the original generated language of the unbounded Petri net.

Novel microstrip dual-band bandpass filters with controllable fractional bandwidths and good in-between isolation are presented and implemented. A half-wavelength stepped-impedance resonator is firstly characterized, aiming at producing the two resonant frequencies at 2.4 and 5.2 GHz. Two types of coupled microstrip lines in the parallel and anti-parallel formats are then investigated in terms of unified equivalent J-inverter network. Extensive results are derived to quantitatively show their distinctive frequency-distributed coupling performances under different coupling lengths. The coupling degrees of these two coupled lines at the two resonances are properly adjusted to achieve the dual-passband response with varied or tunable bandwidths. In addition, the parallel coupled line is modeled to bring out a transmission zero between the two resonances so as to achieve the good in-between isolation. The three two-stage bandpass filters are initially designed to exhibit their dual-band response with changeable dual-band bandwidths. A three-stage dual-band filter is in final optimally designed and its predicted performance is confirmed in experiment.

It is shown that bounded impulse action can be combined with usual bang-bang control input to minimize the performance index. Especially for unstable oscillators, the size of controllable region can be increased. We present results on how to minimize the performance index using both ordinary bang-bang control and impulse actions with a recharge constraint on impulse firing. Following the maximum principle and necessary conditions induced from usual perturbation arguments, the mixed control input (bang-bang and impulse actions) is represented in adjoint state and then state variable feedback form. Simulation results show how the switch curves can be used to determine the optimal control value.

The supervisory control theory of discrete event dynamic systems was proposed in the framework of automata and formal languages. The concept of decentralized supervisory control was developed for the local supervisor Si whose concurrent operation results in the closed-loop language L (Si/G) equal to that of global supervisor, L (S/G). In this letter we extend this concept by considering the problem of optinal combination of decentralized with centralized control in case pure decentralized control happens to be inadequate. We introduce the concept of locally controllable complementary tuple and present an analytical framework for nonhomogeneous decentralized supervisory control systems.

An optoelectronic beam forming network (BFN) is presented for a single beam, 3-element phased array antenna that utilizes electrically controllable birefringence mode nematic liquid-crystal cells (ECB mode NLC cells) for phase shifting and amplitude control. In the circuit, a microwave signal is carried by a pair of orthogonal linearly polarized lightwaves (signal and reference lightwaves) using the optical heterodyning technique. Birefringence of liquid-crystals is utilized to selectively control the phase of the signal and reference lightwaves. Because an interferometer is formed on a single signal path, the complexity of the optical circuit is much reduced, compared to the BFNs based on arrays of Mach-Zender interferometers. A prototype circuit is built using laser sources of 1.3 µm, and its performance experimentally examined. With small deviations among the three cells, phase shifts of up to 240 degrees are achived for MW signals from 0.9 GHz to 20 GHz with good stability; attenuation of more than 18dB is achieved. An optoelectronic technique for parallel control of amplitude and phase of MW signals was developed.