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[Keyword] system(3183hit)

881-900hit(3183hit)

  • Simplified Relative Model to Measure Visual Fatigue in a Stereoscopy

    Jae Gon KIM  Jun-Dong CHO  

     
    LETTER

      Vol:
    E94-A No:12
      Page(s):
    2830-2831

    In this paper, we propose a quantitative metric of measuring the degree of the visual fatigue in a stereoscopy. To the best of our knowledge, this is the first simplified relative quantitative approach describing visual fatigue value of a stereoscopy. Our experimental result shows that the correlation index of more than 98% is obtained between our Simplified Relative Visual Fatigue (SRVF) model and Mean Opinion Score (MOS).

  • On Improving the Reliability and Performance of the YAFFS Flash File System

    Seungjae BAEK  Heekwon PARK  Jongmoo CHOI  

     
    LETTER-Software System

      Vol:
    E94-D No:12
      Page(s):
    2528-2532

    In this paper, we propose three techniques to improve the performance of YAFFS (Yet Another Flash File System), while enhancing the reliability of the system. Specifically, we first propose to manage metadata and user data separately on segregated blocks. This modification not only leads to the reduction of the mount time but also reduces the garbage collection time. Second, we tailor the wear-leveling to the segregated metadata and user data blocks. That is, worn out blocks between the segregated blocks are swapped, which leads to more evenly worn out blocks increasing the lifetime of the system. Finally, we devise an analytic model to predict the expected garbage collection time. By accurately predicting the garbage collection time, the system can perform garbage collection at more opportune times when the user's perceived performance may not be negatively affected. Performance evaluation results based on real implementations show that our modifications enhance performance and reliability without incurring additional overheads. Specifically, the YAFFS with our proposed techniques outperforms the original YAFFS by six times in terms of mount speed and five times in terms of benchmark performance, while reducing the average erase count of blocks by 14%.

  • Adaptive Spatial Other Cell Interference Cancelation for Multiuser Multi-Cell Cooperating System

    Jin-Hee LEE  Young-Chai KO  

     
    PAPER

      Vol:
    E94-B No:12
      Page(s):
    3232-3238

    In multi-cell wireless systems with insufficient frequency reuse, the downlink transmission suffers from other cell interference (OCI). The cooperative transmission among multiple base stations is an effective way to mitigate OCI and increase the system sum rate. An adaptive scheme for serving one user in each cell was proposed in [1]. In this paper, we generalize the scheme in [1] by serving more than one user in each cell with adaptive OCI cancelation. Based on our derived statistics of a user for different transmission strategies, we propose a low complexity transmission scheme that achieves near-maximal ergodic sum rate. Through numerical examples, we show that the system sum rate can be improved by selecting the appropriate transmission strategy combination adaptively. As a result, our proposed system can explore spatial multiplexing gain without additional power and thus improves the system sum rate significantly.

  • Checking On-the-Fly Universality and Inclusion Problems of Visibly Pushdown Automata

    Nguyen VAN TANG  Hitoshi OHSAKI  

     
    PAPER

      Vol:
    E94-A No:12
      Page(s):
    2794-2801

    Visibly pushdown automata (VPA), introduced by Alur and Madhusuan in 2004, is a subclass of pushdown automata whose stack behavior is completely determined by the input symbol according to a fixed partition of the input alphabet. Since it was introduced, VPA have been shown to be useful in various contexts, e.g., as specification formalism for verification and as an automaton model for processing XML streams. However, implementation of formal verification based on VPA framework is a challenge. In this paper, we propose on-the-fly algorithms to test universality and inclusion problems of this automata class. In particular, we first present a slight improvement on the upper bound for determinization of VPA. Next, in order to check universality of a nondeterministic VPA, we simultaneously determinize this VPA and apply the P-automata technique to compute a set of reachable configurations of the target determinized VPA. When a rejecting configuration is found, the checking process stops and reports that the original VPA is not universal. Otherwise, if all configurations are accepting, the original VPA is universal. Furthermore, to strengthen the algorithm, we define a partial ordering over transitions of P-automaton, and only minimal transitions are used to incrementally generate the P-automaton. The purpose of this process is to keep the determinization step implicitly for generating reachable configurations as minimum as possible. This improvement helps to reduce not only the size of the P-automaton but also the complexity of the determinization phase. We implement the proposed algorithms in a prototype tool, named VPAchecker. Finally, we conduct experiments on randomly generated VPA. The experimental results show that the proposed method outperforms the standard one by several orders of magnitude.

  • A Verification and Analysis Tool Set for Embedded System Design

    Yuichi NAKAMURA  

     
    INVITED PAPER

      Vol:
    E94-A No:12
      Page(s):
    2788-2793

    This paper presents a verification and analysis tool set for embedded systems. Recently, the development scale of embedded systems has been increasing since they are used for mobile systems, automobile platforms, and various consumer systems with rich functionality. This has increased the amount of time and cost needed to develop them. Consequently, it is very important to develop tools to reduce development time and cost. This paper describes a tool set consisting of three tools to enhance the efficiency of embedded system design. The first tool is an integrated tool platform. The second is a remote debugging system. The third is a clock-accurate verification system based on a field-programmable gate array (FPGA) for custom embedded systems. This tool set promises to significantly reduce the time and cost needed to develop embedded systems.

  • A Tracking System Using a Differential Detector for M-ary Bi-orthogonal Spread Spectrum Communication Systems

    Junya KAWATA  Kouji OHUCHI  Hiromasa HABUCHI  

     
    PAPER

      Vol:
    E94-A No:12
      Page(s):
    2737-2745

    As an application of the direct sequence spread spectrum (SS) communication system, there is an M-ary bi-orthogonal SS communication system. In its system, several spreading sequences (bi-orthogonal sequences) are used in a code shift keying basis. Hence, design of the spreading code synchronization system has been an issue in the M-ary bi-orthogonal SS systems. In this paper, the authors focus on a code tracking system using a differential detector and a Delay Lock Loop (DLL). They investigate a tracking performance of their code tracking system by theoretical analysis. In addition, a multi-stage interference canceler is applied to the M-ary bi-orthogonal SS system. As the result, it is shown that the tracking performance of the theoretical analysis is almost the same as that of computer simulations in a multi-user environment. It is also shown that the multi-stage interference canceler is effective in improvement of the BER performance.

  • Implementation of Stack Data Placement and Run Time Management Using a Scratch-Pad Memory for Energy Consumption Reduction of Embedded Applications

    Lovic GAUTHIER  Tohru ISHIHARA  

     
    PAPER-High-Level Synthesis and System-Level Design

      Vol:
    E94-A No:12
      Page(s):
    2597-2608

    Memory accesses are a major cause of energy consumption for embedded systems. This paper presents the implementation of a fully software technique which places stack and static data into a scratch-pad memory (SPM) in order to reduce the energy consumed by the processor while accessing them. Since an SPM is usually too small to include all these data, some of them must be left into the external main memory (MM). Therefore, further energy reduction is achieved by moving some stack data between both memories at run time. The technique employs integer linear programming in order to find at compile time the optimal placement of static data and management of the stack and implements it by inserting stack operations inside the code. Experimental results show that with an SPM of only 1 KB, our technique is able to exploit it for reducing the energy consumption related to the static and stack data accesses by more than 90% for several applications and on an average by 57% compared to the case where these data are fully placed into the main memory.

  • A Visual Perception Based View Navigation Trick Mode in the Panoramic Video Streaming Service

    Joo Myoung SEOK  Junggon KO  Younghun LEE  Doug Young SUH  

     
    LETTER-Multimedia Systems for Communications

      Vol:
    E94-B No:12
      Page(s):
    3631-3634

    For the panoramic video streaming service, this letter proposes a visual perception-based view navigation trick mode (VP-VNTM) that reduces bandwidth requirements by adjusting the quality of transmitting views in accordance with the view navigation velocity without decreasing the user's visual sensitivity. Experiments show that the proposed VP-VNTM reduces bandwidth requirements by more than 44%.

  • Fairness-Aware Superposition Coded Scheduling for a Multi-User Cooperative Cellular System

    Megumi KANEKO  Kazunori HAYASHI  Petar POPOVSKI  Hideaki SAKAI  

     
    PAPER

      Vol:
    E94-B No:12
      Page(s):
    3272-3279

    We consider Downlink (DL) scheduling for a multi-user cooperative cellular system with fixed relays. The conventional scheduling trend is to avoid interference by allocating orthogonal radio resources to each user, although simultaneous allocation of users on the same resource has been proven to be superior in, e.g., the broadcast channel. Therefore, we design a scheduler where in each frame, two selected relayed users are supported simultaneously through the Superposition Coding (SC) based scheme proposed in this paper. In this scheme, the messages destined to the two users are superposed in the modulation domain into three SC layers, allowing them to benefit from their high quality relayed links, thereby increasing the sum-rate. We derive the optimal power allocation over these three layers that maximizes the sum-rate under an equal rates' constraint. By integrating this scheme into the proposed scheduler, the simulation results show that our proposed SC scheduler provides high throughput and rate outage probability performance, indicating a significant fairness improvement. This validates the approach of simultaneous allocation versus orthogonal allocation in the cooperative cellular system.

  • Amortized Linux Ext3 File System with Fast Writing after Editing for WinXP-Based Multimedia Application

    Seung-Wan JUNG  Young Jin NAM  Dae-Wha SEO  

     
    PAPER-Image Processing and Video Processing

      Vol:
    E94-D No:11
      Page(s):
    2259-2270

    Recently, the need for multimedia devices, such as mobile phones, digital TV, PMP, digital camcorders, digital cameras has increased. These devices provide various services for multimedia file manipulation, allowing multimedia contents playback, multimedia file editing, etc. Additionally, digital TV provides a recorded multimedia file copy to a portable USB disk. However, Linux Ext3 file system, as employed by these devices, has a lot of drawbacks, as it required a considerable amount of time and disk I/Os to store large-size edited multimedia files, and it is hard to access for typical PC users. Therefore, in this paper a design and implementation of an amortized Ext3 with FWAE (Fast Writing-After-Editing) for WinXP-based multimedia applications is described. The FWAE is a fast and efficient multimedia file editing/storing technique for the Ext3 that exploits inode block pointer re-setting and shared data blocks by simply modifying metadata information. Individual experiments in this research show that the amortized Ext3 with FWAE for WinXP not only dramatically improves written performance of the Ext3 by 16 times on average with various types of edited multimedia files but also notably reduces the amount of consumed disk space through data block sharing. Also, it provides ease and comfort to use for typical PC users unfamiliar with Linux OS.

  • Analyzing Emergence in Complex Adaptive System: A Sign-Based Model of Stigmergy

    Chuanjun REN  Xiaomin JIA  Hongbing HUANG  Shiyao JIN  

     
    PAPER-Artificial Intelligence, Data Mining

      Vol:
    E94-D No:11
      Page(s):
    2212-2218

    The description and analysis of emergence in complex adaptive system has recently become a topic of great interest in the field of systems, and lots of ideas and methods have been proposed. A Sign-based model of Stigmergy is proposed in this paper. Stigmergy is widely used in complex systems. We pick up “Sign” as a key notion to understand it. A definition of “Sign” is given, which reveals the Sign's nature and exploit the significations and relationships carried by the “Sign”. Then, a Sign-based model of Stigmergy is consequently developed, which captures the essential characteristics of Stigmergy. The basic architecture of Stigmergy as well as its constituents are presented and then discussed. The syntax and operational semantics of Stigmergy configurations are given. We illustrate the methodology of analyzing emergence in CAS by using our model.

  • Modeling and Analysis for Universal Plug and Play Using PIPE2

    Cheng-Min LIN  Shyi-Shiou WU  Tse-Yi CHEN  

     
    PAPER-Computer System

      Vol:
    E94-D No:11
      Page(s):
    2184-2190

    Universal Plug and Play (UPnP) allows devices automatic discovery and control of services available in those devices connected to a Transmission Control Protocol/ Internet Protocol (TCP/IP) network. Although many products are designed using UPnP, little attention has been given to UPnP related to modeling and performance analysis. This paper uses a framework of Generalized Stochastic Petri Net (GSPN) to model and analyze the behavior of UPnP systems. The framework includes modeling UPnP, reachability decomposition, GSPN analysis, and reward assignment. Then, the Platform Independent Petri net Editor 2 (PIPE2) tool is used to model and evaluate the controllers in terms of power consumption, system utilization and network throughput. Through quantitative analysis, the steady states in the operation and notification stage dominate the system performance, and the control point is better than the device in power consumption but the device outperforms the control point in evaluating utilization. The framework and numerical results are useful to improve the quality of services provided in UPnP devices.

  • Performance Analysis of Base Station Cooperation in Multiantenna Cellular System

    Tetsuki TANIGUCHI  Yoshio KARASAWA  Nobuo NAKAJIMA  

     
    PAPER-Communication Theory and Signals

      Vol:
    E94-A No:11
      Page(s):
    2254-2262

    In cellular systems, particular in the cell edge, the user terminals (UTs) are suffered from the attenuation of the signal from their target base station (BS) and the relatively strong interferences from BSs of other users. This paper investigates the performance improvement under this bad situation by BS cooperation (BSC) in the downlink scenario using multiantenna transmission assuming the perfect channel state information (CSI), and compares the effectiveness of several strategies based on a three cell model. Through computer simulations, the performance improvement by BSC is verified. Then the result is extended to multiple stream transmission utilizing the feature of multiantenna, and advantage of BSC with data sharing is shown.

  • Performance Analysis of Two-Hop Cellular Systems in Transparent and Non-transparent Modes

    Se-Jin KIM  Seung-Yeon KIM  Ryong OH  Seungwan RYU  Hyong-Woo LEE  Choong-Ho CHO  

     
    PAPER-Terrestrial Wireless Communication/Broadcasting Technologies

      Vol:
    E94-B No:11
      Page(s):
    3107-3115

    In this paper, we evaluate the downlink performance of Transparent mode (T-mode) and Non-Transparent mode (NT-mode) in a two-hop cellular system based on IEEE 802.16j. In particular, we evaluate the performance in terms of the system capacity, optimal resource allocation, and outage probability using Monte Carlo simulation with various system parameters such as different Frequency Reuse Factors (FRFs) and the distance between Base Station (BS) and Relay Station (RS). To analyze the Signal to Interference and Noise Ratio (SINR) of the access and relay links, an SINR model is introduced for cellular multihop systems considering intra- and inter-cell interferences. Then, we present a method of optimal resource allocation for the Access Zone (AZ) and Relay Zone (RZ) to maximize the system capacity. Consequently, the simulation results provide an insight into choosing the appropriate RS position and optimal resource allocation. Through numerical examples, it is found that the FRFs of two and three are good choices to achieve the highest capacity with low outage in T- and NT-modes, respectively.

  • BER Analysis for a QPSK DS-CDMA System over Rayleigh Channel with a NBI Suppression Complex Adaptive IIR Notch Filter

    Aloys MVUMA  Shotaro NISHIMURA  Takao HINAMOTO  

     
    PAPER-Digital Signal Processing

      Vol:
    E94-A No:11
      Page(s):
    2369-2375

    In this paper, analysis of average bit error ratio (BER) performance of a quadriphase shift keying (QPSK) direct-sequence code-division multiple-access (DS-CDMA) system with narrow-band interference (NBI) suppression complex adaptive infinite-impulse response (IIR) notch filter is presented. QPSK DS-CDMA signal is transmitted over a Rayleigh frequency-nonselective fading channel and the NBI has a randomly-varying frequency. A closed-form expression that relates BER with complex coefficient IIR notch filter parameters, received signal-to-noise ratio (SNR), number of DS-CDMA active users and processing gain is derived. The derivation is based on the Standard Gaussian Approximation (SGA) method. Accuracy of the BER expression is confirmed by computer simulation results.

  • Indoor Positioning System Using Digital Audio Watermarking

    Yuta NAKASHIMA  Ryosuke KANETO  Noboru BABAGUCHI  

     
    PAPER-Information Network

      Vol:
    E94-D No:11
      Page(s):
    2201-2211

    Recently, a number of location-based services such as navigation and mobile advertising have been proposed. Such services require real-time user positions. Since a global positioning system (GPS), which is one of the most well-known techniques for real-time positioning, is unsuitable for indoor uses due to unavailability of GPS signals, many indoor positioning systems (IPSs) using WLAN, radio frequency identification tags, and so forth have been proposed. However, most of them suffer from high installation costs. In this paper, we propose a novel IPS for real-time positioning that utilizes a digital audio watermarking technique. The proposed IPS first embeds watermarks into an audio signal to generate watermarked signals, each of which is then emitted from a corresponding speaker installed in a target environment. A user of the proposed IPS receives the watermarked signals with a mobile device equipped with a microphone, and the watermarks are detected in the received signal. For positioning, we model various effects upon watermarks due to propagation in the air, i.e., delays, attenuation, and diffraction. The model enables the proposed IPS to accurately locate the user based on the watermarks detected in the received signal. The proposed IPS can be easily deployed with a low installation cost because the IPS can work with off-the-shelf speakers that have been already installed in most of the indoor environments such as department stores, amusement arcades, and airports. We experimentally evaluate the accuracy of positioning and show that the proposed IPS locates the user in a 6 m by 7.5 m room with root mean squared error of 2.25 m on average. The results also demonstrate the potential capability of real-time positioning with the proposed IPS.

  • A Low-Noise, High-Gain Quasi-Millimeter-Wave Receiver MMIC with a Very High Degree of Integration Using 3D-MMIC Technology

    Takana KAHO  Yo YAMAGUCHI  Kazuhiro UEHARA  Kiyomichi ARAKI  

     
    PAPER-Active Devices and Circuits

      Vol:
    E94-C No:10
      Page(s):
    1548-1556

    We present a highly integrated quasi-millimeter-wave receiver MMIC that integrates 22 circuits in a 3 2.3 mm area using three-dimensional MMIC (3D-MMIC) technology. The MMIC achieves low noise (3 dB) and high gain (41 dB) at 26 GHz by using an on-chip image reject filter. It integrates a multiply-by-eight (X8) local oscillator (LO) chain with the IF frequency of the 2.4 GHz band and can use low-cost voltage-controlled oscillators (VCOs) and demodulators in a 2–3 GHz frequency band. Multilayer inductors contribute to the miniaturization especially in a 2–12 GHz frequency band. Furthermore, it achieves a high dynamic range by using two step attenuators with a new built-in inverter using an N-channel depression field-effect transistor (FET). The power consumption of the MMIC is only 450 mW.

  • A Wide Tuning Range CMOS Quadrature Ring Oscillator with Improved FoM for Inductorless Reconfigurable PLL

    Ramesh K. POKHAREL  Shashank LINGALA  Awinash ANAND  Prapto NUGROHO  Abhishek TOMAR  Haruichi KANAYA  Keiji YOSHIDA  

     
    PAPER-Active Devices and Circuits

      Vol:
    E94-C No:10
      Page(s):
    1524-1532

    This paper presents the design and implementation of a quadrature voltage-controlled ring oscillator with the improved figure of merit (FOM) using the four single-ended inverter topology. Furthermore, a new architecture to prevent the latch-up in even number of stages composed of single-ended ring inverters is proposed. The design is implemented in 0.18 µm CMOS technology and the measurement results show a FOM of -163.8 dBc/Hz with the phase noise of -125.8 dBc/Hz at 4 MHz offset from the carrier frequency of 3.4 GHz. It exhibits a frequency tuning range from 1.23 GHz to 4.17 GHz with coarse and fine frequency tuning sensitivity of 1.08 MHz/mV and 120 kHz/mV, respectively.

  • Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems

    Hideki TAKASE  Hiroyuki TOMIYAMA  Hiroaki TAKADA  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E94-A No:10
      Page(s):
    1954-1964

    Energy minimization has become one of the primary goals in the embedded real-time domains. Consequently, scratch-pad memory has been employed as partial or entire replacement for cache memory due to its better energy efficiency. However, most previous approaches were not applicable to a preemptive multi-task environment. We propose three methods of partitioning and allocation of scratch-pad memory for fixed-priority-based preemptive multi-task systems. The three methods, i.e., spatial, temporal, and hybrid methods, achieve energy reduction in the instruction memory subsystems. With the spatial method, each task occupies its exclusive space in scratch-pad memory. With the temporal method, the running task uses entire scratch-pad space. The content of scratch-pad memory is swapped out as a task executes or gets preempted. The hybrid method is based on the spatial one but a higher priority task can temporarily use the space of lower priority task. The amount of space is prioritized for higher priority tasks. We formulate each method as an integer programming problem that simultaneously determines (1) partitioning of scratch-pad memory space for the tasks, and (2) allocation of program code to scratch-pad memory space for each task. Our methods not only support the real-time task scheduling but also consider aggressively the periods and priorities of tasks for the energy minimization. Additionally, we implement an RTOS-hardware cooperative support mechanism for runtime code allocation to the scratch-pad memory space. We have made the experiments with the fully functional real-time operating system. The experimental results have demonstrated the effectiveness of our techniques. Up to 73% energy reduction compared to a conventional method was achieved.

  • Kernel Optimization Based Semi-Supervised KBDA Scheme for Image Retrieval

    Xu YANG  Huilin XIONG  Xin YANG  

     
    PAPER

      Vol:
    E94-D No:10
      Page(s):
    1901-1908

    Kernel biased discriminant analysis (KBDA), as a subspace learning algorithm, has been an attractive approach for the relevance feedback in content-based image retrieval. Its performance, however, still suffers from the “small sample learning” problem and “kernel learning” problem. Aiming to solve these problems, in this paper, we present a new semi-supervised scheme of KBDA (S-KBDA), in which the projection learning and the “kernel learning” are interweaved into a constrained optimization framework. Specifically, S-KBDA learns a subspace that preserves both the biased discriminant structure among the labeled samples, and the geometric structure among all training samples. In kernel optimization, we directly optimize the kernel matrix, rather than a kernel function, which makes the kernel learning more flexible and appropriate for the retrieval task. To solve the constrained optimization problem, a fast algorithm based on gradient ascent is developed. The image retrieval experiments are given to show the effectiveness of the S-KBDA scheme in comparison with the original KBDA, and the other two state-of-the-art algorithms.

881-900hit(3183hit)