A numerical model of thin-film transistors for circuit simulation has been developed. This model utilizes three schemes. First, the spline interpolation with transformation by y=x+log(x) achieves excellent preciseness for both on-current and off-current simultaneously. Second, the square polynomial supplement solves an anomaly near the points where drain voltage equal to zero. Third, the linear extrapolation achieves continuities of the current and its derivatives as a function of voltages out of the area where the spline interpolation is performed, and improves convergence during circuit simulation.

Thin-film electroluminescent (TFEL) devices have been newly developed using Y2GeO5 oxide phosphor thin films prepared by r.f. magnetron sputtering. Multicolor emissions were observed in TFEL devices fabricated using various impurity-activated Y2GeO5 phosphor thin films. A high-luminance TFEL device was fabricated using a Y2GeO5:Mn thin film prepared with a Mn content of 2 at.% and postannealed at 1020: luminances of 414 and 3020 cd/m2 and luminous efficiencies of 6.7 and 0.93 lm/W for yellow emission when driven at 60 Hz and 1 kHz, respectively. Newly developed oxide Y2GeO5:Mn phosphors are very promising for use as the thin-film emitting layer of TFEL devices.

Co-containing ferrite thin-film media deposited by a reactive-ECR-sputtering at a low substrate temperature of 150 degree Celsius were oxidized by ECR plasma. The magnetic properties and recording characteristics of the media were improved by the oxidation with maintaining a smooth surface. The media showed high D50 of 203 kFRPI in MIG head recording and reproduction. The Co-containing ferrite thin-film is feasible to be used as a protective overcoat layer.

The authors have developed V-band high electron mobility transistor (HEMT) MMICs adopting benzo-cyclo-butene (BCB) thin-film layers on GaAs substrates. Since the BCB thin-film layers, which can change the thickness of arbitrary parts on a circuit, are used for these MMICs, both a thin-film microstrip (TFMS) line, offering the advantages of great flexibility in layout and small size, and a coplanar waveguide (CPW), offering the advantage of low loss, can be used according to the purpose of the MMIC. Here we introduce the four types of V-band MMICs that we fabricated: low noise amplifier (LNA), mixer, voltage controlled oscillator (VCO), and power amplifier (PA). The optimum transmission lines were chosen from the TFMS line and the CPW for these MMICs. Miniaturization of the LNA MMIC and the mixer MMIC were attained by adopting the TFMS line, whereas adoption of the CPW enabled the VCO MMIC to achieve high performance. These results indicate that it is important to choose the optimum transmission line according to the purpose of the circuit function for each MMIC. It was confirmed that these newly developed MMICs using the BCB thin-film dielectric layers are attractive for millimeter-wave applications.

Employing reactive sputtering using an electron-cyclotron-resonance microwave plasma without oxidation process, high coercivity ferrite thin-films with perpendicular magnetic anisotropy were successfully prepared without NiO underlayer at low substrate temperature. The ferrite thin-film deposited on glass substrate had smooth surface and were composed of small grains. Perpendicular recording was performed on the ferrite thin-film hard disk. The ferrite thin-films with high coercivity could be prepared on flexible film substrates (Polyimide and PET).

In this letter, we describe a four thin-film-transistor (TFT) pixel circuit based on hydrogenated amorphous silicon (a-Si:H) technology for the active-matrix organic light-emitting diode (AMOLED) display applications. The circuit uses current-writing mechanism and can automatically adjust the threshold-voltage shifts of both the organic light-emitting diodes (OLEDs) and the TFTs induced by the circuit aging or process variations. Experimental results indicate virtually no variation of the output driving current after long-term bias-temperature-stress (BTS).

Thin-film slot-array receiving antennas fed by coplanar waveguide (CPW) were fabricated on fused quartz substrates, and the antenna properties were investigated at 700 GHz. It was confirmed that the transmission efficiency of CPW was 0.83/λm, and the rate of radiated power from a slot antenna was 0.5 at 700 GHz. The fabricated antennas worked as expected from the theory based on the transmission line model, and the two-dimensional 83 slot-array antenna fed by CPW increased the power gain by 11 dB over a single-slot antenna. The power gain of the antenna was 13 dBi and the aperture efficiency was 40% when the 700 GHz-submillimeter wave was irradiated through the substrate.

Recently, reliable Pb (Ti, Zr) O3 (PZT) thin-film capacitors with robust switching endurance were fabricated successfully by incorporating oxidizable metal and oxide electrodes. However, the reasons for the drastic improvement in the switching endurance property was not clear. Degradation of polarizations by switching is called "polarization fatigue. " This paper describes the mechanisms of polarization fatigue, and discusses ways for improving of that property from the standpoints of microstructure, and of interactions between the PZT and the electrode materials of the capacitors. It is clearly identified that the causes of the fatigue are the unexpected formation of a surface transition layer of PZT, which is strongly dependent on the crystallization process, and a decrease in the interfacial capacitances due to the accumulation of oxygen vacancies between the PZT and non-oxidizable metal electrodes with high work functions such as Pt. Oxidizable metal and oxide electrodes suppress by oxidation-reduction reactions the accumulation of oxygen vacancies. Fatigue-free PZT thin-film capacitors can be formed if oxidizable metal or conductive oxide electrodes are incorporated in columnar-grain-structured PZT thin-film. In sharp contrast, fatigue and retention properties of PZT thin-film capacitors with Ir electrodes were degraded by modification of the PZT with 1 atm%-Nb and 1 atm%-La even though its grain structures were columnar.

Our compact switching converter using a thin-film microtransformer mono-lithically integrated with rectifier diodes represents the first step in developing a monolithic micro-switching converter that can be integrated with semiconductor devices and magnetic components. This converter is a single-ended forward converter with resonant reset and operates successfully at 15 MHz. The maximum output power is 0.5 W.

Integrating the power supply and signal processing circuit into one chip is an important step towards achieving a system-on-chip. This paper reviews and looks at the current technologies and their trends for power supply components such as DC-DC converters, intelligent power LSIs, and thin-film magnetic devices for the system-on-chip. A device structure has been proposed for the system-on-chip that is based on a quasi-SOI technique, in which the buried oxide layer is partially removed from the SOI substrate. In this structure, the CMOS devices for the digital signal-processing circuit and the bipolar transistors are formed in a conventional SOI region, and the CMOS analog devices and high-voltage devices are formed in a quasi-SOI region.

The characteristics of a-Si bottom-gate TFT test devices with several kinds of inorganic "quasi-black matrix," such as metal, semiconductor, and insulator, on the top were investigated for various black matrix(BM) resistivities. In the Ia-Vg characteristics, for a BM sheet resistance of about1 1012 Ω/, a high off current and large Vth shift were observed due to the back-gating effects when the BM is charged up. Accrding to the ac dynamic characteristics, there was almost no leakage due to the capacitive coupling between source and drain after 16.6 msec(one frame) when the BM sheet resistance was above 7 1013 Ω/ . It was found that hydrogenated amorphous silicon germanium(a-SiGe:H) film, which has enough optical density, with the sheet resistance above the order of 1014 Ω/ is a promising candidate for an inorganic BM on TFT array.

A three-dimensional micromagnetic simulation using the Landau-Lifshitz-Gilbert equation was performed for thin-film magnetic recording media and magnetoresistive (MR) heads with soft adjacent layers (SAL). For recording media the simulation results for magnetization curves and media noise were compared with the results of experiments. Although the media model needs to be improved, the qualitative agreement between simulation results and experimental results shows that this micromagnetic simulation can be a useful tool for analyzing and predicting magnetic properties and recording characteristics. This work also showed that media noise is influenced by magnetostatic interaction, and that the decrease of the magnetostatic interaction is favorable for obtaining a high signal-to-noise ratio. For an MR head the output obtained with a nonuniform sense current distribution is similar to the output obtained with uniform sense current distribution for both low and high anisotropy fields (Hk=2 Oe and 10 Oe) SAL. With the low Hk SAL, however, the asymmetry of the output obtained for nonuniform sense current differs from the asymmetry obtained for uniform sense current; the difference is due to a magnetization vortex in a biased state in the SAL. With the high Hk SAL, the difference between the asymmetry obtained for nonuniform sense current and the one obtained for uniform sense current is not large; no vortices are found in the SAL at the biased state.

Thin- and ultra-thin-film SOI MOSFET's are promising candidates to overcome the constraints for future miniaturized devices. This paper presents simulation results for a 0.1 µm gate length SOI MOSFET structure using a two-dimensional/two-carrier device simulator with a nonlocal model for the avalanche induced carrier generation. For the suppression of punchthrough effect in devices with a channel doping of 1 1016 cm-3 and 5 nm thick gate oxide it is found that the SOI layer thickness has to be reduced to at least 20 nm. The thickness of the buried oxide should not be smaller than 50 nm in order to avoid the degradation of thin SOI performance advantages. Investigating ways to suppress the degradation of the sub-threshold slope factor at these device dimensions it was found in contrast to the common expectation that the S-factor can be improved by increasing the body doping concentration. This phenomenon, which is a unique feature of thin-film depleted SOI MOSFET's, is explained by an analytical mode. At lower doping the area of the current flow is reduced by a decreasing effective channel thickness resulting in a slope factor degradation. Other approaches for S-factor improvement are the reduction of the channel edge capacitances by source/drain engineering or the decrease of SOI thickness or gate oxide thickness. For the latter approach a higher permittivity gate insulating material should be used in order to prevent tunnelling. The low breakdown voltage can be increased by utilizing an LDD structure to be suitable for a 1.5 V power supply. However, this is at the expense of reduced current drive. An alternative could be the supply voltage reduction to 1.0 V for single drain structure use. A dual-gated SOI MOSFET has an improved performance due to the parallel combination of two MOSFET's in this device. A slightly reduced breakdown voltage indicates a larger drain electric field present in this structure.

This paper describes the structure and properties of superconductive small antennas with thin-film matching circuits. These circuits make it possible to realize small antennas, 38 mm20 mm16 mm in size. This is one quarter the length of our previously reported ceramic antennas. The actual gain of this antennas was -4.5 dBi at 470 MHz. This value is 5.5 dB higher than that of Cu antennas with exactly the same structure.