Naoaki YAMANAKA Hiroshi MIYANAGA Yousuke YAMAMOTO
This paper presents the development of high-speed logic ICs having the same function as the ECL100K family for high-speed digital system applications such as for time division switching systems. A Super-Self-Aligned process Technology (SST) and a low-voltage swing differential circuit technique are used. The ICs operate up to about 2 Gb/s under a chip power dissipation of 170 mW570 mW.
Hiroyuki MIYAGI Yusuke OKAZAKI Ryota USUI Yutaka ARAKAWA Satoru OKAMOTO Naoaki YAMANAKA
In a grid computing environment, the network characteristics such as bandwidth and latency affect the task performance. The demands for bandwidth of wide-area networks become large and it reaches more than 100 Gbps. In this article, we focus on parallel routes transmission, such as link aggregation, to realize large bandwidth network. The performance of grid computing with parallel routes transmission is evaluated on the emulated wide-area network.
Tomoaki KAWAMURA Naoaki YAMANAKA Katsumi KAIZU
This paper describes advanced ATM switching system hardware that uses a high-performance and cost-effective MCM-D module as an ATM-layer function device. The MCM-D module is fabricated on a Si-substrate using the stacking RAM technique to reduce module size. The MCM has a 4-layer Si substrate, a high-performance ASIC, 8 high-speed SRAMs, and an FPGA. By using the stacking RAM technique, MCM-D module size is reduced to 50. 8 mm 50. 8 mm. This is 40% of that (100 mm 65 mm) of a double-side mounted sub-board module with conventional packaging (QFP and SOP). The MCM-D module realizes the ATM-layer functions that require a high-performance ASIC with a high-speed (access time 20 ns) and large-capacity (1 MBytes) SRAM cache. The MCM approach is quite effective in increasing memory access speed because it realizes high-density packaging. The MCM-D module is mounted on an ATM line interface circuit, and realizes 150 Mbit/s throughput ATM-layer functions (header conversion and on-line monitoring) in an ATM switching system. In addition, advanced ATM switching system hardware technologies with sub-module structure are also described. The MCM-D module is one of the sub-modules of the system. This MCM technology and sub-module technology can be applied to advanced ATM switching systems.
Haruhisa HASEGAWA Naoaki YAMANAKA Kohei SHIOMOTO
We propose ATM switching nodes with a feedback rate control scheme, AREX, which does not require a large buffer space and does not deteriorate throughput even in large-scale and high-speed ATM-WANs. The goal of our study is to establish the ATM multi-protocol emulation network ALPEN, which is an ATM-WAN architecture for establishing a backbone for multimedia networks. ALPEN achieves an ATM-WAN which is robust against long propagation delays. It also provides high performance without a large buffer space in an ATM-WAN environment. In ALPEN, each transit node informs the edge nodes only its residual bandwidth ratio. The edge nodes support multiple ATM-layer services by emulating them based on the information notified by transit nodes. Our research has been directed towards achieving high performance ABR (Available Bit Rate) service in an ATM-WAN by using ALPEN. The conventional ABR service requires transit nodes to have relatively high calculation power and large buffer space to overcome the effect of the long propagation delays common in WANs. ALPEN node systems have been developed for trials with actual network traffic. ALPEN with AREX reduces the calculation load of transit nodes for ABR service. That is confirmed by the size of the DSP program created for a test system. ALPEN with AREX is, therefore, able to emulate ABR service with higher performance in ATM-WANs, because ALPEN edge nodes are able to indicate the users allowed by ER (Explicit Rate) feedback. The network throughput, maximum queue length at congestion point, and burst transmission rate are determined by simulation. ALPEN with AREX achieves better performances than the conventional ABR network.
Shan GAO Xiaoyuan CAO Takehiro SATO Takaya MIYAZAWA Sota YOSHIDA Noboru YOSHIKANE Takehiro TSURITANI Hiroaki HARAI Satoru OKAMOTO Naoaki YAMANAKA
Software defined networking (SDN) and OpenFlow, which enables the abstraction of vendor/technology-specific attributes, improve the control and management flexibility of optical transport networks. In this paper, we present an interoperability demonstration of SDN/OpenFlow-based optical path control for multi-domain/multi-technology optical transport networks. We also summarize the abstraction approaches proposed for multi-technology network integration at SDN controllers.
Eiji OKI Nobuaki MATSUURA Kohei SHIOMOTO Naoaki YAMANAKA
Generalized Multi-Protocol Label Switching (GMPLS) is being developed in the Internet Engineering Task Force (IETF). In GMPLS-based wavelength-division-multiplexing (WDM) optical networks, a wavelength in a fiber is used as a label. In the existing GMPLS signaling protocol for bidirectional paths in WDM networks with the wavelength continuity constraint, bidirectional path setup fails with high probability because the upstream label allocated by the previous hop node may not be accepted at the transit node. To solve this problem, this paper proposes an efficient bidirectional label switched path (LSP) setup scheme based on an upstream label set. Called the Upstream Label Set (ULS) scheme, it is an extension of the existing GMPLS signaling protocol. The ULS scheme is consistent with the existing GMPLS signaling procedure and so offers backward compatibility. The numerical results suggest that when the number of the LSP setup retries is limited, the ULS scheme offers lower blocking probability than the existing GMPLS signaling scheme which uses only with the upstream label (UL). In addition, under the condition that the constraint of the number of LSP setup retries is relaxed, the LSP setup time of the ULS scheme is faster than that of the existing scheme. Furthermore, by using our developed prototype of the GMPLS control system, in which the ULS scheme was installed, we demonstrated that the ULS scheme successfully setup bidirectional LSPs.
This letter describes a new input and cross-point buffering matrix switching architecture for high-speed ATM switching systems. The proposed switch has input queuing buffers at each input port, and small size buffers for output port arbitration at each cross-point. These two types of buffers share loads using a simple and high-speed retry algorithm. Hardware size is only half that of conventional cross-point buffering switches. In addition, the switch achieves high-throughput at a condition that the switching speed matches the input and output port speed. This switch is expected to enable the development of high-speed ATM switching systems with each port supporting speeds in excess of 1Gbit/s.
Sho SHIMIZU Hiroyuki ISHIKAWA Yutaka ARAKAWA Naoaki YAMANAKA Kosuke SHIBA
How to minimize the number of mirroring resources under a QoS constraint (resource minimization problem) is an important issue in content delivery networks. This paper proposes a novel approach that takes advantage of the parallelism of dynamically reconfigurable processors (DRPs) to solve the resource minimization problem, which is NP-hard. Our proposal obtains the optimal solution by running an exhaustive search algorithm suitable for DRP. Greedy algorithms, which have been widely studied for tackling the resource minimization problem, cannot always obtain the optimal solution. The proposed method is implemented on an actual DRP and in experiments reduces the execution time by a factor of 40 compared to the conventional exhaustive search algorithm on a Pentium 4 (2.8 GHz).
Ko KIKUTA Daisuke ISHII Satoru OKAMOTO Eiji OKI Naoaki YAMANAKA
Connection setup on various computer networks is now achieved by GMPLS. This technology is based on the source-routing approach, which requires the source node to store metric information of the entire network prior to computing a route. Thus all metric information must be distributed to all network nodes and kept up-to-date. However, as metric information become more diverse and generalized, it is hard to update all information due to the huge update overhead. Emerging network services and applications require the network to support diverse metrics for achieving various communication qualities. Increasing the number of metrics supported by the network causes excessive processing of metric update messages. To reduce the number of metric update messages, another scheme is required. This paper proposes a connection setup scheme that uses flooding-based signaling rather than the distribution of metric information. The proposed scheme requires only flooding of signaling messages with requested metric information, no routing protocol is required. Evaluations confirm that the proposed scheme achieves connection establishment without excessive overhead. Our analysis shows that the proposed scheme greatly reduces the number of control messages compared to the conventional scheme, while their blocking probabilities are comparable.
Daisuke MATSUBARA Hitoshi YABUSAKI Satoru OKAMOTO Naoaki YAMANAKA Tatsuro TAKAHASHI
Machine-to-Machine (M2M) communication is expected to grow in networks of the future, where massive numbers of low cost, low function M2M terminals communicate in many-to-many manner in an extremely mobile and dynamic environment. We propose a network architecture called Data-centric Network (DCN) where communication is done using a data identifier (ID) and the dynamic data registered by mobile terminals can be retrieved by specifying the data ID. DCN mitigates the problems of prior arts, which are large size of routing table and transaction load of name resolution service. DCN introduces concept of route attraction and aggregation in which the related routes are attracted to an aggregation point and aggregated to reduce routing table size, and route optimization in which optimized routes are established routes to reduce access transaction load to the aggregation points. These allow the proposed architecture to deal with ever increasing number of data and terminals with frequent mobility and changes in data.
Naoaki YAMANAKA Eiji OKI Haruhisa HASEGAWA Thomas M. CHEN
This article proposes active-ATM, a flexible, simple and cost-effective ATM-WAN architecture that can handle multiple user-customized ATM-layer protocols, such as ABR and ABT, by using a simple universal ATM transit network. The proposed active-ATM architecture enables the construction of flexible networks that can evolve easily. With active-ATM and the ATM multi-protocol emulation network architecture called ALPEN, it is easy to implement new ATM-layer protocols by using user-created programs called active-program capsules that modify only the edge nodes. Because these user-sent program capsules can be used to quickly customize the edge nodes, there is no waiting for standardization and implementation of new services. The ATM-layer protocols are emulated only at the edge nodes, making the transit network independent of customer ATM-layer protocols. The active-ATM edge node is based on the flexible programmable node architecture called PUN(programmable unified node). The PUN is a platform for user-programmable ATM-layer services; it is achieved by using programmable devices, such as FPGAs and DSPs. An prototype system has demonstrated the flexibility of the resulting ATM network. The active-ATM architecture is an efficient approach to implementing multimedia, multi-protocol ATM services in an ATM WAN.
Hiroshi ESAKI Naoaki YAMANAKA Youki KADOBAYASHI Kaori MAEDA Kenichi NAGAMI Motonori NAKAMURA Koji OKAMURA Atsushi SHIONOZAKI Suguru YAMAGUCHI
Jonathan TURNER Achille PATTAVINA Tokuhiro KITAMI Iwao SASASE Kenji NAKAGAWA Toshikane ODA Akira HAKATA Takahiko KOZAKI Koji SUZUKI Naoaki YAMANAKA
Naoaki YAMANAKA Toyofumi TAKENAKA Youichi SATO Ken-ichi SATO
A uniquely-structured Usage Parameter Control (UPC) method named Virtual-shaping is proposed which considers cell arrival time jitter between user and UPC point. The method uses a modified Dangerous Bridge UPC circuit (Sliding window type) and virtually (logically) shapes cell traffic using cell arrival time compensation to offset cell delay variation (CDV). In addition, the proposed method is based on a cell-buffer-less structure and can be realized with reasonable hardware. The method yields precise and accurate monitoring. Computer simulations show that the method offers higher network utilization than the conventional Leaky Bucket based UPC method. The proposed method will make it possible to create more effective B-ISDNs, and more cost-effective broadband VBR services.
Masaki MURAKAMI Takashi KURIMOTO Satoru OKAMOTO Naoaki YAMANAKA Takayuki MURANAKA
A domain-specific networking platform based on optically interconnected reconfigurable communication processors is proposed. Some application examples of the reconfigurable communication processor and networking experiment results are presented.
Malathi VEERARAGHAVAN Takehiro SATO Molly BUCHANAN Reza RAHIMI Satoru OKAMOTO Naoaki YAMANAKA
The objectives of this survey are to provide an in-depth coverage of a few selected research papers that have made significant contributions to the development of Network Function Virtualization (NFV), and to provide readers insights into the key advantages and disadvantages of NFV and Software Defined Networks (SDN) when compared to traditional networks. The research papers covered are classified into four categories: NFV Infrastructure (NFVI), Network Functions (NFs), Management And Network Orchestration (MANO), and service chaining. The NFVI papers describe “framework” software that implement common functions, such as dynamic scaling and load balancing, required by NF developers. Papers on NFs are classified as offering solutions for software switches or middleboxes. MANO papers covered in this survey are primarily on resource allocation (virtual network embedding), which is an orchestrator function. Finally, service chaining papers that offer examples and extensions are reviewed. Our conclusions are that with the current level of investment in NFV from cloud and Internet service providers, the promised cost savings are likely to be realized, though many challenges remain.
A programmable variable delay-line IC is designed and fabricated for a very-high-speed time-division switching system. The IC has 16-steps 200 ps delay step and multi-Gbit/s operation speed. The IC can be applied to a new pipelining data transmission system having Gbit/s speed. Maximum data transmission speed based on this IC is also calculated.
Hiroshi ESAKI Naoaki YAMANAKA Youki KADOBASHI Kaori MAEDA Kenichi NAGAMI Motonori NAKAMURA Koji OKAMURA Atsushi SHINOZAKI Suguru YAMAGUCHI
Mirai CHINO Misato KAMIO Jun MATSUMOTO Eiji OKI Satoru OKAMOTO Naoaki YAMANAKA
A flexible orthogonal frequency-division multiplexing optical network enables the bandwidth to be flexibly changed by changing the number of sub-carriers. We assume that users request to dynamically change the number of sub-carriers. Dynamic bandwidth changes allow the network resources to be used more efficiently but each change takes a significant amount of time to complete. Service centric resource allocation must be considered in terms of the waiting time needed to change the number of sub-carriers. If the user demands drastically increase such as just after a disaster, the waiting time due to a chain-change of bandwidth becomes excessive because disaster priority telephone services are time-critical. This paper proposes a Grouped-elastic spectrum allocation scheme to satisfy the tolerable waiting time of the service in an optical fiber link. Spectra are grouped to restrict a waiting time in the proposed scheme. In addition, the proposed scheme determines a bandwidth margin between neighbor spectra to spectra to prevent frequent reallocation by estimating real traffic behavior in each group. Numerical results show that the bandwidth requirements can be minimized while satisfying the waiting time constraints. Additionally measurement granularity and channel alignment are discussed.