In this letter, we propose two robust and distributed game-based algorithms, which are the modifications of two algorithms proposed in [1], to solve the joint base station selection and resource allocation problem with imperfect information in heterogeneous cellular networks (HCNs). In particular, we repeatedly sample the received payoffs in the exploitation stage of each algorithm to guarantee the convergence when the payoffs of some users (UEs) in [1] cannot accurately be acquired for some reasons. Then, we derive the rational sampling number and prove the convergence of the modified algorithms. Finally, simulation results demonstrate that two modified algorithms achieve good convergence performances and robustness in the incomplete information scheme.

In this paper, we propose a floorplan aware high-level synthesis algorithm with body biasing for delay variation compensation, which minimizes the average leakage energy of manufactured chips. In order to realize floorplan-aware high-level synthesis, we utilize huddle-based distributed register architecture (HDR architecture). HDR architecture divides the chip area into small partitions called a huddle and we can control a body bias voltage for every huddle. During high-level synthesis, we iteratively obtain expected leakage energy for every huddle when applying a body bias voltage. A huddle with smaller expected leakage energy contributes to reducing expected leakage energy of the entire circuit more but can increase the latency. We assign control-data flow graph (CDFG) nodes in non-critical paths to the huddles with larger expected leakage energy and those in critical paths to the huddles with smaller expected leakage energy. We expect to minimize the entire leakage energy in a manufactured chip without increasing its latency. Experimental results show that our algorithm reduces the average leakage energy by up to 39.7% without latency and yield degradation compared with typical-case design with body biasing.

To use millimeter wave bands in future cellular and outdoor wireless networks, understanding the multipath cluster characteristics such as delay and angular spread for different polarization is very important besides knowing the path loss and other large scale propagation parameters. This paper presents result from analysis of wide-band full polarimetric double directional channel measurement at the millimeter wave band in a typical urban pico-cell environment. Only limited number of multipath clusters with gains ranging from -8dB to -26.8dB below the free space path loss and mainly due to single reflection, double reflection and diffraction, under both line of sight (LOS) and obstructed LOS conditions are seen. The cluster gain and scattering intensity showed strong dependence on polarization. The scattering intensities for ϑ-ϑ polarization were seen to be stronger compared to ϕ-ϕ polarization and on average 6.1dB, 5.6dB and 4.5dB higher for clusters due to single reflection, double reflection and scattering respectively. In each cluster, the paths are highly concentrated in the delay domain with delay spread comparable to the delay resolution of 2.5ns irrespective of polarization. Unlike the scattering intensity, the angular spread of paths in each cluster did not show dependence on polarization. On the base station side, average angular spread in azimuth and in elevation were almost similar with ≤3.3° spread in azimuth and ≤3.2° spread in elevation for ϑ-ϑ polarization. These spreads were slightly smaller than those observed for ϕ-ϕ polarization. On the mobile station side the angular spread in azimuth was much higher compared to the base station side. On average, azimuth angular spread of ≤11.4° and elevation angular spread of ≤5° are observed for ϑ-ϑ polarization. These spreads were slightly larger than in ϕ-ϕ polarization. Knowing these characteristics will be vital for more accurate modeling of the channel, and in system and antenna design.

The electron retention characteristics of memory capacitors with blocking oxide-silicon carbonitride (SiCN)-tunnel oxide stacked films were investigated for application in embedded charge trapping nonvolatile memories (NVMs). Long-term data retention in the SiCN memory capacitors was estimated to be more than 10 years at 85 °C. We presented an improved method to analyze the energy distribution of electron trap states numerically. Using the presented analytical method, electron trap states in the SiCN film were revealed to be distributed from 0.8 to 1.3 eV below the conduction band edge in the SiCN band gap. The presence of energetically deep trap states leads us to suggest that the SiCN dielectric films can be employed as the charge trapping film of embedded NVMs.

This paper investigates the effect of noises added to hidden units of AutoEncoders linked to multilayer perceptrons. It is shown that internal representation of learned features emerges and sparsity of hidden units increases when independent Gaussian noises are added to inputs of hidden units during the deep network training. It is also shown that the weights that connect the contaminated hidden units with the next layer have smaller values and outputs of hidden units tend to be more definite (0 or 1). This is expected to improve the generalization ability of the network through this automatic structuration by adding the noises. This network structuration was confirmed by experiments for MNIST digits classification via a deep neural network model.

A comprehensive method applying a nonlinear frequency compression (FC) as complementary to multi-band loudness compensation is proposed, which is able to improve loudness compensation and simultaneously increase high-frequency speech intelligibility for digital hearing aids. The proposed nonlinear FC (NLFC) improves the conventional methods in the aspect that the compression ratio (CR) is adjusted based on the speech intelligibility percentage in different frequency ranges. Then, an adaptive wide dynamic range compression (AWDRC) with a time-varying CR is applied to achieve adaptive loudness compensation. The experimental test results show that the mean speech identification is improved in comparison with the state-of-art methods.

In this paper, a novel fusion center controlled media access control (MAC) protocol for physical wireless parameter conversion sensor networks (PHY-C SN), and a transmission power design for each sensor node are proposed. In PHY-C SN, the sensing information is converted to corresponding subcarrier number of orthogonal frequency division multiplexing (OFDM) signals, and all sensor nodes can send sensing information simultaneously. In most wireless sensor network standards, each sensor node detects the surrounding wireless signal through carrier sense. However, sensor nodes cannot send signals simultaneously if carrier sense is applied in PHY-C SN. Therefore, a protocol for PHY-C SN is devised. In the proposed protocol, the fusion center detects the surrounding wireless environment by carrier sense and requests sensing information transmission toward sensor nodes if no other wireless systems are detected. Once the sensor nodes receive the request signal, they transmit sensing information to the fusion center. Further, to avoid harmful interference with surrounding wireless systems, the transmission power of each sensor is designed to suit the considering communication range and avoid interference toward other wireless systems. The effectiveness of the proposed protocol is evaluated by computer simulation. The parameters for collection like the number of collecting sensor nodes and the radius of the collection area are also examined when determining the transmission power of sensor nodes. Results show that highly efficient information collection with reducing interference both from and towards surrounding wireless systems can be implemented with PHY-C SN.

This paper proposes approximated log likelihood ratios (LLRs) for single carrier millimeter-wave (mmW) transmission systems in the presence of phase noise. In mmW systems, phase noise on carrier wave signals in very high frequency bands causes severe performance degradation. In order to mitigate the impairments of phase noise, forward error correction (FEC) techniques, such as low density parity check (LDPC) code, are effective. However, if the probabilistic model does not capture the exact behavior of the random process present in the received signal, FEC performance is severely degraded, especially in higher order modulation or high coding rate cases. To address this issue, we carefully examine the probabilistic model of minimum mean square error (MMSE) equalizer output including phase noise component. Based on the derived probabilistic model, approximated LLR computation methods with low computational burden are proposed. Computer simulations confirm that the approximated LLR computations on the basis of the derived probabilistic model are capable of improving bit error rate (BER) performance without sacrificing computational simplicity in the presence of phase noise.

This letter proposes a class of polyphase zero correlation zone (ZCZ) sequence sets with low inter-set cross-correlation property. The proposed ZCZ sequence sets are constructed from DFT matrices and r-coincidence sequences. Each ZCZ sequence set is optimal, and the absolute value of the cross-correlation function of sequences from different sets is less than or equal to $rsqrt{N}$, where N denotes the length of each sequence. These ZCZ sequence sets are suitable for multiuser environments.

This paper proposes 0-1-A-Ā LUT, a new programmable logic using atom switches, and a delay-optimal mapping algorithm for it. Atom switch is a non-volatile memory device of very small geometry which is fabricated between metal layers of a VLSI, and it can be used as a switch device of very small on-resistance and parasitic capacitance. While considerable area reduction of Look Up Tables (LUTs) used in conventional Field Programmable Gate Arrays (FPGAs) has been achieved by simply replacing each SRAM element with a memory element using a pair of atom switches, our 0-1-A-Ā LUT achieves further area and delay reduction. Unlike the conventional atom-switch-based LUT in which all k input signals are fed to a MUX, one of input signals is fed to the switch array, resulting area reduction due to the reduced number of inputs of the MUX from 2k to 2k-1, as well as delay reduction due to reduced fanout load of the input buffers. Since the fanout of this input buffers depends on the mapped logic function, this paper also proposes technology mapping algorithms to select logic function of fewer number of fanouts of input buffers to achieve further delay reduction. From our experiments, the circuit delay using our k-LUT is 0.94% smaller in the best case compared with using the conventional atom-switch-based k-LUT.

This letter proposes a heuristic algorithm to select check variables, which are points of comparison for error detection, for soft-error tolerant datapaths. Our soft-error tolerance scheme is based on check-and-retry computation and an efficient resource management named speculative resource sharing (SRS). Starting with the smallest set of check variables, the proposed algorithm repeats to add new check variable one by one incrementally and find the minimum latency solution among the series of generated solutions. During the process, each new check variable is selected so that the opportunity of SRS is enlarged. Experimental results show that improvements in latency are achieved compared with the choice of the smallest set of check variables.

Feature extractor is an important component of a tracker and the convolutional neural networks (CNNs) have demonstrated excellent performance in visual tracking. However, the CNN features cannot perform well under conditions of low illumination. To address this issue, we propose a novel deep correlation tracker with backtracking, which consists of target translation, backtracking and scale estimation. We employ four correlation filters, one with a histogram of oriented gradient (HOG) descriptor and the other three with the CNN features to estimate the translation. In particular, we propose a backtracking algorithm to reconfirm the translation location. Comprehensive experiments are performed on a large-scale challenging benchmark dataset. And the results show that the proposed algorithm outperforms state-of-the-art methods in accuracy and robustness.

Quaternionic neural networks are extensions of neural networks using quaternion algebra. 3-D and 4-D quaternionic MLPs have been studied. 3-D quaternionic neural networks are useful for handling 3-D objects, such as Euclidean transformation. As for Hopfield neural networks, only 4-D quaternionic Hopfield neural networks (QHNNs) have been studied. In this work, we propose the 3-D QHNNs. Moreover, we define the energy, and prove that it converges.

Deploying low power nodes (LPNs), which reuse the spectrum licensed to a macrocell network, is considered to be a promising way to significantly boost network capacity. Due to the spectrum-sharing, the deployment of LPNs could trigger the severe problem of interference including intra-tier interference among dense LPNs and inter-tier interference between LPNs and the macro base station (MBS), which influences the system performance strongly. In this paper, we investigate a spectrum-sharing approach in the downlink for two-tier networks, which consists of small cells (SCs) with several LPNs and a macrocell with a MBS, aiming to mitigate the interference and improve the capacity of SCs. The spectrum-sharing approach is described as a multi-objective optimization problem. The problem is solved by the nondominated sorting genetic algorithm version II (NSGA-II), and the simulations show that the proposed spectrum-sharing approach is superior to the existing one.

In this paper, we propose a redundant task allocation method for multi-core systems based on the Duplication with Temporary Triple-Modular Redundancy and Reconfiguration (DTTR) scheme. The proposed method determines task allocation of a given task graph to a given multi-core system model from task scheduling in given fault patterns. Fault patterns defined in this paper consist of a set of faulty cores and a set of surviving cores. To optimize the average failure rate of the system, task scheduling minimizes the execution time of the task graph preserving the property of the DTTR scheme. In addition, we propose a selection method of fault patterns to be scheduled to reduce the task allocation time. In the experiments, at first, we evaluate the proposed selection method of fault patterns in terms of the task allocation time. Then, we compare the average failure rate among the proposed method, a task allocation method which packs tasks into particular cores as much as possible, a task allocation method based on Simulated Annealing (SA), a task allocation method based on Integer Linear Programming (ILP), and a task allocation method based on task scheduling without considering the property of the DTTR scheme. The experimental results show that task allocation by the proposed method results in nearly the same average failure rate by the SA based method with shorter task allocation time.

Feature representation, as a key component of scene character recognition, has been widely studied and a number of effective methods have been proposed. In this letter, we propose the novel method named coupled spatial learning (CSL) for scene character representation. Different from the existing methods, the proposed CSL method simultaneously discover the spatial context in both the dictionary learning and coding stages. Concretely, we propose to build the spatial dictionary by preserving the corresponding positions of the codewords. Correspondingly, we introduce the spatial coding strategy which utilizes the spatiality regularization to consider the relationship among features in the Euclidean space. Based on the spatial dictionary and spatial coding, the spatial context can be effectively integrated in the visual representations. We verify our method on two widely used databases (ICDAR2003 and Chars74k), and the experimental results demonstrate that our method achieves competitive results compared with the state-of-the-art methods. In addition, we further validate the proposed CSL method on the Caltech-101 database for image classification task, and the experimental results show the good generalization ability of the proposed CSL.

The rapid prototyping of a mixed-signal system-on-chip (SoC) has been enabled by reusing predesigned intellectual properties (IPs) and by integrating newly designed IP into the top design of SoC. The IPs have been designed on various hardware description levels, which leads to challenges in simulations that evaluate the prototyping. One traditional solution is to convert these heterogeneous IP models into equivalent models, that are described in a single description language. This conversion approach often requires manual rewriting of existing IPs, and this results in description loss during the model projection due to the absence of automatic conversion tools. The other solutions are co-simulation/emulation approaches that are based on the coupling of multiple simulators/emulators through connection modules. The conventional methods do not have formal theoretical backgrounds and an explicit interface for integrating the simulator into their solutions. In this paper, we propose a general co-simulation approach based on the high-level architecture (HLA) and a newly-defined programming language interface for interoperation (PLI-I) between heterogeneous IPs as a formal simulator interface. Based on the proposed PLI-I and HLA, we introduce formal procedures of integration and interoperation. To reduce integration costs, we split these procedures into two parts: a reusable common library and an additional model-dependent signal-to-event (SE) converter to handle differently abstracted in/out signals between the coupled IPs. During the interoperation, to resolve the different time-advance mechanisms and increase computation concurrency between digital and analog simulators, the proposed co-simulation approach performs an advanced HLA-based synchronization using the pre-simulation concepts. The case study shows the validation of interoperation behaviors between the heterogeneous IPs in mixed-signal SoC design, the reduced design effort in integrating, and the synchronization speedup using the proposed approach.

Software-based error detection techniques, which includes error detection mechanism (EDM) transformation, are used for error localization in post-silicon validation. This paper evaluates the performance of EDM for timing error localization with a noise-aware logic simulator and 65-nm test chips assuming the following two EDM usage scenarios; (1) localizing a timing error occurred in the original program, and (2) localizing as many potential timing errors as possible. Simulation results show that the EDM transformation customized for quick error detection cannot locate electrical timing errors in the original program in the first scenario, but it detects 86% of non-masked errors potential bugs in the second scenario, which mean the EDM performance of detecting electrical timing errors affecting execution results is high. Hardware measurement results show that the EDM detects 25% of original timing errors and 56% of non-masked errors. Here, these hardware measurement results are not consistent with the simulation results. To investigate the reason, we focus on the following two differences between hardware and simulation; (1) design of power distribution network, and (2) definition of timing error occurrence frequency. We update the simulation setup for filling the difference and re-execute the simulation. We confirm that the simulation and the chip measurement results are consistent.

Artificial lighting is responsible for a large portion of total energy consumption and has great potential for energy saving. This paper designs an LED light control algorithm based on users' localization using multiple battery-less binary human detection sensors. The proposed lighting control system focuses on reducing office lighting energy consumption and satisfying users' illumination requirement. Most current lighting control systems use infrared human detection sensors, but the poor detection probability, especially for a static user, makes it difficult to realize comfortable and effective lighting control. To improve the detection probability of each sensor, we proposed to locate sensors as close to each user as possible by using a battery-less wireless sensor network, in which all sensors can be placed freely in the space with high energy stability. We also proposed to use a multi-sensor-based user localization algorithm to capture user's position more accurately and realize fine lighting control which works even with static users. The system is actually implemented in an indoor office environment in a pilot project. A verification experiment is conducted by measuring the practical illumination and power consumption. The performance agrees with design expectations. It shows that the proposed LED lighting control system reduces the energy consumption significantly, 57% compared to the batch control scheme, and satisfies user's illumination requirement with 100% probability.

This contribution presents and analyzes the statistical regularity related to the noise power spectrum series and the speech spectrum series. It also undertakes a thorough inquiry of the quasi-Gaussian distributed power spectrum series obtained using the radical root transformation. Consequently, a noise-estimation algorithm is proposed for speech enhancement. This method is effective for separating the noise power spectrum from the noisy speech power spectrum. In contrast to standard noise-estimation algorithms, the proposed method requires no speech activity detector. It was confirmed to be conceptually simple and well suited to real-time implementations. Practical experiment tests indicated that our method is preferred over previous methods.