The conventional hybrid STBC schemes can achieve less BER performance for STBC detection schemes than conventional STBC schemes since SM symbols interfere with STBC symbols. Therefore, this letter proposes the improved scheme for hybrid STBC systems. STBC and SM schemes are combined for the hybrid space-time block code system. Our approach effectively obtains both diversity gain and spectral efficiency gain. The proposed scheme offers improved BER performance since it uses iterative detection. Moreover, it increases the data rate effectively with a little performance loss.

The authors have developed a mechanism that applies real vibration to electrical contacts by hammering oscillation in the vertical direction similar to that in real cases, and they have studied the effects of micro-oscillation on the contacts using the mechanism. It is shown that the performance of the hammering oscillation mechanism (HOM) for measuring acceleration and force is superior to that of other methods in terms of the stability of data. Using the mechanism, much simpler and more practical protocols are proposed for evaluating acceleration, force, and mass using only the measured acceleration. It is also indicated that the relationship between the inertial force generated by the hammering oscillation mechanism and the frictional force in electrical devices attached on a board is related to one of the causes of the degradation of electrical contacts under the effect of external micro-oscillation.

In this paper, we point out that Yoon et al.'s gateway-oriented password-based authenticated key exchange (GPAKE) protocol is inefficiently and incorrectly designed to overcome the undetectable on-line dictionary attack. To remedy these problems, we propose a new GPAKE protocol and prove its security in the random oracle model. Performance analysis demonstrates that our protocol is more secure and efficient than previous protocols.

We propose a low-overhead fault-secure parallel prefix adder. We duplicate carry bits for checking purposes. Only one half of normal carry bits are compared with the corresponding redundant carry bits, and the hardware overhead of the adder is low. For concurrent error detection, we also predict the parity of the result. The adder uses parity-based error detection and it has high compatibility with systems that have parity-based error detection. We can implement various fault-secure parallel prefix adders such as Sklansky adder, Brent-Kung adder, Han-Carlson adder, and Kogge-Stone adder. The area overhead of the proposed adder is about 15% lower than that of a previously proposed adder that compares all the carry bits.

Large-scale disasters may cause simultaneous failures of many components in information systems. In the design for disaster recovery, operational procedures to recover from simultaneous component failures need to be determined so as to satisfy the time-to-recovery objective within the limited budget. For this purpose, it is beneficial to identify the smallest unacceptable combination of component failures (SUCCF) which exceeds the acceptable cost for recovering the system. This allows us to know the limitation of the recovery capability of the designed recovery operation procedure. In this paper, we propose a technique to identify the SUCCF by predicting the required cost for recovery from each combination of component failures with and without two-person cross-check of execution of recovery operations. We synthesize analytic models from the description of recovery operation procedure in the form of SysML Activity Diagram, and solve the models to predict the time-to-recovery and the cost. An example recovery operation procedure for a commercial database management system is used to demonstrate the proposed technique.

Hyperthermia is one of the modalities for cancer treatment, utilizing the difference of thermal sensitivity between tumor and normal tissue. Interstitial microwave hyperthermia is one of the heating schemes and it is applied to a localized tumor. In the treatments, heating pattern control around antennas are important, especially for the treatment in and around critical organs. This paper introduces a coaxial-dipole antenna, which is one of the thin microwave antennas and can generate a controllable heating pattern. Moreover, generations of an arbitrary shape heating patterns by an array applicator composed of four coaxial-dipole antennas are described.

In this letter, we propose a partial impedance-matching method using a two-strip resonator for noncontact Passive Intermodulation (PIM) measurements using a coaxial tube. It is shown that the strip closer to the inner tube of the coaxial tube is dominant in the observed PIM characteristics while both strips are excited equally. The ideal efficiency of power to each strip is 50%, which is a significant improvement in comparison with conventional methods.

A method to estimate sound source orientation in a reverberant room using a microphone array is proposed. We extend the conventional modeling of a room transfer function based on the image method in order to take into account the directivity of a sound source. With this extension, a transfer function between a sound source and a listener (or a microphone) is described by the superposition of transfer functions from each image source to the listener multiplied by the source directivity; thus, the sound source orientation can be estimated by analyzing how the image sources are distributed (power distribution of image sources) from observed signals. We applied eigenvalue analysis to the spatial correlation matrix of the microphone array observation to obtain the power distribution of image sources. Bsed on the assumption that the spatial correlation matrix for each set of source position and orientation is known a priori, the variation of the eigenspace can be modeled. By comparing the eigenspace of observed signals and that of pre-learned models, we estimated the sound source orientation. Through experiments using seven microphones, the sound source orientation was estimated with high accuracy by increasing the reverberation time of a room.

To deal with failures as simply as possible, we propose a new foundation for the core (untyped) C++, which is based on a new logic called task logic or imperative logic. We then introduce a sequential-disjunctive statement of the form S : R. This statement has the following semantics: execute S and R sequentially. It is considered a success if at least one of S, R is a success. This statement is useful for dealing with inessential errors without explicitly catching them.

This paper proposes T-CROM (Time-delayed Collaborative ROuting and MAC) protocol, that allows collaboration between network and MAC layers in order to extend the lifetime of MANETs in a resources-limited environment. T-CROM increases the probability of preventing energy-poor nodes from joining routes by using a time delay function that is inversely proportional to the residual battery capacity of intermediate nodes, making a delay in the route request (RREQ) packets transmission. The route along which the first-arrived RREQ packet traveled has the smallest time delay, and thus the destination node identifies the route with the maximum residual battery capacity. This protocol leads to a high probability of avoiding energy-poor nodes and promotes energy-rich nodes to join routes in the route establishment phase. In addition, T-CROM controls the congestion between neighbors and reduces the energy dissipation by providing an energy-efficient backoff time by considering both the residual battery capacity of the host itself and the total number of neighbor nodes. The energy-rich node with few neighbors has a short backoff time, and the energy-poor node with many neighbors gets assigned a large backoff time. Thus, T-CROM controls the channel access priority of each node in order to prohibit the energy-poor nodes from contending with the energy-rich nodes. T-CROM fairly distributes the energy consumption of each node, and thus extends the network lifetime collaboratively. Simulation results show that T-CROM reduces the number of total collisions, extends the network lifetime, decreases the energy consumption, and increases the packet delivery ratio, compared with AOMDV with IEEE 802.11 DCF and BLAM, a battery-aware energy efficient MAC protocol.

Design equations for satisfying off-nominal operating conditions of the class E amplifier with a nonlinear shunt capacitance for a grading coefficient of 0.5 and the duty cycle D=0.5 are derived. By exploiting the off-nominal class E operation, various amplifier parameters such as input voltage, operating frequency, output power, and load resistance can be set as design specifications. As a result of the analysis in this paper, the following extension of the usability of the class E amplifier was achieved. With rising up the dc supply voltage, the shunt capacitance which achieves the off-nominal operation can be increased. This means that a transistor with higher output capacitance can be used for ZVS operation. This also means that maximum operating frequency which achieves ZVS can be increased. An example of a design procedure of the class E amplifier is given. The theoretical results were verified with an experiment.

We propose a novel method for knowledge consolidation based on a knowledge graph as a next step in relation extraction from text. The knowledge consolidation method consists of entity consolidation and relation consolidation. During the entity consolidation process, identical entities are found and merged using both name similarity and relation similarity measures. In the relation consolidation process, incorrect relations are removed using cardinality properties, temporal information and relation weight in given graph structure. In our experiment, we could generate compact and clean knowledge graphs where number of entities and relations are reduced by 6.1% and by 17.4% respectively with increasing relation accuracy from 77.0% to 85.5%.

Information security has been seriously threatened by the differential power analysis (DPA). Delay-based dual-rail precharge logic (DDPL) is an effective solution to resist these attacks. However, conventional DDPL convertors have some shortcomings. In this paper, we propose improved convertor pairs based on dynamic logic and a sense amplifier (SA). Compared with the reference CMOS-to-DDPL convertor, our scheme could save 69% power consumption. As to the comparison of DDPL-to-CMOS convertor, the speed and power performances could be improved by 39% and 54%, respectively.

Finding DC operating points of nonlinear circuits is an important and difficult task. The Newton-Raphson method adopted in the SPICE-like simulators often fails to converge to a solution. To overcome this convergence problem, homotopy methods have been studied from various viewpoints. However, the previous studies are mainly focused on the bipolar transistor circuits. Also the efficiencies of the previous homotopy methods for MOS transistor circuits are not satisfactory. Therefore, finding a more efficient homotopy method for MOS transistor circuits becomes necessary and important. This paper proposes a Newton fixed-point homotopy method for MOS transistor circuits and proposes an embedding algorithm in the implementation as well. Moreover, the global convergence theorems of the proposed Newton fixed-point homotopy method for MOS transistor circuits are also proved. Numerical examples show that the efficiencies for finding DC operating points of MOS transistor circuits by the proposed MOS Newton fixed-point homotopy method with the two embedding types can be largely enhanced (can larger than 50%) comparing with the conventional MOS homotopy methods, especially for some large-scale MOS transistor circuits which can not be easily solved by the SPICE3 and HSPICE simulators.

In this paper, for an odd prime p, new quaternary sequences of even period 2p with ideal autocorrelation property are constructed using the binary Legendre sequences of period p. For the new quaternary sequences, two properties which are considered as the major characteristics of pseudo-random sequences are derived. Firstly, the autocorrelation distribution of the proposed quaternary sequences is derived and it is shown that the autocorrelation values of the proposed quaternary sequences are optimal. For both p≡1 mod 4 and p≡3 mod 4, we can construct optimal quaternary sequences while only for p≡3 mod 4, the binary Legendre sequences can satisfy ideal autocorrelation property. Secondly, the linear complexity of the proposed quaternary sequences is also derived by counting non-zero coefficients of the discrete Fourier transform over the finite field Fq which is the splitting field of x2p-1. It is shown that the linear complexity of the quaternary sequences is larger than or equal to p or (3p+1)/2 for p≡1 mod 4 or p≡3 mod 4, respectively.

This paper presents a novel data compression method for testing integrated circuits within the framework of pattern run-length coding. The test set is firstly divided into 2n-length patterns where n is a natural number. Then the compatibility of each pattern, which can be an external type, or an internal type, is analyzed. At last, the codeword of each pattern is generated according to its analysis result. Experimental results for large ISCAS89 benchmarks show that the proposed method can obtain a higher compression ratio than existing ones.

Orthogonal arrays have important applications in statistics and computer science, as well as in coding theory. In this letter, a new construction method of symmetric orthogonal arrays of strength t is proposed, which is a concatenation of two orthogonal partitions according to a latin square. As far as we know, this is a new construction of symmetric orthogonal arrays of strength t, where t is a given integer. Based on the different latin squares, we also study the enumeration problem of orthogonal partitions, and a lower bound on the count of orthogonal partitions is derived.

Spectrum sensing is one of the main functions in cognitive radio networks. To improve the sensing performance and increase spectrum efficiency, a number of cooperative spectrum sensing methods have been proposed. However, most of these methods focused on a single-channel environment. In this letter, we present a novel cooperative spectrum sensing method based on cooperator selection in a multi-channel cognitive radio network. Using reinforcement learning, a cognitive radio user can select reliable and robust cooperators, without any a priori knowledge. Using the proposed method, a cognitive radio user can achieve better sensing capability and overcome performance degradation problems due to malicious users or erratic user behavior. Numerical results show that the proposed method can achieve excellent performance.

Current network elements consume 10-20% of the total power in data centers. Today's network elements are not energy-proportional and consume a constant amount of energy regardless of the amount of traffic. Thus, turning off unused network switches is the most efficient way of reducing the energy consumption of data center networks. This paper presents Honeyguide, an energy optimizer for data center networks that not only turns off inactive switches but also increases the number of inactive switches for better energy-efficiency. To this end, Honeyguide combines two techniques: 1) virtual machine (VM) and traffic consolidation, and 2) a slight extension to the existing tree-based topologies. Honeyguide has the following advantages. The VM consolidation, which is gracefully combined with traffic consolidation, can handle severe requirements on fault tolerance. It can be introduced into existing data centers without replacing the already-deployed tree-based topologies. Our simulation results demonstrate that Honeyguide can reduce the energy consumption of network elements better than the conventional VM migration schemes, and the savings are up to 7.8% in a fat tree with k=12.

As the LSI process technology advances and the gate size becomes smaller, the signal delay on interconnect becomes a significant factor in the signal path delay. Also, as the size of interconnect structure becomes smaller, the interconnect process variations have become one of the dominant factors which influence the signal delay and thus clock skew. Therefore, controlling the influence of interconnect process variations on clock skew is a crucial issue in the advanced process technologies. In this paper, we propose a method for minimizing clock skew fluctuations caused by interconnect process variations. The proposed method identifies the suitable balance of clock buffer size and wire length in order to minimize the clock skew fluctuations caused by the interconnect process variations. Experimental results on test circuits of 28nm process technology show that the proposed method reduces the clock skew fluctuations by 30-92% compared to the conventional method.