The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] Al(20498hit)

17321-17340hit(20498hit)

  • Evolutionary Approach for Automatic Programming by Formulas

    Naohiro HONDO  Yukinori KAKAZU  

     
    LETTER-Artificial Intelligence and Knowledge

      Vol:
    E81-A No:6
      Page(s):
    1179-1182

    This paper proposes an automatic structural programming system. Genetic Programming achieves success for automatic programming using the evolutionary process. However, the approach doesn't deal with the essential program concept in the sense of what is called a program in software science. It is useful that a program be structured by various sub-structures, i. e. subroutines, however, the above-mentioned approach treats a single program as one sequence. As a result of the above problem, there is a lack of reusability, flexibility, and a decreases in the possibility of use as a utilitarian programming system. In order to realize a structural programming system, this paper proposes a method which can generate a program constructed by subroutines, named formula, using the evolutionary process.

  • Shift-Invariant Fuzzy-Morphology Neural Network for Automatic Target Recognition

    Yonggwan WON  

     
    PAPER-Neural Networks

      Vol:
    E81-A No:6
      Page(s):
    1119-1127

    This paper describes a theoretical foundation of fuzzy morphological operations and architectural extension of the shared-weight neural network (SWNN). The network performs shift-invariant filtering using fuzzy-morphological operations for feature extraction. The nodes in the feature extraction stage employ the generalized-mean operator to implement fuzzy-morphological operations. The parameters of the SWNN, weights, morphological structuring element and fuzziness, are optimized by the error back-propagation (EBP) training method. The parameter values of the trained SWNN are then implanted into the extended SWNN (ESWNN) which is a simple convolution neural network. The ESWNN architecture dramatically reduces the amount of computation by avoiding segmentation process. The neural network is applied to automatic recognition of a vehicle in visible images. The network is tested with several sequences of images that include targets ranging from no occlusion to almost full occlusion. The results demonstrate an ability to detect occluded targets, while trained with non-occluded ones. In comparison, the proposed network was superior to the Minimum-Average Correlation filter systems and produced better results than the ordinary SWNN.

  • A Neuro-Based Optimization Algorithm for Rectangular Puzzles

    Hiroyuki YAMAMOTO  Hiroshi NINOMIYA  Hideki ASAI  

     
    PAPER-Neural Networks

      Vol:
    E81-A No:6
      Page(s):
    1113-1118

    This paper describes a neuro-based optimization algorithm for three dimensional (3-D) rectangular puzzles which are the problems to arrange the irregular-shaped blocks so that they perfectly fit into a fixed three dimensional rectangular shape. First, the fitting function of the 3-D block, which means the fitting degree of each irregular block to the neighboring block and the rectangular configuration, is described. Next, the energy function for the 3-D rectangular puzzles is proposed, where the horizontal rotation of the block is also considered. Finally, our optimization method is applied to several examples using the 3-D analog neural array and it is shown that our algorithm is useful for solving 3-D rectangular puzzles.

  • Multilayer Neural Network with Threshold Neurons

    Hiroomi HIKAWA  Kazuo SATO  

     
    PAPER-Neural Networks

      Vol:
    E81-A No:6
      Page(s):
    1105-1112

    In this paper, a new architecture of Multilayer Neural Network (MNN) with on-chip learning for effective hardware implementation is proposed. To reduce the circuit size, threshold function is used as neuron's activating function and simplified back-propagation algorithm is employed to provide on-chip learning capability. The derivative of the activating function is modified to improve the rate of successful learning. The learning performance of the proposed architecture is tested by system-level simulations. Simulation results show that the modified derivative function improves the rate of successful learning and that the proposed MNN has a good generalization capability. Furthermore, the proposed architecture is implemented on field programmable gate array (FPGA). Logic-level simulation and preliminary experiment are conducted to test the on-chip learning mechanism.

  • Communication System for People with Physical Disability Using Voice Recognizer

    Seigou YASUDA  Akira OKAMOTO  Hiroshi HASEGAWA  Yoshito MEKADA  Masao KASUGA  Kazuo KAMATA  

     
    PAPER-Human Communications and Ergonomics

      Vol:
    E81-A No:6
      Page(s):
    1097-1104

    For people with serious disability, it is most significant to be able to use the same communication methods, for instance a telephone and an electronic mail system (e-mail), as ordinary people do in order to get a normal life and communicate with other people for leading a social life. In particular, having communications access to an e-mail is a very effective method of communication that enables them to convey their intention to other people directly while at the same time keep their privacy. However, it takes them much time and effort to input an e-mail text on the computer. They also need much support by their attendants. From this point of view, we propose a multi-modal communication system that is composed of a voice recognizer, a pointing device, and a text composer. This system intend to improve the man-machine interface for people with physical disability. In this system, our voice recognition technology plays a key role in providing a good interface between disabled people and the personal computer. When generating e-mail contents, users access the database containing user keywords, and the guidance menu from which they select the appropriate word by voice. Our experimental results suggest that this communication system improves not only the time efficiency of text composition but also the readiness of disabled people to communicate with other people. In addition, our disabled subject on this paper is not able to move his body, legs and hands due to suffer from muscular dystrophy. And he is able to move only his fingers and speak command words with the assistance of a respirator.

  • A Structural Learning of Neural-Network Classifiers Using PCA Networks and Species Genetic Algorithms

    Sang-Woon KIM  Seong-Hyo SHIN  Yoshinao AOKI  

     
    LETTER-Neural Networks

      Vol:
    E81-A No:6
      Page(s):
    1183-1186

    We present experimental results for a structural learning method of feed-forward neural-network classifiers using Principal Component Analysis (PCA) network and Species Genetic Algorithm (SGA). PCA network is used as a means for reducing the number of input units. SGA, a modified GA, is employed for selecting the proper number of hidden units and optimizing the connection links. Experimental results show that the proposed method is a useful tool for choosing an appropriate architecture for high dimensions.

  • Two Dimensional Equalization Scheme of Orthogonal Coding Multi-Carrier CDMA

    Soichi WATANABE  Takuro SATO  Masakazu SENGOKU  Takeo ABE  

     
    PAPER-Spread Spectrum Technologies and Applications

      Vol:
    E81-A No:6
      Page(s):
    1079-1088

    This paper describes two dimensional (2D) equalization scheme of orthogonal coding multi-carrier CDMA for reverse link of mobile communication systems. The purpose of the 2D equalization is the reduction of Multiple Access Interference (MAI) which is caused by the random access and the different propagation path from each mobile station. The orthogonal coding multi-carrier CDMA multiplexes all mobile stations' data by Code Division Multiplexing (CDM). The 2D coding scheme spreads a preamble signal at time (in subchannel signals) and frequency (between subchannel signals) domains. The 2D decoding scheme estimates transmission delay time and instantaneous fading frequency from preamble signal for individual mobile stations and compensate the received data using these estimation values to reduce MAI.

  • Heuristic State Reduction Methods of Incompletely Specified Machines Preceding to Satisfy Covering Condition

    Masaki HASHIZUME  Takeomi TAMESADA  Takashi SHIMAMOTO  Akio SAKAMOTO  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E81-A No:6
      Page(s):
    1045-1054

    This paper presents two kinds of simplification methods for incompletely specified sequential machines. The strategy of the methods is that as many states in original machines are covered in the simplification processes as possible. The purpose of the methods is to derive a simplified machine having either the largest maximal compatible set or its subset. With the methods, one of the minimal machines can not be always derived, but a near-minimal machine can be obtained more quickly with less memory, since they need not derive all the compatible sets. In this paper, the effectiveness of the methods is checked by applying them to simplification problems of incompletely specified machines generated by using random numbers, and of the MCNC benchmark machines. The experimental results show that our methods can derive a simplified machine quickly, especially for machines having a great number of states or don't care rate.

  • A Systolic Pipelined NTSC/PAL Digital Video Encoder

    Seung Ho OH  Han Jun CHOI  Moon Key LEE  

     
    PAPER-Digital Signal Processing

      Vol:
    E81-A No:6
      Page(s):
    1021-1028

    This paper describes the design of a multistandard video encoder. The proposed encoder accepts conventional NTSC/PAL video signals. The encoder consists of four major building functions which are color space converter, digital filters, color modulator, and timing generator. In order to support multistandard video signals, a programmable systolic architecture is adopted in designing various digital filters. Interpolation digital filters are also used to enhance SNR of encoded video signals. The input to the encoder can be either YCbCr signal or RGB signal. The outputs are luminance (Y), chrominance (C), and composite video baseband (Y+C) signals. The architecture of the encoder is defined by using Matlab program and is modelled by using Verilog-HDL language. The overall operation is verified by using various video signals, such as color bar patterns, ramp signals, and so on. The encoder contains 36 k gates and is implemented by using 0. 65 µm CMOS process.

  • Structure of Delayless Subband Adaptive Filter Using Hadamard Transformation

    Kiyoshi NISHIKAWA  Takuya YAMAUCHI  Hitoshi KIYA  

     
    PAPER-Digital Signal Processing

      Vol:
    E81-A No:6
      Page(s):
    1013-1020

    In this paper, we consider the selection of analysis filters used in the delayless subband adaptive digital filter (SBADF) and propose to use simple analysis filters to reduce the computational complexity. The coefficients of filters are determined using the components of the first order Hadamard matrix. Because coefficients of Hadamard matrix are either 1 or -1, we can analyze signals without multiplication. Moreover, the conditions for convergence of the proposed method is considered. It is shown by computer simulations that the proposed method can converge to the Wiener filter.

  • A Polyimide/Alumina-Ceramic Multilayer MIC Analog Phase Shifter with a Large Phase Shift

    Hitoshi HAYASHI  Masahiro MURAGUCHI  

     
    PAPER-Functional Modules and the Design Technology

      Vol:
    E81-C No:6
      Page(s):
    841-847

    This paper demonstrates a polyimide/alumina-ceramic multilayer MIC analog phase shifter with a large phase shift. First, a novel active inductor, similar to the previously reported active inductor but with a shunt variable resistor inserted in the feedback loop, is proposed for miniaturizing the circuit. The chip size of the fabricated GaAs MESFET active inductor is less than 0. 52 mm2. Next, a low-loss analog phase shifter with a large phase shift is presented. This is constructed in an MIC structure with the active inductors, the varactor diodes and the low-loss polyimide/alumina-ceramic multilayer broad-side coupler. Furthermore, since the amount of the phase shift is the sum of the two individual tuning ranges attributed to the active inductors and varactor diodes, a large phase shift is obtained compared to the case where only the varactor diodes are tunable. Thus, a phase shift of more than 270 within 2-dB insertion loss from 2. 1 to 2. 4 GHz is obtained with the fabricated single-stage reflection-type analog phase shifter. The total power consumption is less than 80 mW.

  • Single Low 2. 4-V Supply Operation GaAs Power MESFET Amplifier with Low-Distortion Gain-Variable Attenuator for 1. 9-GHz PHS Applications

    Masami NAGAOKA  Hirotsugu WAKIMOTO  Toshiki SESHITA  Katsue K. KAWAKYU  Yoshiaki KITAURA  Atsushi KAMEYAMA  Naotaka UCHITOMI  

     
    LETTER

      Vol:
    E81-C No:6
      Page(s):
    911-915

    A GaAs power MESFET amplifier with a low-distortion, 10-dB gain-variable attenuator has been developed for 1. 9-GHz Japanese personal handy phone system (PHS). Independently of its gain, a very low 600-kHz adjacent channel leakage power (ACP) with sufficient output power was attained. In single low 2. 4-V supply operation, an output power of 21. 1 dBm, a low dissipated current of 157 mA and a high power-added efficiency (PAE) of 37. 2% were obtained with an ACP of -55 dBc.

  • Index Reduction of Overlapping Strongly Sequential Systems

    Takashi NAGAYA  Masahiko SAKAI  Yoshihito TOYAMA  

     
    PAPER-Sofware System

      Vol:
    E81-D No:5
      Page(s):
    419-426

    Huet and Levy showed that index reduction is a normalizing strategy for every orthogonal strongly sequential term rewriting system. Toyama extended this result to root balanced joinable strongly sequential systems. In this paper, we present a class including all root balanced joinable strongly sequential systems and show that index reduction is normalizing for this class. We also propose a class of left-linear (possibly overlapping) NV-sequential systems having a normalizing strategy.

  • Negotiation Protocol for Connection Establishment with Several Competing Network Providers

    Nagao OGINO  

     
    PAPER-Communication Software

      Vol:
    E81-B No:5
      Page(s):
    1077-1086

    In the future, more and more network providers will be established through the introduction of an open telecommunications market. At this time, it is necessary to guarantee the fair competition between these network providers. In this paper, a negotiation protocol for connection establishment is proposed. This negotiation protocol is based on the concept of open, competitive bidding and can guarantee fair competition between the network providers. In this negotiation protocol, each network providers objective is to maximize its profit. Conversely, each users objective is to select a network provider which will supply as much capacity as required. Employing this negotiation protocol, the users and the network providers can select each other based on their objectives. In this paper, adaptation strategies which network providers and users can adopt under the proposed negotiation protocol framework are also discussed. A network provider which adopts this strategy can obtain enough profit even when the number of connection requests is small relative to the idle bandwidth capacity. Moreover, a user who adopts this strategy can be sure to obtain bandwidth even when the idle bandwidth capacity is small relative to the number of connection requests.

  • A Neural-Greedy Combination Algorithm for Board-Level Routing in FPGA-Based Logic Emulation Systems

    Nobuo FUNABIKI  Junji KITAMICHI  

     
    PAPER

      Vol:
    E81-A No:5
      Page(s):
    866-872

    An approximation algorithm composed of a digital neural network (DNN) and a modified greedy algorithm (MGA) is presented for the board-level routing problem (BLRP) in a logic emulation system based on field-programmable gate arrays (FPGA's) in this paper. For a rapid prototyping of large scale digital systems, multiple FPGA's provide an efficient logic emulation system, where signals or nets between design partitions embedded on different FPGA's are connected through crossbars. The goal of BLRP, known to be NP-complete in general, is to find a net assignment to crossbars subject to the constraint that all the terminals of any net must be connected through a single crossbar while the number of I/O pins designated for each crossbar m is limited in an FPGA. In the proposed combination algorithm, DNN is applied for m = 1 and MGA is for m 2 in order to achieve the high solution quality. The DNN for the N-net-M-crossbar BLRP consists of N M digital neurons of binary outputs and range-limited non-negative integer inputs with integer parameters. The MGA is modified from the algorithm by Lin et al. The performance is verified through massive simulations, where our algorithm drastically improves the routing capability over the latest greedy algorithms.

  • Fair-Sharing of Link and Buffer

    Yuguang WU  

     
    LETTER

      Vol:
    E81-B No:5
      Page(s):
    1025-1028

    We present techniques to implement fair-sharing on both link bandwidth and buffer space in a switch or router. Together they possess the following merits: 1. solving the counter-overflow problem; 2. avoiding the "credit" accumulation issue; 3. integrating bandwidth allocation with buffer management. The simplicity of this method makes it a viable candidate for implementational use on switches and routers.

  • A Representation Diagram for Maximal Independent Sets of a Graph

    Masakuni TAKI  Sumio MASUDA  Toshinobu KASHIWABARA  

     
    PAPER

      Vol:
    E81-A No:5
      Page(s):
    784-788

    Let H=(V(H),E(H)) be a directed graph with distinguished vertices s and t. An st-path in H is a simple directed path starting from s and ending at t. Let (H) be defined as { SS is the set of vertices on an st-path in H (s and t are excluded)}. For an undirected graph G=(V(G),E(G)) with V(G) V(H)- { s,t }, if the family of maximal independent sets of G coincides with (H), we call H an MIS-diagram for G. In this paper, we provide a necessary and sufficient condition for a directed graph to be an MIS-diagram for an undirected graph. We also show that an undirected graph G has an MIS-diagram iff G is a cocomparability graph. Based on the proof of the latter result, we can construct an efficient algorithm for generating all maximal independent sets of a cocomparability graph.

  • Shaping and Policing of Fractal Traffic

    Arnold L. NEIDHARDT  Frank HUEBNER  Ashok ERRAMILLI  

     
    PAPER-Long Range Dependence Traffic

      Vol:
    E81-B No:5
      Page(s):
    858-869

    We examine the effectiveness of shaping and policing mechanisms in reducing the inherent variability of fractal traffic, with the objective of increasing network operating points. Whether a shaper simply spaces a flow or allows small bursts according to a leaky bucket, we show using analytical arguments that, i) the Hurst parameter, which describes the asymptotic variability of the traffic, is unaffected; and ii) while the traffic can be made smoother over time scales smaller than one corresponding to the shapers buffer size, fluctuations over longer time scales cannot be appreciably altered. We further show that if shaping is used to reduce buffer size requirements at a network bottleneck, any savings here are offset by the increased buffer requirements at the shapers. Perhaps the most significant deficiency of shaping identified here is that it is necessary to model individual streams to a level of accuracy that is not feasible in practice. In contrast, statistical multiplexing can achieve reasonable network efficiencies by only requiring characterizations of aggregate traffic.

  • Real-Time Traffic Characterization for Quality-of-Service Control in ATM Networks

    Brian L. MARK  Gopalakrishnan RAMAMURTHY  

     
    INVITED PAPER

      Vol:
    E81-B No:5
      Page(s):
    832-839

    One of the important challenges in the design of ATM networks is how to provide quality-of-service (QoS) while maintaining high network resource utilization. In this paper, we discuss the role of real-time traffic characterization in QoS control for ATM networks and review several approaches to the problem of resource allocation. We then describe a particular framework for QoS control in which real-time measurements of a connection stream are used to determine appropriate parameters for usage parameter control (UPC). Connection admission control (CAC) is based on the characterization of the aggregate stream in terms of the individual stream UPC descriptors, together with real-time measurements.

  • ATM ABR Traffic Control with a Generic Weight-Based Bandwidth Sharing Policy: Theory and a Simple Implementation

    Yiwei Thomas HOU  Henry H. -Y. TZENG  Shivendra S. PANWAR  Vijay P. KUMAR  

     
    PAPER-ATM Traffic Control

      Vol:
    E81-B No:5
      Page(s):
    958-972

    The classical max-min policy has been suggested by the ATM Forum to support the available bit rate (ABR) service class. However, there are several drawbacks in adopting the max-min rate allocation policy. In particular, the max-min policy is not able to support the minimum cell rate (MCR) requirement and the peak cell rate (PCR) constraint for each ABR connection. Furthermore, the max-min policy does not offer flexible options for network providers wishing to establish a usage-based pricing criterion. In this paper, we present a generic weight-based rate allocation policy, which generalizes the classical max-min policy by supporting the MCR/PCR for each connection. Our rate allocation policy offers a flexible usage-based pricing strategy to network providers. A centralized algorithm is presented to compute network-wide bandwidth allocation to achieve this policy. Furthermore, a simple switch algorithm using ABR flow control protocol is developed with the aim of achieving our rate allocation policy in a distributed networking environment. The effectiveness of our distributed algorithm in a local area environment is substantiated by simulation results based on the benchmark network configurations suggested by the ATM Forum.

17321-17340hit(20498hit)