This article shows that a multivalued logic defined as juxtaposition of Boolean binary logics can use all of inference chain, induction and deduction that are important in realization of intelligent inference systems.

This paper describes methods of tracking of moving objects in a cluttered background by integrating optical flow, depth data, and/or uniform brightness regions. First, a basic method is introduced which extracts a region with uniform optical flow as the target region. Then an extended method is described in which optical flow and depth are fused. A target region is extracted by Baysian inference in term of optical flow, depth and the predicted target location. This method works only for textured objects because optical flow or depth are extracted for textured objects. In order to solve this problem, uniform regions in addition to the optical flow are used for tracking. Realtime human tracking is realized for real image sequences by using a real time processor with multiple DSPs.

This paper proposes a dual port color palette SRAM using a single bit line cell. Since the single bit line cell consists of fewer bit lines and transistors than standard dual port cells, it is able to reduce the area. However, the cell has had a problem in writing a high level. The port swap architecture solves the problem without any special mechanism such as a boot strap. In the architecture, each of two bit lines is assigned to the read/write MPU port and the read only pixel port, respectively. When writing a low level, the MPU port uses pre-assigned bit line. On the other hand, when writing a high level, the MPU port uses the bit line assigned to the pixel port by a swap operation. During the swapping, the pixel port continues the read operation by using the bit line assigned to the MPU port. A color palette using this architecture is fabricated with a 0. 5 µm CMOS process technology. The memory cell size reduces by up to 43% compared with standard dual port cells. The color palette is able to supply the pixel data at 300 MHz at the supply voltage of 3.3 V. This speed is enough to support the practical highest resolution monitors in the world.

Though response of neurons is mainly decided by synaptic events, the length of a time window for the neuronal response has still not been clarified. In this paper, we analyse the time window within which a neuron processes synaptic events, on the basis of the Hodgkin-Huxley equations. Our simulation shows that an active membrane property makes neurons' behavior complex, and that a few milliseconds is plausible as the time window. A neuron seems to detect coincidence synaptic events in such a time window.

The proposed method tracks the user location in a hierarchically distributed fashion. Call patterns in personal communications services (PCS) have the locality. The virtually hierarchical link (VHL) is used to support the call locality and makes the fast call set up possible. The locality consideration effectively reduces the query traffic compared with non-locality consideration.

Optical frequency division multiplexing (FDM) technique has the advantage of fully orthogonal transmissions. However, FDM system permits only a small number of FDM channels despite of a great effort, such as frequency stabilization. On the other hand, frequency-domain encoding code-division multiple-access (FE-CDMA) has been widely studied as a type of optical CDMA. In this system, encoding is done in the frequency domain of an ultrashort light pulse spread by optically Fourier transform. However, FE-CDMA accommodates very limited number of simultaneous users, though this scheme uses a vast optical bandwidth. It is attractive to consider the combination of both advantages of FDM and FE-CDMA. We propose FE-CDMA enhancement of FDM (FDM/FE-CDMA). Since in FDM/FE-CDMA the total bandwidth is partitioned into M optical bands and each band is encoded by the code with code length of Nc, we expect nearly perfect orthogonal transmissions. In addition, since the creation of FDM bands is realized by a passive filter, the optical frequency is precisely controlled and the optical frequency allocation is flexible. We derive the bit error rate (BER) as a function of the number of simultaneous users, bit rate, and the utilization efficiency of total bandwidth. We compare the performance of FDM/FE-CDMA with that of the conventional FE-CDMA in terms of the number of simultaneous users on condition that each chip width is constant. As a result, we show that FDM/FE-CDMA can support the larger number of simultaneous users than the conventional FE-CDMA at a given bit error rate under the same total bandwidth.

We demonstrate a very simple and compact optical transceiver diode module using a passive alignment on a silicon bench with a V-groove. The excess loss caused by the passive alignment of an optical transceiver diode and a flat-end optical fiber is only 0. 6 dB. A high coupling efficiency of -4. 3 dB is obtained. This results in a high responsivity with a wavelength- and polarization-independence of 0. 5 dB over a 70 nm wavelength range and in good laser performance.

In this paper we describe the pipeline design and enhanced hardware for fast message handling in a RICA-1 processor, a processing element (PE) in the RWC-1 multiprocessor. The RWC-1 is based on the reduced inter-processor communication architecture (RICA), in which communications are combined with computation in the processor pipeline. The pipeline is enhanced with hardware mechanisms to support fine-grain parallel execution. The data paths of the RICA-1 super-scalar processor are commonly used for communication as well as instruction execution to minimize its implementation cost. A 128-PE system has been built on January 1998, and it is currently used for hardware debugging, software development and performance evaluation.

In the design of an embedded system, an architecture of core processor strongly affects the performance and cost of the total system. This paper discusses a scalable processor architecture, called soft-core processor, which can be tuned for a target system. System designers can optimize several design parameters such as the datapath width and instruction set, and generate customized processors for their application. Design of Bung-DLX as a prototype of soft-core processor is presented in this paper. An experiment of system design using our processor has shown that the optimized processor chip area halves when the critical path delay is reduced to one third of the original one.

We fabricated a new lateral Power MOS FET with an SOI structure formed by a solid phase epitaxy method which has a buried gate under the channel layer and a trench gate/drain. We studied the temperature dependence of the Vg-Id characteristic and Vd-Id characteristic in the temperature range of from 27 to 150. In the Vd-Id characteristic, the drain current decreases as the temperature increases in the saturation region, but the drain current increases as the temperature increases in the linear region. Zero-temperature-coefficient bias point of Vg-Id characteristic was 0. 3 V. And, the threshold voltage variation was -2. 8 mV/. In the Vd-Id characteristic, the drain current decreases as the temperature increases. The specific on-resistance was obtained in the linear region of the Vd-Id characteristic. The specific on-resistance variation was 0. 3 mWmm2/. The temperature characteristics of this device are as good as those of the conventional MOS FET.

This paper presents both new analytical and new numerical solutions to the problem of generating waveforms exhibiting a low peak-to-peak factor. One important application of these results is in the generation of pseudo-white noise signals that are commonly uses in multi-frequency measurements. These measurements often require maximum signal-to-noise ratio while maintaining the lowest peak-to-peak excursion. The new synthesis scheme introduced in this paper uses the Discrete Fourier Transform (DFT) to generate pseudo-white noise sequence that theoretically has a minimized peak-to-peak factor, Fp-p. Unlike theoretical works in the literature, the method presented here is based in purely discrete mathematics, and hence is directly applicable to the digital synthesis of signals. With this method the shape of the signal can be controlled with about N parameters given N harmonic components. A different permutation of the same set of offset phases of the "source harmonics" creates an entirely different sequence.

An asynchronous pulse neural network model which is suitable for VLSI implementation is proposed. The model neuron can function as a coincidence detector as well as an integrator depending on its internal time-constant relative to the external one, and show complex dynamical behavior including chaotic responses. A network with the proposed neurons can process spatio-temporal coded information through dynamical cell assemblies with functional synaptic connections.

The dependence of the negative nonlinear absorption effect on the modulation degree and frequency of the incident laser was investigated in Er3+: LiYF4 crystals. With a decreasing modulation degree, a reverse-phased waveform was obtained in the transmitted waveform for modulation intensities of sinusoidal and rectangle waves. The transmitted waveform was observed symmetrically at modulation frequency of 0. 25 MHz. However, the transmitted waveform was asymmetrical at higher than 0. 5 MHz. In addition, the reverse-phased waveforms were obtained for sample lengths greater than 12 mm in the incident modulation degree of 10 to 56%. The NNA effect was observed at a temperature range of 20 to 500 K. It has been confirmed that a mechanism of the negative nonlinear absorption can be explained by considering an enhanced absorption model for a five-level system of the Er3+ ion.

This paper describes a real-time connection admission control scheme for supporting multiple service categories. The scheme is based on a real-time cell-loss ratio evaluation algorithm for VBR based on peak/sustainable cell rates and maximum burst size. The algorithm is based on a notion of Allan variance of VP utilization. The most remarkable characteristics of the admission control scheme are that it terminates within constant time, a few milliseconds, and that its time is independent of both the number of VCs and the capacity of a cell buffer.

In the design of nonlinear reliable controllers, one major issue is to solve for the solutions of the Hamilton-Jacobi inequality. In general, it is hard to obtain a closed form solutions due to the nonlinear nature of the inequality. In this paper, we seek for the existence conditions of quadratic type positive semidefinite solutions of Hamilton-Jacobi inequality. This is achieved by taking Taylor's series expansion of system dynamics and investigating the negative definiteness of the associated Hamilton up to fourth order. An algorithm is proposed to seek for possible solutions. The candidate of solution is firstly determined from the associated algebraic Riccati inequality. The solution is then obtained from the candidate which makes the truncated fourth order polynomial of the inequality to be locally negative definite. Existence conditions of the solution are explicitly attained for the cases of which system linearization possesses one uncontrollable zero eigenvalue and a pair of pure imaginary uncontrollable eigenvalues. An example is given to demonstrate the application to reliable control design problem.

In order to improve microprocessor performance, we propose to utilize histories of dynamic instruction sequences. A lot of special purpose memories integrated in a processor chip hold the histories. In this paper, we describe the usefulness of using two special purpose memories: Non-Consecutive basic block Buffer (NCB) and Reference Prediction Table (RPT). The NCB improves instruction fetching efficiency in order to relieve control dependences. The RPT predicts data addresses in order to speculate data dependences. From the simulation study, it has been found that the proposed mechanisms improve processor performance by up to 49. 2%.

In this paper we propose a total quality evaluation method in an ATM network-type remote conference system, and describe the results of evaluations of a proving system. The quality of a remote conference system depends on such various elements as video images, voice signals, and cost; but a total quality index may be regarded as the cost of a remote conference system compared with that of a conventional face-to-face conference. Here, however, the decline in communication quality arising from the remote locations of participants must be included in the evaluation. Moreover, the relative weightings of voice signals, video images of participants, and shared data will vary depending on the type of conference, and these factors must also be taken into account in evaluations. An actual conference systems were constructed for evaluation, and based on a MOS (Mean Opinion Score) of the quality elements, the total system quality was evaluated with reference to the proposed concepts. These results are also described in this paper.

We present a cascade neural network for blind source extraction. We propose a family of unconstrained optimization criteria, from which we derive a learning rule that can extract a single source signal from a linear mixture of source signals. To prevent the newly extracted source signal from being extracted again in the next processing unit, we propose another unconstrained optimization criterion that uses knowledge of this signal. From this criterion, we then derive a learning rule that deflates from the mixture the newly extracted signal. By virtue of blind extraction and deflation processing, the presented cascade neural network can cope with a practical case where the number of mixed signals is equal to or larger than the number of sources, with the number of sources not known in advance. We prove analytically that the proposed criteria both for blind extraction and deflation processing have no spurious equilibria. In addition, the proposed criteria do not require whitening of mixed signals. We also demonstrate the validity and performance of the presented neural network by computer simulation experiments.

This paper describes an efficient simulation algorithm for the spatiotemporal pattern analysis of the continuous-time neural networks with the multivalued logic (multivalued continuous-time neural networks). The multivalued transfer function of neuron is approximated to the stepwise constant function which is constructed by the sum of the step functions with the different thresholds. By this approximation, the dynamics of the network can be formulated as a stepwise constant linear differential equation at each timestep and the optimal timestep for the numerical integration can be obtained analytically. Finally, it is shown that the proposed method is much faster than a variety of conventional simulators.

This letter presents a new algorithm for improving the Signal to Noise Ratio (SNR) of complex sinusoidal signals contaminated by additive Gaussian noises using sum of Higher-Order Statistics (HOS). We conduct some computer simulations to show that the proposed algorithm can improve the SNR more than 7 dB compared with the conventional coherent integration when the SNR of the input signal is -10 dB.