A new analog mismatch model in circuit level has been developed. MOS transistor's small signal parameters are modeled in term of their matching character for both strong- and weak-inversion operations. Mismatch analysis on basic CMOS amplifiers are conducted with proposed model and Monte Carlo SPICE simulations. We successfully derived simple analytical formula on performance mismatch for analog CMOS circuits, which is verified to be accurate in using actual analog circuit design, within an average error of less than 10%.

This letter proposes a mismatch insensitive switched-capacitor multiply-by-four (4X) amplifier using the voltage addition scheme. The proposed circuit provides 2-times faster speed and about half of silicon area when compared with the cascade of conventional 2X amplifiers. Monte-Carlo simulation results show about 15% gain accuracy improvement over the cascaded 2X- amplifiers.

We present a recovery scheme based on Self-protected Spanning Tree (SST), which recovers from failure all by itself. In the recovery scheme, the links are assigned birthdays to denote the order in which they are to be considered for adding to the SST. The recovery mechanism, named Birthday-based Link Replacing Mechanism (BLRM), is able to transform a SST into a new spanning tree by replacing some tree links with some non-tree links of the same birthday, which ensures the network connectivity after any single link or node failure. First, we theoretically prove that the SST-based recovery scheme can be applied to arbitrary two-edge connected or two connected networks. Then, the recovery time of BLRM is analyzed and evaluated using Ethernet, and the simulation results demonstrate the effectiveness of BLRM in achieving fast recovery. Also, we point out that BLRM provides a novel load balancing mechanism by fast changing the topology of the SST.

The performance of an analog winner-take-all (WTA) circuit is affected by the corner error and the offset error. Despite the fact that the corner error can be reduced with large transconductance of the transistor, the offset error caused by device mismatch has not been completely studied. This paper presents the complete offset error analysis, and proposes low offset design guidelines and an offset cancellation scheme. The experimental results show good agreement with the theoretical analysis and the drastic improvement of the offset error.

This paper proposes a new charge pump to suppress spurious noise of phase-locked loops. The spurious noise is induced by charge injection generated from the parasitic capacitors associated with switches and the current-mismatch between the charging and discharging currents of the charge pump. A new charge pump is configured by adding an operational amplifier, a sample-and-hold circuit, and switches to a basic charge pump. During the idling time of the charge pump, the currents of the current sources are adjusted and the current-mismatch are reduced to 0.3%. Applying the proposed charge pump to a phase-locked loop, we can suppress the spurious noise by 18 dB compared with a PLL using a basic one.

A microwave resonator is fabricated by a lump of spherical metal particles for the first time. It is the evidence that those particles constitute artificial dielectrics. The effective permittivity is calculated numerically together with the permeability. Resonant mode frequencies in the experiment are compared with the theoretical result obtained by the effective material constants above. Their reasonable agreement indicates the validity of material constant extraction. The unique diamagnetism of spherical particles could be utilized for improvement of spurious property of a resonator.

Recently, real-time media delivery services such as video streaming and VoIP have rapidly become popular. For these applications requiring high-level QoS guarantee, our research group has proposed a transport-layer approach to provide predictable throughput for upper-layer applications. In the present paper, we propose a congestion control mechanism of TCP for achieving predictable throughput. It does not mean we can guarantee the throughput, while we can provide the throughput required by an upper-layer application at high probability when network congestion level is not so high by using the inline network measurement technique for available bandwidth of the network path. We present the evaluation results for the proposed mechanism obtained in simulation and implementation experiments, and confirm that the proposed mechanism can assure a TCP throughput if the required bandwidth is not so high compared to the physical bandwidth, even when other ordinary TCP (e.g., TCP Reno) connections occupy the link.

The insoluble Prussian-blue (PB) pigment becomes possible to disperse in aqueous solution by covering their surfaces with ferrocyanide anions. The thin film fabricated with these water-dispersible PB nanoparticles shows evident electrochromic color changes between +0.8 V to -0.4 V on an ITO substrate. The mass change of the thin film during an electrochemical reaction is measured by means of electrochemical quartz crystal microbalance (EQCM). According to the EQCM analysis, the filling rate of water-dispersible PB nanoparticles in the film is 37.7% as compared with an assumed perfect crystal PB film.

In this paper, we propose an extension to GridFTP that optimizes its performance by dynamically adjusting the number of parallel TCP connections. GridFTP has been used as a data transfer protocol to effectively transfer a large volume of data in Grid computing. GridFTP supports a feature called parallel data transfer that improves throughput by establishing multiple TCP connections in parallel. However, for achieving high GridFTP throughput, the number of TCP connections should be optimized based on the network status. In this paper, we propose an automatic parallelism tuning mechanism called GridFTP-APT (GridFTP with Automatic Parallelism Tuning) that adjusts the number of parallel TCP connections according to information available to the Grid middleware. Through simulations, we demonstrate that GridFTP-APT significantly improves the performance of GridFTP in various network environments.

Compact and planar active integrated antenna arrays with a high power multi-stage amplifier were developed with effective heat sink mechanism. By attaching an aluminum plate to the backside of the creased amplifier circuit board, effective cooling can be achieved. The nonlinear behavior of the amplifier agrees well with the simulation based on the Angelov model. The high power amplifier circuit consisted of the three-stage amplifier and operated with an output power of 4 W per each element at 5.8 GHz. The 32-element active integrated antenna array stably operated with the output power of 120 W under the effective heat sink design. With a weight of 4 kg, the weight-to-output power ratio and the volume-to-output power ratio of the antenna array are 33.3 g/W and 54.5 cm3/W, respectively. Wireless power transmission was also successfully demonstrated.

In this letter, a decision-directed MOE detector with excellent robustness against signature waveform mismatch is proposed for DS-CDMA systems. Both the theoretic analysis and computer simulation results demonstrate that the proposed detector can provide better SINR performance than that of conventional detectors.

We consider the mismatched measurements in the BB84 quantum key distribution protocol, in which measuring bases are different from transmitting bases. We give a lower bound on the amount of a secret key that can be extracted from the mismatched measurements. Our lower bound shows that we can extract a secret key from the mismatched measurements with certain quantum channels, such as the channel over which the Hadamard matrix is applied to each qubit with high probability. Moreover, the entropic uncertainty principle implies that one cannot extract the secret key from both matched measurements and mismatched ones simultaneously, when we use the standard information reconciliation and privacy amplification procedure.

A two-quadrant CMOS current-mode plug-in divider using a compact 1/x device is presented. The mismatch errors of 1/x device cancel part of mismatch errors of the proposed divider. The simulation results indicate that the plug-in divider is feasible by the proposed approximation method. The adjustable 1/x device could be applied in difference ranges.

This paper proposes a 12-bit 3.7-MS/s pipelined A/D Converter based on the novel capacitor mismatch calibration technique. The conventional stage is improved to an algorithmic circuit involving charge summing, capacitors' exchange and charge redistribution, simply through introducing some extra switches into the analog circuit. This proposed ADC obtains the linearity beyond the accuracy of the capacitor match and verifies the validity of reducing the nonlinear error from the capacitor mismatch to the second order without additional power dissipation through the novel capacitor mismatch calibration technique. It is processed in 0.5 µm CMOS technology. The transistor-level simulation results show that 72.6 dB SNDR, 78.5 dB SFDR are obtained for a 2 V Vpp 159.144 kHz sine input sampled at 3.7 MS/s. The whole power dissipation of this ADC is 33.4 mW at the power supply of 5 V.

The shellcode use of the polymorphic form has become active as the de facto method for avoiding signature based network security system. We present a new static analysis method for detecting the decryption routine of the polymorphic shellcode. This method traces the processes by which the decryption routine stores the current program counter in a stack, moves the value between registers and uses the value in order to make the address of the encrypted code accessible. Most of decryption routines have the feature which they use the program counter stored on a stack as the address for accessing the memory that the encrypted code is positioned.

To design secure blockciphers, estimating immunity against differential attack and linear attack is essential. Recently, Diffusion Switching Mechanism (DSM) is proposed as a design framework to enhance the immunity of Feistel structure against differential attack and linear attack. In this paper, we give novel results on the effect of DSM on three generalized Feistel structures, i.e. Type-I, Type-II and Nyberg's structures. We first show a method for roughly estimating lower bounds of a number of active S-boxes in Type-I and Type-II structures using DSM. Then we propose an improved search algorithm to find lower bounds for generalized structures efficiently. Experimental results obtained by the improved algorithm show that DSM raises lower bounds for all of the structures, and also show that Nyberg's structure has the slowest diffusion effect among them when SP-type F-functions are used.

Current NoC test scheduling methodologies in the literature are based on a dedicated path approach; a physical path through the NoC routers and interconnects are allocated for the transportation of test data from an external tester to a single core during the whole duration of the core test. This approach unnecessarily limits test concurrency of the embedded cores because a physical channel bandwidth is typically larger than the scan rate of any core-under-test. We are proposing a bandwidth sharing approach that divides the physical channel bandwidth into multiple smaller virtual channel bandwidths. The test scheduling is performed under the objective of co-optimizing the wrapper area cost and the resulting test application time using two complementary NoC wrappers. Experimental results showed that the area overhead can be optimized (to an extent) without compromising the test application time. Compared to other NoC scheduling approaches based on dedicated paths, our bandwidth sharing approach can reduce the test application time by up to 75.4%.

Three-dimensional visualization using jigsaw-puzzle-like glyphs, or shapes, is proposed as a means of representing grammatical constraints in programming. The proposed visualization uses 3D glyphs such as convex, concave, and wireframe shapes. A semantic constraint, such as a type constraint in an assignment, is represented by an inclusive match between 3D glyphs. An application of the proposed visualization method to a subset of the Java programming language is demonstrated. An experimental evaluation showed that the 3D glyphs are easier to learn and enable users to more quickly understand their relationships than 2D glyphs and 1D symbol sequences.

This paper reviews techniques for digitally assisted pipeline ADCs. Errors of pipeline ADCs originated by capacitor mismatch, finite amplifier gain, incomplete settling and offset can be corrected in digital-domain foreground or background calibrations. In foreground calibrations, the errors are measured by reconfiguration of the building blocks of pipeline ADC or using an INL plot without reconfiguration. In background calibrations, the errors are measured with random signal and continuously corrected while simultaneously performing the normal A/D conversions. Techniques for measuring and correcting the errors at foreground and background are reviewed and a unified approach to the description of the principle of background calibration of gain errors is presented.

In this paper, we propose δ-similar elimination to improve the search performance of multiobjective evolutionary algorithms in combinatorial optimization problems. This method eliminates similar individuals in objective space to fairly distribute selection among the different regions of the instantaneous Pareto front. We investigate four eliminating methods analyzing their effects using NSGA-II. In addition, we compare the search performance of NSGA-II enhanced by our method and NSGA-II enhanced by controlled elitism.