This paper suggests an outphasing scheme to reduce adjacent channel spectral regrowth triggered by the gain and phase mismatch between two signal paths in linear amplification with nonlinear component (LINC) systems. The error vector magnitude and power spectral density of the output signal considering path mismatch are described analytically using path mismatch factor. An outphasing scheme is proposed to reduce the spectral regrowth. The proposed outphasing scheme reshapes the phases of the separated signals in LINC systems to reduce the changes of the phases. Its performance is verified by performing simulations with multi-tone signals. The result shows that the scheme can reduce the spectral regrowth of the multi-tone signals significantly compared to the conventional outphasing scheme for LINC systems with path imbalance.

We propose a novel 13 planar optical switch using aspheric lenses and carrier-induced tunable prisms on InP. An input light beam is collimated by the aspheric lenses in a slab waveguide. The tunable prism, whose refractive indices are tuned by the carrier plasma effect, deflect the collimated light beam and guide it to the output ports. The switching operations of the 13 optical switch that consists of five lenses and eight prisms with a footprint of 5003500 µm are performed by three-dimensional beam propagation methods. A static switching operation with a 5-dB insertion loss and a 13-dB extinction ratio is obtained with 70-mA current injection for each prism. This device has a simple structure and low power consumption and may be useful for optical packet switching systems.

An AdaBoost-based face detection system is proposed, on a Coarse Grain Reconfigurable Architecture (CGRA) named “REMUS-II”. Our work is quite distinguished from previous ones in three aspects. First, a new hardware-software partition method is proposed and the whole face detection system is divided into several parallel tasks implemented on two Reconfigurable Processing Units (RPU) and one micro Processors Unit (µPU) according to their relationships. These tasks communicate with each other by a mailbox mechanism. Second, a strong classifier is treated as a smallest phase of the detection system, and every phase needs to be executed by these tasks in order. A phase of Haar classifier is dynamically mapped onto a Reconfigurable Cell Array (RCA) only when needed, and it's quite different from traditional Field Programmable Gate Array (FPGA) methods in which all the classifiers are fabricated statically. Third, optimized data and configuration word pre-fetch mechanisms are employed to improve the whole system performance. Implementation results show that our approach under 200 MHz clock rate can process up-to 17 frames per second on VGA size images, and the detection rate is over 95%. Our system consumes 194 mW, and the die size of fabricated chip is 23 mm2 using TSMC 65 nm standard cell based technology. To the best of our knowledge, this work is the first implementation of the cascade Haar classifier algorithm on a dynamically CGRA platform presented in the literature.

In this paper, the substitutability of the indifferentiability framework with non-sequential scheduling is examined by reformulating the framework through applying the Task-PIOA framework, which provides non-sequential activation with oblivious task sequences. First, the indifferentiability framework with non-sequential scheduling is shown to be able to retain the substitutability. Thus, the substitutability can be applied in another situation that processes of the systems may behave non-sequentially. Next, this framework is shown to be closely related to reducibility of systems. Reducibility is useful to discuss about the construction of a system from a weaker system. Finally, two modelings with respectively sequential scheduling and non-sequential scheduling are shown to be mutually independent. We find examples of systems which are indifferentiable under one model but differentiable under the other. Thus, the importance of scheduling in the indifferentiability framework is clarified.

The electric field mill in our underground observation room detected a co-seismic electromagnetic signal in the vertical electrostatic field ca. 8 s after the origin time of the Niigataken Chuetsu-oki Earthquake in 2007, but ca. 30 s before the arrival time of the P-waves.

A non-audible murmur (NAM), a very weak whisper sound produced without vocal fold vibration, has been researched in the development of a silent-speech communication tool for functional speech disorders as well as human-to-human/machine interfaces with inaudible voice input. The NAM can be detected using a specially designed microphone, called a NAM microphone, attached to the neck. However, the detected NAM signal has a low signal-to-noise ratio and severely suppressed high-frequency component. To improve NAM clarity, the mechanism of a NAM production must be clarified. In this work, an air flow through a glottis in the vocal tract was numerically simulated using computational fluid dynamics and vocal tract shape models that are obtained by a magnetic resonance imaging (MRI) scan for whispered voice production with various strengths, i.e. strong, weak, and very weak. For a very weak whispering during the MRI scan, subjects were trained, just before the scanning, to produce the very weak whispered voice, or the NAM. The numerical results show that a weak vorticity flow occurs in the supraglottal region even during a very weak whisper production; such vorticity flow provide aeroacoustic sources for a very weak whispering, i.e. NAM, as in an ordinary whispering.

This paper focuses on the research of a new high-speed DC switch repulsion mechanism with experimental and simulation methods. Multi-physical equations reflecting the transient electromagnetic field, electric circuit, mechanical motion and material deformation are coupled in the calculation. For the reason of accuracy, skin effect and the proximity effect caused by the current in the coil are also taken into account. According to the simulation results, which indicate several key parameters severely affecting the mechanism speed, a high-speed DC switch repulsion mechanism is developed. By the test of mechanism motion, its average speed can be up to 8.4 m/s and its mechanism response time is 250 µs, which verifies the simulation results. Furthermore, during high speed motion the stress on the metal plate and moving contact is also discussed. It is noticed that the influence of the material deformation on the mechanical motion is very important.

Power consumption has become an increasing concern in high performance microprocessor design. Especially, Instruction Cache (I-Cache) contributes a large portion of the total power consumption in a microprocessor, since it is a complex unit and is accessed very frequently. Several studies on low-power design have been presented for the power-efficient cache design. However, these techniques usually suffer from the restrictions in the traditional Instruction Fetch Unit (IFU) architectures where the fetch address needs to be sent to I-Cache once it is available. Therefore, work to reduce the power consumption is limited after the address generation and before starting an access. In this paper, we present a new power-aware IFU architecture, named Analysis Before Starting an Access (ABSA), which aims at maximizing the power efficiency of the low-power designs by eliminating the restrictions on those low-power designs of the traditional IFU. To achieve this goal, ABSA reorganizes the IFU pipeline and carefully assigns tasks for each stages so that sufficient time and information can be provided for the low-power techniques to maximize the power efficiency before starting an access. The proposed design is fully scalable and its cost is low. Compared to a conventional IFU design, simulation results show that ABSA saves about 30.3% fetch power consumption, on average. I-Cache employed by ABSA reduces both static and dynamic power consumptions about 85.63% and 66.92%, respectively. Meanwhile the performance degradation is only about 0.97%.

Verifying the signing order is sometimes very important in multisignature schemes. A multisignature scheme in which the signing order can be verified is called structured multisignature scheme and many such schemes have been proposed so far. However, there are not many structured multisignature schemes utilizing an algebraic structure of underlying algebraic operation. Ohmori, Chida, Shizuya and Nishizeki have proposed a structured multisignature scheme by utilizing a non-commutative ring homomorphism. Since their scheme does not fully reflect the structure of signers and its rigorous security analysis is not provided, we construct an improved structured multisignature scheme overcoming these problems by utilizing the non-commutative ring homomorphism in a different way and discuss its rigorous security against various attacks, including signer structure forgery, rogue key attack and attack-0 under the discrete logarithm assumption. As far as we know, the scheme in [30], which does not use non-commutative ring homomorphism, guarantees the most rigorous security but the number of signers is restricted in order to prevent attack-0. In contrast, our scheme overcomes attack-0 by virtue of a ring homomorphism and no restriction is imposed on the number of signers.

In the present paper, we propose elliptic curve scalar multiplication methods on pairing-friendly elliptic curves. The proposed method is efficient on elliptic curves on which Atei pairing or optimal pairing is efficiently computed.

This paper shows a simple methodology for shortening a ciphertext of reproducible key encapsulation mechanisms. Specifically, it transforms a key encapsulation mechanism having OW-CCCA security and reproducibility into that of IND-CCA secure in the random oracle model whose ciphertext is shorter. Various existing chosen-ciphertext secure key encapsulation mechanisms (in the standard model) are reproducible, and thus their ciphertext can be shortened by the proposed transformation. The transformed scheme requires only one additional hashing for encryption. This property enables us to implement both the original scheme and the transformed scheme into a single chip simultaneously with small gate-size overhead. Using this chip, a sender can flexibly switch schemes to encrypt a message in a message-by-message manner. Such a use of schemes is also analyzed.

For analog applications, the Metal-Insulator-Metal (MIM) capacitance has to be measured at a much higher resolution than using the conventional methods, i.e. to a sub-femto level. A new robust mismatch measurement technique is proposed, which is more accurate and robust compared to the conventional Floating Gate Capacitance Measurement (FGCM) methods. A capacitance mismatching measurement methodology based on Vs is more stable than that based on Vf because the influence of pre-existing charge in the floating-gate can be cancelled in the slope of ΔVs/ΔVf based on Vs. The accuracy of this method is evaluated through silicon measurement in a 0.13 µm technology. It shows that, compared to the ideal value, the average of the new method are within 0.12% compared to 49.23% in conventional method while the standard deviation is within 0.15%.

A half-cylindrical BK-7 prism/dielectric film with a grating/Ag film/fluorescent polymer film structure was prepared, and its surface plasmon (SP) excitation property was investigated. It was confirmed experimentally that SP excitations are possible in this structure by using prism and grating couplings. The SP excitation property depended on the direction of the grating vector. Furthermore, intense photoluminescence was observed when the SPs were simultaneously excited at the Ag/polymer interface by prism coupling and at the Cytop/Ag interface by grating coupling.

The logic mapping problem and the problem of finding a largest sub-crossbar with no defects in a nano-crossbar with nonprogrammable-crosspoint defects and disconnected-wire defects are known to be NP-hard. This paper shows that for nano-crossbars with only disconnected-wire defects, the former remains NP-hard, while the latter can be solved in polynomial time.

Routing is still a challenging issue for wireless sensor networks (WSNs), in particular for WSNs with a non-uniform deployment of nodes. This paper introduces a Node Aggregation Degree-aware Random Routing (NADRR) algorithm for non-uniform WSNs with the help of two new concepts, namely the Local Vertical Aggregation Degree (LVAD) and Local Horizontal Aggregation Degree (LHAD). Our basic idea is to first apply the LVAD and LHAD to determine one size-proper forwarding region (rather than a fixed-size one as in uniform node deployment case) for each node participating in routing, then select the next hop node from the size-proper forwarding region in a probabilistic way, considering both the residual energy and distribution of nodes. In this way, a good adaptability to the non-uniform deployment of nodes can be guaranteed by the new routing algorithm. Extensive simulation results show that in comparison with other classical geographic position based routing algorithms, such as GPSR, TPGF and CR, the proposed NADRR algorithm can result in lower node energy consumption, better balance of node energy consumption, higher routing success rate and longer network lifetime.

Device mismatch plays an important role in the design of accurate analog circuits. The common centroid structure is commonly employed to reduce device mismatches caused by symmetrical layouts and processing gradients. Among the candidate placements generated by the common centroid approach, however, whichever achieves better matching is generally difficult to be determined without performing the time-consuming yield evaluation process. In addition, this rule-based methodology makes it difficult to achieve acceptable matching between multiple capacitors and to handle an irregular layout area. Based on a spatial correlation model, this study proposed a design methodology for yield enhancement of analog circuits using switched-capacitor techniques. An efficient and effective placement generator is developed to derive a placement for a circuit to achieve the highest or near highest correlation coefficient and thus accomplishing a better yield performance. A simple yield analysis is also developed to evaluate the achieved yield performance of a derived placement. Results show that the proposed methodology derives a placement which achieves better yield performance than those generated by the common centroid approach.

In this paper, a new adaptive online price control scheme is formalized based on the Stackelberg game model. To provide the most desirable network performance, the proposed scheme consists of two different control mechanisms; user-based and operator-based mechanisms. By using the hierarchical interaction strategy, control decisions in each mechanism act cooperatively and collaborate with each other to satisfy conflicting performance criteria. With a simulation study, the proposed scheme can adaptively adjust the network price to approximate an optimized solution under widely diverse network situations.

Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modern wireless communication systems with multiple code rates and various code lengths. This paper presents the generic permutation network (GPN) for the reconfigurable QC-LDPC decoder. Compared with conventional permutation networks, this proposal could break through the input number restriction, such as power of 2 and other limited number, and optimize the network for any application in demand. Moreover, the proposed scheme could greatly reduce the latency because of less stages and efficient control signal generating algorithm. In addition, the proposed network processes the nature of high parallelism which could enable several groups of data to be cyclically shifted simultaneously. The synthesis results using the 90 nm technology demonstrate that this architecture can be implemented with the gate count of 18.3k for WiMAX standard at the frequency of 600 MHz and 10.9k for WiFi standard at the frequency of 800 MHz.

While volunteer computing (VC) systems reach the most powerful computing platforms, they still have the problem of guaranteeing computational correctness, due to the inherent unreliability of volunteer participants. Spot-checking technique, which checks each participant by allocating spotter jobs, is a promising approach to the validation of computation results. The current spot-checking is based on the implicit assumption that participants never distinguish spotter jobs from normal ones; however generating such spotter jobs is still an open problem. Hence, in the real VC environment where the implicit assumption does not always hold, spot-checking-based methods such as well-known credibility-based voting become almost impossible to guarantee the computational correctness. In this paper, we generalize spot-checking by introducing the idea of imperfect checking. This generalization allows to guarantee the computational correctness under the situation that spot-checking is not fully-reliable and participants may distinguish spotter jobs. Moreover, we develop a generalized formula of the credibility, which enables credibility-based voting to utilize check-by-voting technique. Simulation results show that check-by-voting improves the performance of credibility-based voting, while guaranteeing the same level of computational correctness.

This paper presents a calibration scheme for delay mismatch between envelope and phase in the OFDM polar transmitter. An asynchronous delay detection method is proposed to avoid using a complicated signal processing algorithm or synchronous elements which need high clocking rates for detecting small delay mismatch. This scheme uses buffer delay chains to estimate the mismatch and then the estimated delay values are asynchronously stored in registers. It is verified that the proposed scheme well suites application to the OFDM polar transmitter through SPW, Matlab and HDL simulations. It achieves the margin of about 20 dB at 20 MHz offset, 10 dB at 40 MHz offset in terms of spectral limit specified in WLAN standard.