This study was conducted to examine the relationship between technostress - techno-centered tendency- and antisocial behavior on computers. Questionnaire data of computer operators were analyzed by multivariate-analysis. The results of the analysis indicated that high techno-centered tendency has a strong relationship with antisocial behavior on computers. Among the component factors of techno-centered tendency, absorption in operating computers was proven to have the strongest association with antisocial behavior on computers.

In this paper we propose a parallel and distributed computation of genetic local search with irregular topology in distributed environments. The scheme we propose in this paper is implemented with a tree topology established on an irregular network where each computing element carries out genetic local search on its own chromosome set and communicates with its parent when the best solution of each generation is updated. We evaluate the proposed algorithm by a simulation system implemented on a PC-cluster. We test our algorithm on four types topologies: star, line, balanced binary tree and sided binary tree, and investigate the influence of communication topology and delay on the evolution process.

The proposed comparator includes high gain preamplifier with a new swing limiter. It is shown that, for a given unity gain bandwidth, the high gain preamplifier of high output impedance can be made faster than the low gain one if properly combined with a high-speed low-level swing limiter.

In this paper, we perform some experiments to show that the quantization noise caused by low-bit-rate speech coding can be characterized as a white noise process. Then, the signal-to-quantization noise ratio of the decoded speech for a given bit-rate is estimated by observing the perceptual speech quality equivalent to the artificially generated noisy speech obtained by adding a white Gaussian noise source. This information is incorporated into the parameter tuning of a noise-robust compensation algorithm for speech recognition so that the compensation algorithm can be performed better under a range of the estimated SNRs. Finally, we apply the compensation algorithm to a connected digit string recognition system that utilizes speech signals decoded by the GSM adaptive multi-rate (AMR) speech coder. It is shown that the noise-robust compensation algorithm reduces word error rates by 15% or more at low bit-rate modes of the AMR speech coder.

DNA Sequence Design Problem is a crucial problem in information-based biotechnology such as DNA computing. In this paper, we introduce a powerful design strategy for DNA sequences by refining Random Generator. Random Generator is one of the design strategies and offers great advantages, but it is not a good algorithm for generating a large set of DNA sequences. We propose a Two-Step Search algorithm, then show that TSS can generate a larger set of DNA sequences than Random Generator by computer simulation.

This paper describes a design of a compact active loop filter for Phase-Locked-Loop (PLL) with adaptive biasing technique. Using the new loop filter, the PLL can automatically adjust the loop bandwidth and damping factor to the frequency of the reference clock. Moreover, the new LPF can decrease the capacitance value to 1/10-1/20 of conventional one. A test chip was fabricated in 0.15 µm-CMOS process. The total chip area of the PLL is reduced to 1/2 of the previous one. The jitter performance is almost equal to conventionally biased PLL.

This paper proposed a new watermarking algorithm and implementation in hardware, by which the watermarking process and an image compression process can operate in conjunction, in parallel, and/or without degrading the performance of the compression process. The goal of the proposed watermarking scheme is to provide the bases to insist the ownership and to authenticate integrity of the watermark-embedded image by detecting the errors and their positions without the original image (blind watermarking). Our watermarking scheme is to replace the watermark with one or several bit-plane(s) of the DC subband after 2DDWT (2-Dimensional Discrete Wavelet Transform) decomposition which is the basic transformation in DWT-based image compression such as JPEG2000. If more than one bit-plane is involved, the position to embed each watermark bit is randomly selected among the bit-planes by a random number generated with an LFSR (Linear Feedback Shift Register). Experimental results showed that for all the considered attacks except the high compression by JPEG, the error ratios in the extracted watermarks by our algorithm were below 3% and the extracted watermarks were unambiguously recognizable in all the cases. The hardware (FPGA)-implemented result could operate stably in 82 MHz clock frequency. This hardware was merged to DWT-based image compression codec which runs in a real-time in 66 MHz of clock frequency. This resulted in the real-time operation for codec and watermarking together in 66 MHz of clock frequency. The watermarking scheme used 4,037 LABs (24%) of the hardware resource of APEX20KC EP20K400CF672-7 from Altera.

This paper first discusses the misinterpretation of the concept of "ubiquitous computing" that Mark Weiser originally proposed in 1991. Weiser's main message was not the ubiquity of computers, but the transparency of interface that determines users' perception of digital technologies embedded in our physical environment seamlessly. To explore Weiser's philosophy of transparency in interfaces, this paper presents the design of an interface that uses glass bottles as "containers" and "controls" for digital information. The metaphor is a perfume bottle: Instead of scent, the bottles have been filled with music -- classical, jazz, and techno music. Opening each bottle releases the sound of a specific instrument accompanied by dynamic colored light. Physical manipulation of the bottles -- opening and closing -- is the primary mode of interaction for controlling their musical contents. The bottles illustrates Mark Weiser's vision of the transparent (or invisible) interface that weaves itself into the fabric of everyday life. The bottles also exploits the emotional aspects of glass bottles that are tangible and visual, and evoke the smell of perfume and the taste of exotic beverages. This paper describes the design goals of the bottle interface, the arrangement of musical content, the implementation of the wireless electromagnetic tag technology, and the feedback from users who have played with the system.

We consider a blind estimation of the vector channel for systems with receive diversity. The objective of this paper is to reduce the complexity of the conventional subspace-based method in vector channel estimation. A reduced-complexity estimation scheme is proposed, which is based on selecting a column of the covariance matrix of the received signal vectors. The complexity and performance of the proposed scheme is investigated via computer simulations.

This paper describes a 2.4-GHz downconverter that runs on a 1-V supply. The downconverter integrates an LNA, a quadrature mixer, a complex channel-select band-pass filter (BPF), a limiting amplifier, and a frequency doubler using 0.2-µm CMOS/SOI technology. The frequency doubler doubles the frequency deviation of FM signals as well as the frequency itself, which in turn doubles the modulation index. This improves the sensitivity of FM demodulation. The power consumption of the downconverter is 23 mW with a 1-V power supply. A bit-error-rate (BER) measurement using the downconverter and a demodulation IC shows -76.5-dBm sensitivity at a 0.1% BER.

A high-speed bipolar ECL comparator circuit with a latch is described. The spike noise generated by charging the base-to-emitter diffusion capacitor on the transition of differential transistors' switching in a sample-and-latch circuit is reduced by inserting the emitter degeneration resistors so that neither of them becomes completely cut off. The frequency bandwidth of a pre-amplifier is increased by using coupled inductors as differential loads. As a result, -3 dB frequency bandwidth of a pre-amplifier becomes 10 GHz, and 4 GS/s operation with 6-bit equivalent precision from a 3.3 V power supply is confirmed by the circuit simulation using device parameters from the 25 GHz silicon bipolar process.

This paper presents a network architecture with a dual interface IP handoff technique that allows smooth node mobility without using any intermediate proxy. The proposed architecture is suitable for low bit-rate time sensitive real time applications, where payload tends to be short and packet header overhead is particularly significant. Connections are established as per permanent addresses of the nodes but are carried on by the IP layer according to the temporary addresses by address translation within the end hosts. The mapping information is maintained by database servers, which can be placed in the Internet in a distributed manner. We describe the architecture and show its mobile capabilities by prototype implementation and performance evaluation. Furthermore a dual-interface handoff suitable to the proposed architecture is also introduced. Preliminary results show that the proposed architecture has significantly low overheads. It is compatible with the existing infrastructure and works fine in both IPv4 and IPv6 environments. Analysis also shows that with dual-interface handoff it is possible to achieve seamless handoff without any packet loss by exploiting overlapping coverage area and speed of the mobile node. Handoff latency is reduced significantly as compare to MIPv6. We believe that with more powerful network interface card drivers our concept of dual interface handoff can be realized.

This paper presents a system for reading comics on cellular phones. It is necessary for comic images to be divided into frames and the contents such as speech text to be displayed at a comfortable reading size, since it is difficult to display high-resolution images in a low resolution cellular phone environment. We have developed a scheme how to decompose comic images into constituent elements frames, speech text and drawings. We implemented a system on the internet for a cellular phone company in our country, that provides downloadable comic data and a program for reading.

This paper presents the architecture and design of the video CODEC circuit that can compress and reconstruct 4:2:2 color VGA video images in real time. Our circuit is based on two-dimensional DWT and inter-frame compression technique. For low-power real-time operation, we modified the traditional Mallat's sub-band coding method to reduce the amount of computation and memory access required in two-dimensional DWT. We also incorporated inter-frame compression technique into our CODEC circuit to enhance the compression capability. To avoid an intensive computation required in motion detection, we encoded only the macro blocks in the current frame which are different from those in the same location of the previous frame to exploit the fact that the background image does not change much in DVR system. We fabricated the CODEC chip using 0.35 µm 3.3 V CMOS standard cell process and applied it to the 16-channel DVR security system.

Providing workflow function is one of the most important research issues in the next generation Internet services such as Web Service and Grid Computing. Scalability for Internet scale services, reliability for unstable Internet resources, and management functions of workflow systems are the essential requirements in these environments. However, existing workflow enactment models for enterprises could not meet these requirements. This paper proposes the PeerFlow that is a P2P based workflow enactment model, to provide workflow functions for the next generation Internet services. To apply P2P model to the workflow enactment model, we introduce the concept of the instance buddy and the index data of workflow instances, then propose the principle architecture of the PeerFlow. The instance buddy enables the autonomous processing of peers, and it is used for recovery and monitoring functions. This paper also presents the recovery capabilities of PeerFlow with formal proofs for the reliability issues and a performance evaluation with SimPy, the Python simulation package.

Multi-Carrier Code Division Multiple Access (MC-CDMA) is one of candidates for the next generation wireless communication systems. In an uplink, the MC-CDMA system suffers from the different access timing (asynchronous transmission), the different fading, and the different frequency offsets of each active user. In this paper we analyze the effects of the frequency offset compensation with MMSE-MUD (minimum mean square error based multi-user detection) for MC-CDMA in a quasi-synchronous uplink. We consider the MC-CDMA system with two subcarrier mapping schemes, the continuous mapping scheme and the discrete mapping scheme. From our theoretical analysis and computer simulation, we show that the MMSE-MUD can compensate the different frequency offsets among users. We also show that the MMSE-MUD significantly improves the bit error rate (BER) for the MC-CDMA system with the continuous mapping scheme.

This paper investigates some fundamental properties of one-way alternating pushdown automata with sublinear space. We first show that one-way nondeterministic pushdown automata are incomparale with one-way alternating pushdown automata with only universal states, for spaces between log log n and log n, and also for spaces between log n and n/log n. We then show that there exists an infinite space hierarchy among one-way alternating pushdown automata with only universal states which have sublinear space.

The high-end telecom terminal and PDAs, sometimes called Personal Trusted Devices (PTDs) are programmable, have tens of megabytes memory, and rather fast processors. In this paper we analyze, when it is energy-efficient to transfer application data compressed over the downlink and then decompress it at the terminal, or compress it first at the terminal and then send it compressed over up-link. These questions are meaningful in the context of usual application code or data and streams that are stored before presentation and require lossless compression methods to be used. We deduce an analytical model and assess the model parameters based on experiments in 2G (GSM) and 3G (FOMA) network. The results indicate that if the reduction through compression in size of the file to be downloaded is higher than ten per cent, energy is saved as compared to receiving the file uncompressed. For the upload case even two percent reduction in size is enough for energy savings at the terminal with the current transmission speeds and observed energy parameters. If time is saved using compressed files during transmission, then energy is certainly saved. From energy savings at the terminal we cannot deduce time savings, however. Energy and time consumed at the server for compression/decompression is considered negligible in this context and ignored. The same holds for the base stations and other fixed telecom infrastructure components.

This paper is focused on the measurement of the complex permittivity of a liquid phantom by the transmission line method using a coaxial line for measuring high-permittivity and high-loss materials. First, the complex permittivity of the liquid phantom material is measured under various physical lengths of the coaxial line for accurate measurement. Secondly, comparison between the measured result and the result obtained by the coaxial probe method is carried out in the frequency range from 0.5 to 3 GHz. Finally, the measurement error included in the complex permittivity is estimated quantitatively. The discussions lead to the conclusion that accurate measurement of the liquid material with high-permittivity and high-loss is possible by the presented method.

A CMOS DFE (decision feedback equalization) receiver with a clock-data skew compensation was implemented for the SSTL (stub-series terminated logic) SDRAM interface. The receiver consists of a 2 way interleaving DFE input buffer for ISI reduction and a X2 over-sampling phase detector for finding the optimum sampling clock position. The measurement results at 1.2 Gbps operation showed the increase of voltage margin by about 20% and the decrease of time jitter in the recovered sampling clock by about 40% by equalization in an SSTL channel with 2 pF 4 stub load. Active chip area and power consumption are 3001000 µm2 and 142 mW, respectively, with a 2.5 V, 0.25 µm CMOS process.