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[Keyword] OMP(3945hit)

1281-1300hit(3945hit)

  • An 8-Bit 100-kS/s CMOS Single-Ended SA ADC for 88 Point EEG/MEG Acquisition System

    Ji-Hun EO  Yeon-Ho JEONG  Young-Chan JANG  

     
    PAPER

      Vol:
    E96-A No:2
      Page(s):
    453-458

    An 8-bit 100-kS/s successive approximation (SA) analog-to-digital converter (ADC) is proposed for measuring EEG and MEG signals in an 88 point. The architectures of a SA ADC with a single-ended analog input and a split-capacitor-based digital-to-analog converter (SC-DAC) are used to reduce the power consumption and chip area of the entire ADC. The proposed SA ADC uses a time-domain comparator that has an input offset self-calibration circuit. It also includes a serial output interface to support a daisy channel that reduces the number of channels for the multi-point sensor interface. It is designed by using a 0.35-µm 1-poly 6-metal CMOS process with a 3.3 V supply to implement together with a conventional analog circuit such as a low-noise-amplifier. The measured DNL and INL of the SA ADC are +0.63/-0.46 and +0.46/-0.51 LSB, respectively. The SNDR is 48.39 dB for a 1.11 kHz analog input signal at a sampling rate of 100 kS/s. The power consumption and core area are 38.71 µW and 0.059 mm2, respectively.

  • Multiple Symbol Differential Detection with Majority Decision Method for DQPSK in LOS Channel

    Hiroyasu ISHIKAWA  Hideyuki SHINONAGA  

     
    LETTER-Satellite Communications

      Vol:
    E96-B No:1
      Page(s):
    384-388

    This letter proposes a multiple symbol differential detection (MSDD) with majority decision method for differentially coded quadrature phase-shift keying (DQPSK) in Rician fading channels. The proposed method shows better BER performance than the conventional MSDD. Simulation results show that the proposed MSDD with a majority decision method improves the system's BER performance for DQPSK signals under the AWGN channel and it approaches asymptotically the theoretical BER performance of coherent detection. Furthermore, the proposed method shows better BER performance under the Rician fading channel with large frequency offsets especially for the range of C/M > 12 dB in comparison with the conventional MSDD.

  • Modeling and Algorithms for QoS-Aware Service Composition in Virtualization-Based Cloud Computing

    Jun HUANG  Yanbing LIU  Ruozhou YU  Qiang DUAN  Yoshiaki TANAKA  

     
    PAPER

      Vol:
    E96-B No:1
      Page(s):
    10-19

    Cloud computing is an emerging computing paradigm that may have a significant impact on various aspects of the development of information infrastructure. In a Cloud environment, different types of network resources need to be virtualized as a series of service components by network virtualization, and these service components should be further composed into Cloud services provided to end users. Therefore Quality of Service (QoS) aware service composition plays a crucial role in Cloud service provisioning. This paper addresses the problem on how to compose a sequence of service components for QoS guaranteed service provisioning in a virtualization-based Cloud computing environment. The contributions of this paper include a system model for Cloud service provisioning and two approximation algorithms for QoS-aware service composition. Specifically, a system model is first developed to characterize service provisioning behavior in virtualization-based Cloud computing, then a novel approximation algorithm and a variant of a well-known QoS routing procedure are presented to resolve QoS-aware service composition. Theoretical analysis shows that these two algorithms have the same level of time complexity. Comparison study conducted based on simulation experiments indicates that the proposed novel algorithm achieves better performance in time efficiency and scalability without compromising quality of solution. The modeling technique and algorithms developed in this paper are general and effective; thus are applicable to practical Cloud computing systems.

  • Correlated Noise Reduction for Electromagnetic Analysis

    Hongying LIU  Xin JIN  Yukiyasu TSUNOO  Satoshi GOTO  

     
    PAPER-Implementation

      Vol:
    E96-A No:1
      Page(s):
    185-195

    Electromagnetic emissions leak confidential data of cryptographic devices. Electromagnetic Analysis (EMA) exploits such emission for cryptanalysis. The performance of EMA dramatically decreases when correlated noise, which is caused by the interference of clock network and exhibits strong correlation with encryption signal, is present in the acquired EM signal. In this paper, three techniques are proposed to reduce the correlated noise. Based on the observation that the clock signal has a high variance at the signal edges, the first technique: single-sample Singular Value Decomposition (SVD), extracts the clock signal with only one EM sample. The second technique: multi-sample SVD is capable of suppressing the clock signal with short sampling length. The third one: averaged subtraction is suitable for estimation of correlated noise when background samplings are included. Experiments on the EM signal during AES encryption on the FPGA and ASIC implementation demonstrate that the proposed techniques increase SNR as much as 22.94 dB, and the success rates of EMA show that the data-independent information is retained and the performance of EMA is improved.

  • Random Sampling Reduction with Precomputation

    Masayuki YOSHINO  Noboru KUNIHIRO  

     
    PAPER-Foundations

      Vol:
    E96-A No:1
      Page(s):
    150-157

    Given an integer n-dimensional lattice basis, the random sampling reduction was proven to find a short vector in arithmetic steps with an integer k, which is freely chosen by users. This paper introduces new random sampling reduction using precomputation techniques. The computation cost is almost independent of the lattice dimension number. The new method is therefore especially advantageous to find a short lattice vector in higher dimensions. The arithmetic operation number of our new method is about 20% of the random sampling reduction with 200 dimensions, and with 1000 dimensions it is less than 1% ( 1/130) of that of the random sampling reduction with representative parameter settings under reasonable assumptions.

  • Thresholding Process Based Dynamic Programming Track-Before-Detect Algorithm

    Wei YI  Lingjiang KONG  Jianyu YANG  

     
    PAPER-Sensing

      Vol:
    E96-B No:1
      Page(s):
    291-300

    Dynamic Programming (DP) based Track-Before-Detect (TBD) algorithm is effective in detecting low signal-to-noise ratio (SNR) targets. However, its complexity increases exponentially as the dimension of the target state space increases, so the exact implementation of DP-TBD will become computationally prohibitive if the state dimension is more than two or three, which greatly prevents its applications to many realistic problems. In order to improve the computational efficiency of DP-TBD, a thresholding process based DP-TBD (TP-DP-TBD) is proposed in this paper. In TP-DP-TBD, a low threshold is first used to eliminate the noise-like (with low-amplitude) measurements. Then the DP integration process is modified to only focuses on the thresholded higher-amplitude measurements, thus huge amounts of computation devoted to the less meaningful low-amplitude measurements are saved. Additionally, a merit function transfer process is integrated into DP recursion to guarantee the inheritance and utilization of the target merits. The performance of TP-DP-TBD is investigated under both optical style Cartesian model and surveillance radar model. The results show that substantial computation reduction is achieved with limited performance loss, consequently TP-DP-TBD provides a cost-efficient tradeoff between computational cost and performance. The effect of the merit function transfer on performance is also studied.

  • Improving the Permutation Layer of Type 1, Type 3, Source-Heavy, and Target-Heavy Generalized Feistel Structures

    Shingo YANAGIHARA  Tetsu IWATA  

     
    PAPER-Symmetric Key Cryptography

      Vol:
    E96-A No:1
      Page(s):
    2-14

    The Generalized Feistel Structure (GFS) generally uses the sub-block-wise cyclic shift in the permutation layer, the layer between the two F function layers. For Type 2 GFS, at FSE 2010, Suzaki and Minematsu showed that a better diffusion property can be obtained if one uses some other sub-block-wise permutation. In this paper, we consider Type 1, Type 3, Source-Heavy (SH), and Target-Heavy (TH) GFSs, and study if their diffusion properties can be improved by changing the sub-block-wise cyclic shift. For Type 1 GFS and Type 3 GFS, we show that better permutations in terms of diffusion exist. For SH and TH GFSs, we show that the diffusion property does not change even if we change the sub-block-wise cyclic shift. We also experimentally derive optimum permutations in terms of diffusion, and evaluate the security of the resulting schemes against saturation, impossible differential, differential, and linear attacks.

  • On Constant-Weight Multi-Valued Sequences from Cyclic Difference Sets

    Takayasu KAIDA  Junru ZHENG  

     
    PAPER-Foundations

      Vol:
    E96-A No:1
      Page(s):
    171-176

    We proposed a method for constructing constant-weight and multi-valued sequences from the cyclic difference sets by generalization of the method in binary case proposed by N. Li, X. Zeng and L. Hu in 2008. In this paper we give some properties about sets of such sequences and it is shown that a set of non-constant-weight sequences over Z4 with length 13 from the (13,4,1)-cyclic difference set, and a set of constant-weight sequences over Z5 with length 21 from the (21,5,1)-cyclic difference set have almost highest linear complexities and good profiles of all sequences' linear complexities. Moreover we investigate the value distribution, the linear complexity and correlation properties of a set of sequences with length 57 over GF(8) from the (57,8,1)-cyclic difference set. It is pointed out that this set also has good value distributions and almost highest linear complexities in similar to previous two sets over Z4 with length 13 and Z5 with length 21.

  • Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication

    Marcos VILLAGRA  Masaki NAKANISHI  Shigeru YAMASHITA  Yasuhiko NAKASHIMA  

     
    PAPER-Fundamentals of Information Systems

      Vol:
    E96-D No:1
      Page(s):
    1-8

    In this paper we study quantum nondeterminism in multiparty communication. There are three (possibly) different types of nondeterminism in quantum computation: i) strong, ii) weak with classical proofs, and iii) weak with quantum proofs. Here we focus on the first one. A strong quantum nondeterministic protocol accepts a correct input with positive probability and rejects an incorrect input with probability 1. In this work we relate strong quantum nondeterministic multiparty communication complexity to the rank of the communication tensor in the Number-On-Forehead and Number-In-Hand models. In particular, by extending the definition proposed by de Wolf to nondeterministic tensor-rank (nrank), we show that for any boolean function f when there is no prior shared entanglement between the players, 1) in the Number-On-Forehead model the cost is upper-bounded by the logarithm of nrank(f); 2) in the Number-In-Hand model the cost is lower-bounded by the logarithm of nrank(f). Furthermore, we show that when the number of players is o(log log n), we have NQP BQP for Number-On-Forehead communication.

  • Numerical Methods for Composite Dielectric Gratings Embedded with Conducting Strips Using Scattering Factors

    Hideaki WAKABAYASHI  Masamitsu ASAI  Keiji MATSUMOTO  Jiro YAMAKITA  

     
    PAPER-Periodic Structures

      Vol:
    E96-C No:1
      Page(s):
    19-27

    We propose a new analytical method for a composite dielectric grating embedded with conducting strips using scattering factors in the shadow theory. The scattering factor in the shadow theory plays an important role instead of the conventional diffraction amplitude. By specifying the relation between scattering factors and spectral-domain Green's functions, we derive expressions of the Green's functions directly for unit surface electric and magnetic current densities, and apply the spectral Galerkin method to our formulation. From some numerical results, we show that the expressions of the Green's functions are valid, and analyze scattering characteristics by composite gratings.

  • A Fast and Accurate Two-Stage Algorithm for 1-bit Compressive Sensing

    Biao SUN  Qian CHEN  Xinxin XU  Li ZHANG  Jianjun JIANG  

     
    LETTER-Fundamentals of Information Systems

      Vol:
    E96-D No:1
      Page(s):
    120-123

    Compressive sensing (CS) shows that a sparse or compressible signal can be exactly recovered from its linear measurements at a rate significantly lower than the Nyquist rate. As an extreme case, 1-bit compressive sensing (1-bit CS) states that an original sparse signal can be recovered from the 1-bit measurements. In this paper, we intrduce a Fast and Accurate Two-Stage (FATS) algorithm for 1-bit compressive sensing. Simulations show that FATS not only significantly increases the signal reconstruction speed but also improves the reconstruction accuracy.

  • OpenTag: Tag-Based User-Driven In-Network Packet Processing on Commercial Network Devices

    Ryoji FURUHASHI  Akihiro NAKAO  

     
    PAPER

      Vol:
    E96-B No:1
      Page(s):
    31-39

    Network slicing for wide-area coordinated packet processing has attracted attentions for improving efficiency of handling network traffic. We have recently proposed a tag-based network slicing mechanism called OpenTag, and introduced the prototype implementation of the OpenTag redirector on an evaluation board. In this paper, we investigate the integration of the OpenTag redirector into a commercial network device. Our contributions are three-fold: (1) designing the architecture aiming OpenTag-capable intermediaries embedded on commercial network devices, (2) implementing a prototype of the embedded OpenTag redirector using the Advanced Mezzanine Card (AMC) which has an OCTEON network processor, (3) showing our implementation can tolerate high bandwidth environment.

  • Interoperable Spatial Information Model and Design Environment Based on ucR Technology

    Yukihiko SHIGESADA  Shinsuke KOBAYASHI  Noboru KOSHIZUKA  Ken SAKAMURA  

     
    PAPER-Information Network

      Vol:
    E96-D No:1
      Page(s):
    51-63

    Context awareness is one of the ultimate goals of ubiquitous computing, and spatial information plays an important role in building context awareness. In this paper, we propose a new interoperable spatial information model, which is based on ucode relation (ucR) and Place Identifier (PI), for realizing ubiquitous spatial infrastructure. In addition, we propose a design environment for spatial information database using our model. Our model is based on ucode and its relation. ucode is 128 bits number and the number itself has no meaning. Hence, it is difficult to manage the relation between ucodes without using a tool. Our design environment provides to describe connection between each ucode visually and is able to manipulate data using the target space map interactively. To evaluate the proposed model and environment, we designed three spaces using our tool. In addition, we developed a web application using our spatial model. From evaluation, we have been showed that our model is effective and our design environment is useful to develop our spatial information model.

  • Linear Complexity of Binary Whiteman Generalized Cyclotomic Sequences of Order 4

    Xiaoping LI  Wenping MA  Tongjiang YAN  Xubo ZHAO  

     
    LETTER-Cryptography and Information Security

      Vol:
    E96-A No:1
      Page(s):
    363-366

    In this letter we propose a new Whiteman generalized cyclotomic sequence of order 4. Meanwhile, we determine its linear complexity and minimal polynomial. The results show that this sequence possesses both high linear complexity and optimal balance on 1 s and 0 s, which may be attractive for cryptographic applications.

  • A Parallelizable PRF-Based MAC Algorithm: Well beyond the Birthday Bound

    Kan YASUDA  

     
    LETTER

      Vol:
    E96-A No:1
      Page(s):
    237-241

    In this note we suggest a new parallelizable mode of operation for message authentication codes (MACs). The new MAC algorithm iterates a pseudo-random function (PRF) FK:{0,1}m → {0,1}n, where K is a key and m,n are positive integers such that m ≥ 2n. The new construction is an improvement over a sequential MAC algorithm presented at FSE2008, solving positively an open problem posed in the paper – the new mode is capable of fully parallel execution while achieving rate-1 efficiency and “full n-bit” security. Interestingly enough, PMAC-like parallel structure, rather than CBC-like serial iteration, has beneficial side effects on security. That is, the new construction is provided with a more straightforward security proof and with an even better (“-free”) security bound than the FSE 2008 construction.

  • Parametric Forms of the Achievable Rate Region for Source Coding with a Helper

    Tetsunao MATSUTA  Tomohiko UYEMATSU  Ryutaroh MATSUMOTO  

     
    LETTER-Information Theory

      Vol:
    E95-A No:12
      Page(s):
    2493-2497

    Source coding with a helper is one of the most fundamental fixed-length source coding problem for correlated sources. For this source coding, Wyner and Ahlswede-Korner showed the achievable rate region which is the set of rate pairs of encoders such that the probability of error can be made arbitrarily small for sufficiently large block length. However, their expression of the achievable rate region consists of the sum of indefinitely many sets. Thus, their expression is not useful for computing the achievable rate region. This paper deals with correlated sources whose conditional distribution is related by a binary-input output-symmetric channel, and gives a parametric form of the achievable rate region in order to compute the region easily.

  • A Fully Programmable Reed-Solomon Decoder on a Multi-Core Processor Platform

    Bei HUANG  Kaidi YOU  Yun CHEN  Zhiyi YU  Xiaoyang ZENG  

     
    PAPER-Computer Architecture

      Vol:
    E95-D No:12
      Page(s):
    2939-2947

    Reed-Solomon (RS) codes are widely used in digital communication and storage systems. Unlike usual VLSI approaches, this paper presents a high throughput fully programmable Reed-Solomon decoder on a multi-core processor. The multi-core processor platform is a 2-Dimension mesh array of Single Instruction Multiple Data (SIMD) cores, and it is well suited for digital communication applications. By fully extracting the parallelizable operations of the RS decoding process, we propose multiple optimization techniques to improve system throughput, including: task level parallelism on different cores, data level parallelism on each SIMD core, minimizing memory access, and route length minimized task mapping techniques. For RS(255, 239, 8), experimental results show that our 12-core implementation achieve a throughput of 4.35 Gbps, which is much better than several other published implementations. From the results, it is predictable that the throughput is linear with the number of cores by our approach.

  • Mapping Optimization of Affine Loop Nests for Reconfigurable Computing Architecture

    Dajiang LIU  Shouyi YIN  Chongyong YIN  Leibo LIU  Shaojun WEI  

     
    PAPER-Computer Architecture

      Vol:
    E95-D No:12
      Page(s):
    2898-2907

    Reconfigurable computing system is a class of parallel architecture with the ability of computing in hardware to increase performance, while remaining much of flexibility of a software solution. This architecture is particularly suitable for running regular and compute-intensive tasks, nevertheless, most compute-intensive tasks spend most of their running time in nested loops. Polyhedron model is a powerful tool to give a reasonable transformation on such nested loops. In this paper, a number of issues are addressed towards the goal of optimization of affine loop nests for reconfigurable cell array (RCA), such as approach to make the most use of processing elements (PE) while minimizing the communication volume by loop transformation in polyhedron model, determination of tilling form by the intra-statement dependence analysis and determination of tilling size by the tilling form and the RCA size. Experimental results on a number of kernels demonstrate the effectiveness of the mapping optimization approaches developed. Compared with DFG-based optimization approach, the execution performances of 1-d jacobi and matrix multiplication are improved by 28% and 48.47%. Lastly, the run-time complexity is acceptable for the practical cases.

  • Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits

    Kumpei YOSHIKAWA  Yuta SASAKI  Kouji ICHIKAWA  Yoshiyuki SAITO  Makoto NAGATA  

     
    PAPER-Device and Circuit Modeling and Analysis

      Vol:
    E95-A No:12
      Page(s):
    2284-2291

    Capacitor charging modeling efficiently and accurately represents power consumption current of CMOS digital circuits and actualizes co-simulation of AC power noise including the interaction with on-chip and on-board integrated power delivery network (PDN). It is clearly demonstrated that the AC power noise is dominantly characterized by the frequency-dependent impedance of PDN and also by the operating frequency of circuits as well. A 65 nm CMOS chip exhibits the AC power noise components in substantial relation with the parallel resonance of the PDN seen from on-chip digital circuits. An on-chip noise monitor measures in-circuit power supply voltage, while a near-field magnetic probing derives on-board power supply current. The proposed co-simulation well matches the power noise measurements. The proposed AC noise co-simulation will be essentially applicable in the design of PDNs toward on-chip power supply integrity (PSI) and off-chip electromagnetic compatibility (EMC).

  • Scalable Cache-Optimized Concurrent FIFO Queue for Multicore Architectures

    Changwoo MIN  Hyung Kook JUN  Won Tae KIM  Young Ik EOM  

     
    LETTER

      Vol:
    E95-D No:12
      Page(s):
    2956-2957

    A concurrent FIFO queue is a widely used fundamental data structure for parallelizing software. In this letter, we introduce a novel concurrent FIFO queue algorithm for multicore architecture. We achieve better scalability by reducing contention among concurrent threads, and improve performance by optimizing cache-line usage. Experimental results on a server with eight cores show that our algorithm outperforms state-of-the-art algorithms by a factor of two.

1281-1300hit(3945hit)