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[Keyword] PA(8249hit)

1961-1980hit(8249hit)

  • Image Recognition Based on Separable Lattice Trajectory 2-D HMMs

    Akira TAMAMORI  Yoshihiko NANKAKU  Keiichi TOKUDA  

     
    PAPER-Pattern Recognition

      Vol:
    E97-D No:7
      Page(s):
    1842-1854

    In this paper, a novel statistical model based on 2-D HMMs for image recognition is proposed. Recently, separable lattice 2-D HMMs (SL2D-HMMs) were proposed to model invariance to size and location deformation. However, their modeling accuracy is still insufficient because of the following two assumptions, which are inherited from 1-D HMMs: i) the stationary statistics within each state and ii) the conditional independent assumption of state output probabilities. To overcome these shortcomings in 1-D HMMs, trajectory HMMs were proposed and successfully applied to speech recognition and speech synthesis. This paper derives 2-D trajectory HMMs by reformulating the likelihood of SL2D-HMMs through the imposition of explicit relationships between static and dynamic features. The proposed model can efficiently capture dependencies between adjacent observations without increasing the number of model parameters. The effectiveness of the proposed model was evaluated in face recognition experiments on the XM2VTS database.

  • On the Greatest Number of Paths and Maximal Paths for a Class of Directed Acyclic Graphs

    Shinsuke ODAGIRI  Hiroyuki GOTO  

     
    LETTER

      Vol:
    E97-A No:6
      Page(s):
    1370-1374

    For a fixed number of nodes, we focus on directed acyclic graphs in which there is not a shortcut. We find the case where the number of paths is maximized and its corresponding count of maximal paths. Considering this case is essential in solving large-scale scheduling problems using a PERT chart.

  • Computational Complexity and an Integer Programming Model of Shakashaka

    Erik D. DEMAINE  Yoshio OKAMOTO  Ryuhei UEHARA  Yushi UNO  

     
    PAPER

      Vol:
    E97-A No:6
      Page(s):
    1213-1219

    Shakashaka is a pencil-and-paper puzzle proposed by Guten and popularized by the Japanese publisher Nikoli (like Sudoku). We determine the computational complexity by proving that Shakashaka is NP-complete, and furthermore that counting the number of solutions is #P-complete. Next we formulate Shakashaka as an integer-programming (IP) problem, and show that an IP solver can solve every instance from Nikoli's website within a second.

  • Semi-Supervised Learning via Geodesic Weighted Sparse Representation

    Jianqiao WANG  Yuehua LI  Jianfei CHEN  Yuanjiang LI  

     
    LETTER-Pattern Recognition

      Vol:
    E97-D No:6
      Page(s):
    1673-1676

    The label estimation technique provides a new way to design semi-supervised learning algorithms. If the labels of the unlabeled data can be estimated correctly, the semi-supervised methods can be replaced by the corresponding supervised versions. In this paper, we propose a novel semi-supervised learning algorithm, called Geodesic Weighted Sparse Representation (GWSR), to estimate the labels of the unlabeled data. First, the geodesic distance and geodesic weight are calculated. The geodesic weight is utilized to reconstruct the labeled samples. The Euclidean distance between the reconstructed labeled sample and the unlabeled sample equals the geodesic distance between the original labeled sample and the unlabeled sample. Then, the unlabeled samples are sparsely reconstructed and the sparse reconstruction weight is obtained by minimizing the L1-norm. Finally, the sparse reconstruction weight is utilized to estimate the labels of the unlabeled samples. Experiments on synthetic data and USPS hand-written digit database demonstrate the effectiveness of our method.

  • Computational Complexity of Piano-Hinged Dissections

    Zachary ABEL  Erik D. DEMAINE  Martin L. DEMAINE  Takashi HORIYAMA  Ryuhei UEHARA  

     
    PAPER

      Vol:
    E97-A No:6
      Page(s):
    1206-1212

    We prove NP-completeness of deciding whether a given loop of colored right isosceles triangles, hinged together at edges, can be folded into a specified rectangular three-color pattern. By contrast, the same problem becomes polynomially solvable with one color or when the target shape is a tree-shaped polyomino.

  • Opportunistic Decouple-and-Forward Relaying: Harnessing Distributed Antennas

    Jaeyoung LEE  Hyundong SHIN  Jun HEO  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E97-B No:6
      Page(s):
    1148-1156

    In this paper, we consider decouple-and-forward (DCF) relaying, where the relay encodes and amplifies decoupled data using orthogonal space-time block codes (OSTBCs), to achieve the maximum diversity gain of multiple-input multiple-output (MIMO) amplify-and-forward (AF) relaying. Since the channel status of all antennas is generally unknown and time-varying for cooperation in multi-antenna multiple-relay systems, we investigate an opportunistic relaying scheme for DCF relaying to harness distributed antennas and minimize the cooperation overheads by not using the global channel state information (CSI). In addition, for realistic wireless channels which have spatial fading correlation due to closely-spaced antenna configurations and poor scattering environments, we analyze the exact and lower bound on the symbol error probability (SEP) of the opportunistic DCF relaying over spatially correlated MIMO Rayleigh fading channels. Numerical results show that, even in the presence of spatial fading correlation, the proposed opportunistic relaying scheme is efficient and achieves additional performance gain with low overhead.

  • Performance of Partitioned Vector Quantization with Optimized Feedback Budget Allocation

    Mirza Golam KIBRIA  Hidekazu MURATA  Susumu YOSHIDA  

     
    PAPER-Terrestrial Wireless Communication/Broadcasting Technologies

      Vol:
    E97-B No:6
      Page(s):
    1184-1194

    This study analyzes the performance of a downlink beamformer with partitioned vector quantization under optimized feedback budget allocation. A multiuser multiple-input single-output downlink precoding system with perfect channel state information at mobile stations is considered. The number of feedback bits allocated to the channel quality indicator (CQI) and the channel direction indicator (CDI) corresponding to each partition are optimized by exploiting the quantization mean square error. In addition, the effects of equal and unequal partitioning on codebook memory and system capacity are studied and elucidated through simulations. The results show that with optimized CQI-CDI allocation, the feedback budget distributions of equal or unequal partitions are proportional to the size ratios of the partitioned subvectors. Furthermore, it is observed that for large-sized partitions, the ratio of optimal CDI to CQI is much higher than that for small-sized partitions.

  • Exposure-Resilient One-Round Tripartite Key Exchange without Random Oracles

    Koutarou SUZUKI  Kazuki YONEYAMA  

     
    PAPER

      Vol:
    E97-A No:6
      Page(s):
    1345-1355

    This paper studies Tripartite Key Exchange (3KE) which is a special case of Group Key Exchange. Though general one-round GKE satisfying advanced security properties such as forward secrecy and maximal-exposure-resilience (MEX-resilience) is not known, it can be efficiently constructed with the help of pairings in the 3KE case. In this paper, we introduce the first one-round 3KE which is MEX-resilient in the standard model, though existing one-round 3KE schemes are proved in the random oracle model (ROM), or not MEX-resilient. Each party broadcasts 4 group elements, and executes 14 pairing operations. Complexity is only three or four times larger in computation and communication than the existing most efficient MEX-resilient 3KE scheme in the ROM; thus, our protocol is adequately practical.

  • A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit

    Keishi TSUBAKI  Tetsuya HIROSE  Yuji OSAKI  Seiichiro SHIGA  Nobutaka KUROKI  Masahiro NUMA  

     
    PAPER

      Vol:
    E97-C No:6
      Page(s):
    512-518

    A fully on-chip CMOS relaxation oscillator (ROSC) with a PVT variation compensation circuit is proposed in this paper. The circuit is based on a conventional ROSC and has a distinctive feature in the compensation circuit that compensates for comparator's non-idealities caused by not only offset voltage, but also delay time. Measurement results demonstrated that the circuit can generate a stable clock frequency of 6.66kHz. The current dissipation was 320nA at 1.0-V power supply. The measured line regulation and temperature coefficient were 0.98%/V and 56ppm/°C, respectively.

  • Efficient Parallel Interference Cancellation MIMO Detector for Software Defined Radio on GPUs

    Rongchun LI  Yong DOU  Jie ZHOU  Chen CHEN  

     
    PAPER-Digital Signal Processing

      Vol:
    E97-A No:6
      Page(s):
    1388-1395

    The parallel interference cancellation (PIC) multiple input multiple output (MIMO) detection algorithm has bit error ratio (BER) performance comparable to the maximum likelihood (ML) algorithm but with complexity close to the simple linear detection algorithm such as zero forcing (ZF), minimum mean squared error (MMSE), and successive interference cancellation (SIC), etc. However, the throughput of PIC MIMO detector on central processing unit (CPU) cannot meet the requirement of wireless protocols. In order to reach the throughput required by the standards, the graphics processing unit (GPU) is exploited in this paper as the modem processor to accelerate the processing procedure of PIC MIMO detector. The parallelism of PIC algorithm is analyzed and the two-stage PIC detection is carefully developed to efficiently match the multi-core architecture. Several optimization methods are employed to enhance the throughput, such as the memory optimization and asynchronous data transfer. The experiment shows that our MIMO detector has excellent BER performance and the peak throughput is 337.84 Mega bits per second (Mbps), about 7x to 16x faster than that of CPU implementation with SSE2 optimization methods. The implemented MIMO detector has better computing throughput than recent GPU-based implementations.

  • Dynamic Check Message Majority-Logic Decoding Algorithm for Non-binary LDPC Codes

    Yichao LU  Xiao PENG  Guifen TIAN  Satoshi GOTO  

     
    PAPER

      Vol:
    E97-A No:6
      Page(s):
    1356-1364

    Majority-logic algorithms are devised for decoding non-binary LDPC codes in order to reduce computational complexity. However, compared with conventional belief propagation algorithms, majority-logic algorithms suffer from severe bit error performance degradation. This paper presents a low-complexity reliability-based algorithm aiming at improving error correcting ability of majority-logic algorithms. Reliability measures for check nodes are novelly introduced to realize mutual update between variable message and check message, and hence more efficient reliability propagation can be achieved, similar to belief-propagation algorithm. Simulation results on NB-LDPC codes with different characteristics demonstrate that our algorithm can reduce the bit error ratio by more than one order of magnitude and the coding gain enhancement over ISRB-MLGD can reach 0.2-2.0dB, compared with both the ISRB-MLGD and IISRB-MLGD algorithms. Moreover, simulations on typical LDPC codes show that the computational complexity of the proposed algorithm is closely equivalent to ISRB-MLGD algorithm, and is less than 10% of Min-max algorithm. As a result, the proposed algorithm achieves a more efficient trade-off between decoding computational complexity and error performance.

  • A 10-bit CMOS Digital-to-Analog Converter with Compact Size for Display Applications

    Mungyu KIM  Hoon-Ju CHUNG  Young-Chan JANG  

     
    PAPER

      Vol:
    E97-C No:6
      Page(s):
    519-525

    A 10-bit digital-to-analog converter (DAC) with a small area is proposed for data-driver integrated circuits of active-matrix liquid crystal display systems. The 10-bit DAC consists of a 7-bit resistor string, a 7-bit two-step decoder, a 2-bit logarithmic time interpolator, and a buffer amplifier. The proposed logarithmic time interpolation is achieved by controlling the charging time of a first-order low-pass filter composed of a resistor and a capacitor. The 7-bit two-step decoder that follows the 7-bit resistor string outputs an analog signal of the stepped wave with two voltage levels using the additional 1-bit digital code for the logarithmic time interpolation. The proposed 10-bit DAC is implemented using a 0.35-µm CMOS process and its supply voltage is scalable from 3.3V to 5.0V. The area of the proposed 10-bit logarithmic time interpolation DAC occupies 57% of that of the conventional 10-bit resistor-string DAC. The DNL and INL of the implemented 10-bit DAC are +0.29/-0.30 and +0.47/-0.36 LSB, respectively.

  • Translation Repair Method for Improving Accuracy of Translated Sentences

    Taku FUKUSHIMA  Takashi YOSHINO  

     
    PAPER-Data Engineering, Web Information Systems

      Vol:
    E97-D No:6
      Page(s):
    1528-1534

    In this study, we have developed a translation repair method to automatically improve the accuracy of translations. Machine translation (MT) supports multilingual communication; however, it cannot achieve high accuracy. MT creates only one translated sentence; therefore, it is difficult to improve the accuracy of translated sentences. Our method creates multiple translations by adding personal pronouns to the source sentence and by using a word dictionary and a parallel corpus. In addition, it selects an accurate translation from among the multiple translations using the results of a Web search. As a result, the translation repair method improved the accuracy of translated sentences, and its accuracy is greater than that of MT.

  • A Single Opamp Third-Order Low-Distortion Delta-Sigma Modulator with SAR Quantizer Embedded Passive Adder

    I-Jen CHAO  Ching-Wen HOU  Bin-Da LIU  Soon-Jyh CHANG  Chun-Yueh HUANG  

     
    PAPER

      Vol:
    E97-C No:6
      Page(s):
    526-537

    A third-order low-distortion delta-sigma modulator (DSM), whose third-order noise-shaping ability is achieved by just a single opamp, is proposed. Since only one amplifier is required in the whole circuit, the designed DSM is very power efficient. To realize the adder in front of quantizer without employing the huge-power opamp, a capacitive passive adder, which is the digital-to-analog converter (DAC) array of a successive-approximation-type quantizer, is used. In addition, the feedback path timing is extended from a nonoverlapping interval for the conventional low-distortion structure to half of the clock period, so that the strict operation timing issue with regard to quantization and the dynamic element matching (DEM) logic operation can be solved. In the proposed DSM structure, the features of the unity-gain signal transfer function (STF) and finite-impulse-response (FIR) noise transfer function (NTF) are still preserved, and thus advantages such as a relaxed opamp slew rate and reduced output swing are also maintained, as with the conventional low-distortion DSM. Moreover, the memory effect in the proposed DSM is analyzed when employing the opamp sharing for integrators. The proposed third-order DSM with a 4-bit SAR ADC as the quantizer is implemented in a 90-nm CMOS process. The post-layout simulations show a 79.8-dB signal-to-noise and distortion ratio (SNDR) in the 1.875-MHz signal bandwidth (OSR=16). The active area of the circuit is 0.35mm2 and total power consumption is 2.85mW, resulting in a figure of merit (FOM) of 95 fJ/conversion-step.

  • Analyzing Network Privacy Preserving Methods: A Perspective of Social Network Characteristics

    Duck-Ho BAE  Jong-Min LEE  Sang-Wook KIM  Youngjoon WON  Yongsu PARK  

     
    LETTER-Artificial Intelligence, Data Mining

      Vol:
    E97-D No:6
      Page(s):
    1664-1667

    A burst of social network services increases the need for in-depth analysis of network activities. Privacy breach for network participants is a concern in such analysis efforts. This paper investigates structural and property changes via several privacy preserving methods (anonymization) for social network. The anonymized social network does not follow the power-law for node degree distribution as the original network does. The peak-hop for node connectivity increases at most 1 and the clustering coefficient of neighbor nodes shows 6.5 times increases after anonymization. Thus, we observe inconsistency of privacy preserving methods in social network analysis.

  • Cooperative Bayesian Compressed Spectrum Sensing for Correlated Wideband Signals

    Honggyu JUNG  Kwang-Yul KIM  Yoan SHIN  

     
    LETTER-Communication Theory and Signals

      Vol:
    E97-A No:6
      Page(s):
    1434-1438

    We propose a cooperative compressed spectrum sensing scheme for correlated signals in wideband cognitive radio networks. In order to design a reconstruction algorithm which accurately recover the wideband signals from the compressed samples in low SNR (Signal-to-Noise Ratio) environments, we consider the multiple measurement vector model exploiting a sequence of input signals and propose a cooperative sparse Bayesian learning algorithm which models the temporal correlation of the input signals. Simulation results show that the proposed scheme outperforms existing compressed sensing algorithms for low SNRs.

  • Noise-Robust Voice Conversion Based on Sparse Spectral Mapping Using Non-negative Matrix Factorization

    Ryo AIHARA  Ryoichi TAKASHIMA  Tetsuya TAKIGUCHI  Yasuo ARIKI  

     
    PAPER-Voice Conversion and Speech Enhancement

      Vol:
    E97-D No:6
      Page(s):
    1411-1418

    This paper presents a voice conversion (VC) technique for noisy environments based on a sparse representation of speech. Sparse representation-based VC using Non-negative matrix factorization (NMF) is employed for noise-added spectral conversion between different speakers. In our previous exemplar-based VC method, source exemplars and target exemplars are extracted from parallel training data, having the same texts uttered by the source and target speakers. The input source signal is represented using the source exemplars and their weights. Then, the converted speech is constructed from the target exemplars and the weights related to the source exemplars. However, this exemplar-based approach needs to hold all training exemplars (frames), and it requires high computation times to obtain the weights of the source exemplars. In this paper, we propose a framework to train the basis matrices of the source and target exemplars so that they have a common weight matrix. By using the basis matrices instead of the exemplars, the VC is performed with lower computation times than with the exemplar-based method. The effectiveness of this method was confirmed by comparing its effectiveness (in speaker conversion experiments using noise-added speech data) with that of an exemplar-based method and a conventional Gaussian mixture model (GMM)-based method.

  • Parametric Resonance Based Frequency Multiplier for Sub-Gigahertz Radio Receiver with 0.3V Supply Voltage

    Lechang LIU  Keisuke ISHIKAWA  Tadahiro KURODA  

     
    PAPER

      Vol:
    E97-C No:6
      Page(s):
    505-511

    Parametric resonance based solutions for sub-gigahertz radio frequency transceiver with 0.3V supply voltage are proposed in this paper. As an implementation example, a 0.3V 720µW variation-tolerant injection-locked frequency multiplier is developed in 90nm CMOS. It features a parametric resonance based multi-phase synthesis scheme, thereby achieving the lowest supply voltage with -110dBc@ 600kHz phase noise and 873MHz-1.008GHz locking range in state-of-the-art frequency synthesizers.

  • A Low-Cost Stimulus Design for Linearity Test in SAR ADCs

    An-Sheng CHAO  Cheng-Wu LIN  Hsin-Wen TING  Soon-Jyh CHANG  

     
    PAPER

      Vol:
    E97-C No:6
      Page(s):
    538-545

    The proposed stimulus design for linearity test is embedded in a differential successive approximation register analog-to-digital converter (SAR ADC), i.e. a design for testability (DFT). The proposed DFT is compatible to the pattern generator (PG) and output response analyzer (ORA) with the cost of 12.4-% area of the SAR ADC. The 10-bit SAR ADC prototype is verified in a 0.18-µm CMOS technology and the measured differential nonlinearity (DNL) error is between -0.386 and 0.281 LSB at 1-MS/s.

  • Predictors of Pause Duration in Read-Aloud Discourse

    Xiaohong YANG  Mingxing XU  Yufang YANG  

     
    PAPER-Speech Synthesis and Related Topics

      Vol:
    E97-D No:6
      Page(s):
    1461-1467

    The research reported in this paper is an attempt to elucidate the predictors of pause duration in read-aloud discourse. Through simple linear regression analysis and stepwise multiple linear regression, we examined how different factors (namely, syntactic structure, discourse hierarchy, topic structure, preboundary length, and postboundary length) influenced pause duration both separately and jointly. Results from simple regression analysis showed that discourse hierarchy, syntactic structure, topic structure, and postboundary length had significant impacts on boundary pause duration. However, when these factors were tested in a stepwise regression analysis, only discourse hierarchy, syntactic structure, and postboundary length were found to have significant impacts on boundary pause duration. The regression model that best predicted boundary pause duration in discourse context was the one that first included syntactic structure, and then included discourse hierarchy and postboundary length. This model could account for about 80% of the variance of pause duration. Tests of mediation models showed that the effects of topic structure and discourse hierarchy were significantly mediated by syntactic structure, which was most closely correlated with pause duration. These results support an integrated model combining the influence of several factors and can be applied to text-to-speech systems.

1961-1980hit(8249hit)