This paper proposes a human interface where a novel input method is used to substitute conventional input devices. It overcomes the deficiencies of physical devices, as it is based on image processing techniques. The proposed interface is composed of three parts: extraction of a person's handshape from a digitized image, detection of its fingertip, and interpretation by a software application. First, images of a pointing hand are digitized to obtain a sequence of monochrome frames. In each frame the hand is isolated from the background by means of gray-level slicing; with threshold values calculated dynamically by the combination of movement detection and histogram analysis. The advantage of this approach is that the system adapts itself to any user and compensates any changes in the illumination, while in conventional methods the threshold values are previously defined or markers have to be attached to the hand in order to give reference points. Second, once the hand is isolated, fingertip coordinates are extracted by scanning the image. Third, the coordinates are inputted to an application interface. Overall, as the algorithms are simple and only monochrome images are used, the amount of processing is kept low, making this system suitable to real-time processing without needing expensive hardware.

Distributed computing over a network of workstations continues to be an illusive goal. Its main obstacle is the delay penalty due to network protocol and OS overhead. We present in this paper a low level hardware supported scheme for managing distributed shared memory (DSM), as an underlying paradigm for distributed computing. The proposed DSM is novel in that it employs a two-tier paging scheme that reduces the probability of false sharing and facilitates an efficient hardware implementation. The scheme employs a standard OS page and divides it into fixed smaller memory units called paragraphs, similar to cache lines. This scheme manages the shared data regions only, while other regions are handled by the OS in the standard manner without modification. A hardware extension of a traditional MMU, namely Distributed MMU or DMMU, is introduced to support the DSM. Shared memory coherency is maintained through a write-invalidate protocol. An analytical model is built to evaluate the system sensitivity to various parameters and to assess its performance.

This paper presents a theoretically best algorithm within the framework of our image noise model for reconstructing 3-D from two views when all the feature points are on a planar surface. Pointing out that statistical bias is introduced if the least-squares scheme is used in the presence of image noise, we propose a scheme called renormalization, which automatically removes statistical bias. We also present an optimal correction scheme for canceling the effect of image noise in individual feature points. Finally, we show numerical simulation and confirm the effectiveness of our method.

Recently, through high speed computer networks, multifarious information such as text, moving and still images, video, voice and control data is available. There is a natural demand to store such multimedia data in databases to facilitate their reuse in a wide variety of applications. Therefore, important research issues pertain to the investigation of appropriate database systems in multimedia computer network environments. In this paper, we first discuss the required technologies for multimedia information systems. Then we look at many multimedia information services through computer networks, and consider the importance of storing and effectively reusing such available multimedia data. To facilitate developing databases for use in these environments, we discuss the evolution of the notion of database systems. Finally, we demonstrate, as practical examples of such database systems, two prototype systems that we are currently implementing, i.e., the campus wide news on demand system and the ASN. 1 database system.

We consider slotted ALOHA systems with a controlled output power level. The systems were proposed to improve the throughput performance by the capture effect. However widely used linear modulation systems have no capture effect, and a power level distribution dominates the performance in those systems. In this paper we consider linear modulation systems employing PSK. We introduce an average error probability of the highest power signal as a performance measure, and a uniform distribution is applied to the error probability analysis. Numerical results show the superiority of the systems with uniform distribution to a conventional slotted ALOHA in a heavy traffic condition. On the other hand, in a light traffic condition, the optimal power distribution which minimizes the error probability is obtained for 2-level ALOHA. We also propose the power level selection method to search the optimal power level. The validity of analytical results are confirmed by simulations.

An experimental 3 V-only 4 Mb NAND Flash memory with 65 ns access time has been developed using a new charge pump circuit and novel circuit techniques such as folded bit-line architecture. By adopting a new program verify technique, programming time is reduced to 11 µs/Byte.

Ever increasing demand for higher bandwidth memories, which is fueled by multimedia and 3D graphics, seems to be somewhat satisfied with various emerging memory solutions. This paper gives a review of these emerging DRAM architectures and a performance comparison based on a condition to let the readers have some perspectives of the future and optimized graphics systems.

This paper establishes a relationship among the accepting powers of deterministic, nondeterministic, and alternating one-way auxiliary pushdown automata, for any tape bound below n. Some other related results are also presented.

One of the most effective methods in speech recognition is the HMM which has been used to model speech statistically. The discrete distribution and the continuos distribution HMMs have been widely used in various applications. However, in recent years, HMMs with various output probability functions have been proposed to further improve recognition performance, e.g. the Gaussian mixture continuous and the semi-continuous distributed HMMs. We recently have also proposed the RBF (radial basis function)-based HMM and the VQ-distortion based HMM which use a RBF function and VQ-distortion measure at each state instead of an output probability density function used by traditional HMMs. In this paper, we describe the RBF-based HMM and the VQ-distortion based HMM and compare their performance with the discrete distributed, the Gaussian mixture distributed and the semi-continuous distributed HMMs based on their speech recognition performance rates through experiments on speaker-independent spoken digit recognition. Our results confirmed that the RBF-based and VQ-distortion based HMMs are more robust and superior to traditional HMMs.

The performance of coded multi-pulse pulse position modulation (MPPM) consisting of m slots and 2 pulses, denoted as (m, 2) MPPM, with imperfect slot synchronization is analyzed. Convolutional codes and Reed-Solomon (RS) codes are employed for (m, 2) MPPM, and the bit error probability of coded (m, 2) MPPM in the presence of the timing offset is derived. In each coded (m, 2) MPPM, we compare the performance of some different code rate systems. Moreover, we compare the performance of both systems at the same information bit rate. It is shown that in both coded systems, the performance of code rate-1/2 coded (m, 2) MPPM is the best when the timing offset is small. Wheji the timing offset is somewhat large, however, uncoded (m, 2) MPPM is shown to perform better than coded (m, 2) MPPM. Further, convolutional coded (m, 2) MPPM with the constraint length k7 is shown to perform better than RS coded (m, 2) MPPM for the same code rate.

This paper reviews very high-speed optical signal processing technology based on the instantaneous characteristic of optical nonlinearities. Focus is placed on 100-Gbit/s optical time-division multiplexing (TDM) transmission systems. The key technologies including ultrashort optical pulse generation, all-optical multiplexing/demultiplexing and optical timing extraction techniques are alse described together with their major issues and future prospects.

Although consistent learning is sufficient for PAC-learning, it has not been found what strategy makes learning more efficient, especially on the sample complexity, i.e., the number of examples required. For the first step towards this problem, classes that have consistent learning algorithms with one-sided error are considered. A combinatorial quantity called maximal particle sets is introduced, and an upper bound of the sample complexity of consistent learning with one-sided error is obtained in terms of maximal particle sets. For the class of n-dimensional axis-parallel rectangles, one of those classes that are consistently learnable with one-sided error, the cardinality of the maximal particle set is estimated and O(d/ε1/ε log 1/δ) upper bound of the learning algorithm for the class is obtained. This bound improves the bounds due to Blumer et al. and meets the lower bound within a constant factor.

In this letter the classification of echocardiographic images is studied by making use of some texture features, including the angular second moment, the contrast, the correlation, and the entropy which are obtained from a gray-level cooccurrence matrix. Features of these types are used to classify two sets of echocardiographic images-normal and abnormal (cardiomyopathy) hearts. A minimum distance classifier and evaluation indexes are employed to evaluate the performance of these features. Implementation of our algorithm is performed on a PC-386 personal computer and produces about 87% correct classification for the two sets of echocardiographic images. Our preliminary results suggest that this method of feature-based image analysis has potential use for computer-aided diagnosis of heart diseases.

This paper discusses some problems in Molecular Biology for which learning paradigms are strongly desired. We also present a framework of knowledge discovery by PAC-learning paradigm together with its theory and practice developed in our work for discovery from amino acid sequences.

Some CMOS gates are topologically asymmetric in inputs, even though they are logically symmetric. It implies a possibility to reduce power consumption by optimizing signal assignment to the inputs. In this study we theoretically derive power consumption of 2-input NAND gate based on transition probability of input signals, with taking into account charging current due to an internal node. We also propose a signal assignment method to input terminals for reducing power consumption reduction by extending our method for large circuits, and demonstrate the effect of power consumption reduction by the present method.

A deterministic pushdown automaton (dpda) having just one stack symbol is called a deterministic restricted one-counter automaton (droca). When it accepts by empty stack, it is called strict. A deterministic one-counter automaton (doca) is a dpda having only one stack symbol, with the exception of a bottom-of-stack marker. The class of languages accepted by strict droca's is a subclass of the class of languages accepted by doca's. Valiant has proved the decidability of the equivalence problem for doca's and the undecidability of the inclusion problem for doca's. Hence the decidablity of the equivalence problem for strict droca's is obvious. In this paper, we present a new direct branching algorithm for checking the inclusion for a pair of languages accepted by strict droca's. Then we show that the worst-case time complexity of our algorithm is polynomial with respect to these automata.

A graph G is said to be universal for a family F of graphs if G contains every graph in F as a subgraph. A minimum universal graph for F is a universal graph for F with the minimum number of edges. This paper considers a minimum universal graph for the family Fkn of graphs on n vertices with path-width at most k. We first show that the number of edges in a universal graph Fkn is at least Ω(kn log(n/k)). Next, we construct a universal graph for Fkn with O(kn log(n/k)) edges, and show that the number of edges in a minimum universal graph for Fkn is Θ(kn log(n/k)) .

This paper describes an O(log3n) time O(n/log n) processors parallel algorithm for determining the congruence (exact matching) of two point sets in three-dimensions on a CREW PRAM, where n is the maximum size of the input point sets. Although optimal O(n log n) time sequential algorithms were developed for this problem, no efficient parallel algorithm was known previously. In the algorithm, the original problem is reduced to the two-dimensional congruence problem by computing a three-dimensional point set cps(S) for each input point set S, where cps(S) satisfies the following conditions: 0|cps(S)|12; cps(T(S))T(cps(S)) for all isometric transformations T. The two-dimensional problem can be solved efficiently in parallel using a parallel version of a previously-known sequential algorithm. cps(S) is computed recursively in the following way: the size of a point set is reduced by a constant factor in each recursive step. To reduce the size of a point set, a convex hull is constructed and then it is regarded as a planar graph, so that combinatorial properties of a planar graph are used effectively. A sequential version of the algorithm works in O(n log n) time, so that this paper gives another optimal sequential algorithm. The presented algorithm can be applied for graphs such that each vertex corresponds to a point and each edge corresponds to a line segment connecting its endpoints. Moreover, the algorithm can be modified for computing the canonical form of a point set or a graph.

This paper describes an exact symbolic formulation of resource-constrained scheduling which allows speculative operation execution in arbitrary forward-branching control/data paths. The technique provides a closed-form solution set in which all satisfying schedules are encapsulated in a compressed OBDD-based representation. An iterative construction method is presented along with benchmark results. The experiments demonstrate the ability of the proposed technique to efficiently extract parallelism not explicitly specified in the input description.

We developed a new test-synthesis that operates method based on data transfer analysis at the language level. Using this method, an efficient scan path is inserted to generate test data for the sequential circuit by using only a test generation tool for the combinatorial circuit. We have applied this method successfully to the behavior, logic, and test design of a 32-bit, RISC-type processor. The size of the synthesized circuit without test synthesis is 23,407 gates; the size with test synthesis is 24,811 gates. This is an increase of only a little over 6%.