The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] PU(3318hit)

3241-3260hit(3318hit)

  • Photonic LSI--Merging the Optical Technology into LSI--

    Yoshihiko MIZUSHIMA  

     
    INVITED PAPER-Key Paper

      Vol:
    E76-C No:1
      Page(s):
    4-12

    The future trends of optical technologies combined with LSI are reviewed. Present problems of LSI, and the possible solutions to these problems through the merger of the optical technology into LSI are discussed. One of the present trends in interconnection between LSI components is the timeserial approach, originally developed for the optical communication. This method is capable of high speed data transfer. The other is a space-parallel approach, arising from the two-dimensional nature of the light propagation. This approach has the capability of performing parallel processing. A hybrid OEIC, possibly on GaAs, is discussed as an example of future photonic LSI. The lack of key devices is a fundamental barrier to the future improvement of photonic LSI. Direct interaction between photons and electrons is a promissing approach. Some of the Author's ideas to promote the merger of photonics and LSI are proposed.

  • A System for Deciding the Security of Cryptographic Protocols

    Hajime WATANABE  Toru FUJIWARA  Tadao KASAMI  

     
    PAPER

      Vol:
    E76-A No:1
      Page(s):
    96-103

    It is difficult to decide whether or not a given cryptographic protocol is secure even though the cryptographic algorithm used for the protocol is assumed to be secure. We have proposed an algorithm to decide the security of cryptographic protocols under several conditions. In this paper, we review our algorithm and report a system to verify the security. The system has be implemented on a computer. By using this system, we have verified the security of several protocols efficiently.

  • A Real-Time Speech Dialogue System Using Spontaneous Speech Understanding

    Yoichi TAKEBAYASHI  Hiroyuki TSUBOI  Hiroshi KANAZAWA  Yoichi SADAMOTO  Hideki HASHIMOTO  Hideaki SHINCHI  

     
    PAPER

      Vol:
    E76-D No:1
      Page(s):
    112-120

    This paper describes a task-oriented speech dialogue system based on spontaneous speech understanding and response generation (TOSBURG). The system has been developed for a fast food ordering task using speaker-independent keyword-based spontaneous speech understanding. Its purpose being to understand the user's intention from spontaneous speech, the system consists of a noise-robust keyword-spotter, a semantic keyword lattice parser, a user-initiated dialogue manager and a multimodal response generator. After noise immunity keyword-spotting is performed, the spotted keyword candidates are analyzed by a keyword lattice parser to extract the semantic content of the input speech. Then, referring to the dialogue history and context, the dialogue manager interprets the semantic content of the input speech. In cases where the interpretation is ambiguous or uncertain, the dialogue manager invites the user to confirm verbally the system's understanding of the speech input. The system's response to the user throughout the dialogue is multimodal; that is, several modes of communication (synthesized speech, text, animated facial expressions and ordered food items) are used to convey the system's state to the user. The object here is to emulate the multimodal interaction that occurs between humans, and so achieve more natural and efficient human-computer interaction. The real-time dialogue system has been constructed using two general purpose workstations and four DSP accelerators (520MFLOPS). Experimental results have shown the effectiveness of the newly developed speech dialogue system.

  • An Access Control Mechanism for Object-Oriented Database Systems

    Tadashi ARAKI  Tetsuya CHIKARAISHI  Thomas HARDJONO  Tadashi OHTA  Nobuyoshi TERASHIMA  

     
    PAPER

      Vol:
    E76-A No:1
      Page(s):
    112-121

    The security problems of object-oriented database system are investigated and security level assignment constraints and an access control mechanism based on the multilevel access control security policy are proposed. The proposed mechanism uses the Trusted Computing Base. A unique feature of the mechanism is that security levels are assigned not only to data items (objects), but also to methods and methods are not shown to the users whose security level is lower than that of the methods. And we distinguish between the security level of a variable in a class and that in an instance and distinguish between the level of an object when it is taken by itself and it is taken as a variable or an element of another complex object. All of this realizes the policy of multilevel access control.

  • Design and Creation of Speech and Text Corpora of Dialogue

    Satoru HAYAMIZU  Shuichi ITAHASHI  Tetsunori KOBAYASHI  Toshiyuki TAKEZAWA  

     
    INVITED PAPER

      Vol:
    E76-D No:1
      Page(s):
    17-22

    This paper describes issues on dialogue corpora for speech and natural language research. Speech and text corpora of dialogue have recently become more important for the development and the evaluation of speech and text-based dialogue systems. However, the design and the construction of dialogue corpora themselves still remain research issues and many problems have not yet been clarified. Many kinds of corpus are necessary to study various aspects of dialogues. On the other hand, each corpus should contain a certain quantity for each purpose in order to make it statistically meaningful. This paper presents the issues related with design and creation of dialogue corpora; the selection of a task domain, transcription conventions, situations for the collection, syntactic and semantic ill-formedness, and politeness. Future directions for dialogue corpora creation are also discussed.

  • High-Temperature Operation of nMOSFET on Bonded SOI

    Yoshihiro ARIMOTO  

     
    PAPER-SOI Devices

      Vol:
    E75-C No:12
      Page(s):
    1442-1446

    This paper describes high-temperature operation of nMOSFET on bonded SOI. A long-channel nMOSFET is fabricated on bonded SOI (Si layer thickness 0.3 µm), SOS (Si layer thickness 0.3 µm), and bulk Si, Bonded SOI is produced using pulse-field-assisited bonding and resistivity-sensitive etching. The high-temperature operation of bonded SOI nMOSFET is demonstrated and compared with SOS and bulk MOSFETs. The leakage current variation with temperature is signnificantly smaller in bonded SOI and in SOS than in bulk MOSFETs. At high temperatures, the drain current to leakage current ratio is 100 times higher in bonded SOI than in SOS and bulk devices. At 300, a ratio of 104 is obtained for the bonded SOI nMOSFET. The ratio is expected to be even higher if a reduced channel length and ultrathin (less than 0.1 µm) bonded SOI is used.

  • Voice Communication Connection Control in Digital Public Land Mobile Networks

    Masami YABUSAKI  Kouji YAMAMOTO  Shinji UEBAYASHI  Hiroshi NAKAMURA  

     
    PAPER

      Vol:
    E75-A No:12
      Page(s):
    1702-1709

    This paper describes voice communication connection controls in digital public land mobile networks (D-PLMNs). Voice communications in the D-PLMNs are carried at about 10 kbit/s over narrow-band TDMA channels with highly efficient cellular voice encoding schemes. Extensive research is being carried on half-rate voice encoding schemes that will effectively double radio resources. We first outline the configuration of voice communication connection between a cellular phone in the D-PLMN and a telephone in a fixed network, and we describe the optimum position for the CODECs that transform cellular voice codes to the conventional voice codes used in the fixed network, and vice versa. Then we propose a CODEC-bypassed communication control scheme that improves the quality of voice communication between cellular phones. And we propose a cellular voice code negotiation scheme in the D-PLMN which supports different cellular voice encoding schemes. We also propose an efficient channel reassignment scheme for effectively assigning TDMA channels to voice calls with two different bitrates (full-rate and half-rate), and we analyze this scheme's traffic capability. Finally, we describe a dual-tone multiple-frequency (DTMF) signal transmission scheme and estimate the number of DTMF signal senders required in the D-PLMN.

  • Bit Error Probability and Throughput Performance of Time Spread PPM/CDMA Systems

    Xuping ZHOU  Ikuo OKA  Chikato FUJIWARA  

     
    PAPER

      Vol:
    E75-A No:12
      Page(s):
    1696-1701

    A model for time spread-pulse position modulation (TS-PPM)/code division multiple access (CDMA) systems is presented. A TS signal is produced by a TS-filter, whose characteristic is a pseudonoise sequence in frequency domain. The error probability performance is analyzed and compared with those of on-off keying (OOK) and binary phase shift keying (BPSK). It is shown that at the same transmission speed TS-PPM is superior to TS-OOK and TS-BPSK due to the dramatic decrease of multiple access interference. The throughput of the network is analyzed, and its relation to the length of pseudonoise sequence and the packet length is also discussed.

  • Performance Evaluation of Block SR-ARQ Scheme in High-Speed Communication Environments

    Chunxiang CHEN  Masaharu KOMATSU  Kozo KINOSHITA  

     
    PAPER

      Vol:
    E75-B No:12
      Page(s):
    1338-1345

    In high-speed packet networks, protocol processing overhead time becomes remarkable in determining the system performance. In this paper, we present a new Selective-Repeat ARQ scheme (called Block SR-ARQ sheme), in which a packet is transmitted or retransmitted in the same way as basic SR-ARQ scheme, but a single acknowledgement packet is used to acknowledge a block of packets. The maximum number of packets acknowledged by an acknowledgement packet is defined as block size. We analyze the system throughput and the average packet delay over the system, and the accuracy of approximately analyzed results is validated by simulation. Furthermore, we show that there exists an optimal block size which obtains both the maximum throughput and the minimum average packet delay.

  • Discussion on a Method to Generalize the Computerized Test Based on the Analysis of Learners' Image Structure to Computer System

    Takako AKAKURA  Keizo NAGAOKA  

     
    LETTER

      Vol:
    E75-A No:12
      Page(s):
    1751-1754

    In this letter authors discussed on the strategy to apply computerized tests on learners who have negative attitude to computerized tests. First, learners' image to computer system was measured by semantic differential method (SD method). It was revealed that the image of computer systems was made up of four factors of subjective evaluation (Es), objective evaluation (Eo), potency (P) and activity (A). Learners who have negative attitude to computerized test were revealed to have negative image on (Es) and (A) factors, while on the other hand have rather positive image on (Eo) and (P) factors. Then authors developed the feedback record charts laying stress on (Eo) and (P) factors. This feedback chart was effective to improve learners' acceptability of computerized test.

  • Detecting Separability of Nonlinear Mappings Using Computational Graphs

    Kiyotaka YAMAMURA  Masahiro KIYOI  

     
    LETTER-Analog Circuits and Signal Processing

      Vol:
    E75-A No:12
      Page(s):
    1820-1825

    Separability is a valuable property of nonlinear mappings. By exploiting this property, computational complexity of many numerical algorithms can be substantially reduced. In this letter, a new algorithm is presented that detects the separability of nonlinear mappings using the concept of "computational graph". A hybrid algorithm using both the top-down search and the bottom-up search is proposed. It is shown that this hybrid algorithm is advantageous in detecting the separability of nonlinear simultaneous functions.

  • Chaotic Phenomena in the Maxwell-Bloch Equation with Time Delay

    Keiji KONISHI  Yoshiaki SHIRAO  Hiroaki KAWABATA  Masaya HIRATA  Toshikuni NAGAHARA  Yoshio INAGAKI  

     
    LETTER

      Vol:
    E75-A No:12
      Page(s):
    1747-1750

    One model of a laser is a set of differential equations called the Maxwell-Bloch equations. Actually, in a physical system, causing a chaotic behavior is very difficult. However the chaotic behavior can be observed easily in the system which has a mirror to feedback the delayed output.

  • Context-Free Grammars with Memory

    Etsuro MORIYA  

     
    PAPER-Automaton, Language and Theory of Computing

      Vol:
    E75-D No:6
      Page(s):
    847-851

    CFGs (context-free grammars) with various types of memory are introduced and their generative capacities are investigated. For an automata-theoretic characterization, a new type of automaton called partitioning automaton is introduced and it is shown that the class of languages generated by CFGs with memory type X is equal to the class of languages accepted by partitioning automata of type X.

  • A Symmetrical Side Wall (SSW)-DSA Cell and the Channel Erasing Scheme for a 64 Mbit Flash Memory

    Ken-ichi OYAMA  Noriaki KODAMA  Hiroki SHIRAI  Kenji SAITOH  Yosiaki S. HISAMUNE  Takeshi OKAZAWA  

     
    PAPER

      Vol:
    E75-C No:11
      Page(s):
    1358-1363

    A 0.4 µm stacked gate cell for a 64 Mbit flash memory has been developed which has the Symmetrical Side Wall Diffusion Self Aligned (SSW-DSA) structure. Using the proposed SSW-DSA cell with p+ pockets at both the drain and the source, and adequate punchthrough resistance to scale the gate length down to sub-half-micron has been obtained. It is also demonstrated that the channel erasing scheme applying negative bias to the gate, which is adopted for the SSW-DSA cell, shows lower trapped charges after Write/Erase (W/E) cycles evaluated by a charge pumping technique, and results in better endurance an retention characteristics than conventional erasing schemes.

  • A High-Input-Voltage Converter Operating at 200kHz

    Satoshi OHTSU  Hisao ISHII  Takashi YAMASHITA  Toshiyuki SUGIURA  

     
    PAPER

      Vol:
    E75-B No:11
      Page(s):
    1151-1158

    A new circuit and a transformer structure is described for a high-input-voltage converter operating at a high switching frequency. The two-MOSFET forward converter is suitable for a high-input-voltage converter. To increase the switching frequency, the reset period of the transformer core flux must be reduced. There are a few methods for decreasing the reset period. Increasing the transformer flyback voltage and reducing its stray capacitance are effective in decreasing the reset period without increasing power loss. A new two-MOSFET forward converter is proposed which uset the increased flyback voltage and a transformer structure to reduce the stray capacitance. The new converter using this transformer provides the basis for a 48-V, 100-W output, 270-V input converter operating at 200kHz with high efficiency (above 95%).

  • Discrete Time Modeling and Digital Signal Processing for a Parameter Estimation of Room Acoustic Systems with Noisy Stochastic Input

    Mitsuo OHTA  Noboru NAKASAKO  Kazutatsu HATAKEYAMA  

     
    PAPER

      Vol:
    E75-A No:11
      Page(s):
    1460-1467

    This paper describes a new trial of dynamical parameter estimation for the actual room acoustic system, in a practical case when the input excitation is polluted by a background noise in contrast with the usual case when the output observation is polluted. The room acoustic system is first formulated as a discrete time model, by taking into consideration the original standpoint defining the system parameter and the existence of the background noise polluting the input excitation. Then, the recurrence estimation algorithm on a reverberation time of room is dynamically derived from Bayesian viewpoint (based on the statistical information of background noise and instantaneously observed data), which is applicable to the actual situation with the non-Gaussian type sound fluctuation, the non-linear observation, and the input background noise. Finally, the theoretical result is experimentally confirmed by applying it to the actual estimation problem of a reverberation time.

  • Comparison of Aliasing Probability for Multiple MISRs and M-Stage MISRs with m Inputs

    Kazuhiko IWASAKI  Shou-Ping FENG  Toru FUJIWARA  Tadao KASAMI  

     
    PAPER

      Vol:
    E75-D No:6
      Page(s):
    835-841

    MISRs are widely used as signature circuits for VLSI built-in self tests. To improve the aliasing probability of MISRs, multiple MISRs and M-stage MISRs with m inputs are available, where M is grater than m. The aliasing probability as a function of the test length is analyzed for the compaction circuits for a binary symmetric channel. It is observed that the peak aliasing probability of the double MISRs is less than that of M-stage MISRs with m inputs. It is also shown that the final aliasing probability for a multiple MISR with d MISRs is 2dm and that for an M-stage MISR with m imputs is 2M if it is characterized by a primitive polynomial.

  • Fault Tolerance Assurance Methodology of the SXO Operating System for Continuous Operation

    Hiroshi YOSHIDA  Hiroyuki SUZUKI  Kotaro OKAZAKI  

     
    PAPER

      Vol:
    E75-D No:6
      Page(s):
    797-803

    In developing the SXO operating system for the SURE SYSTEM 2000 continuous operation system, we aimed to create an unprecedentedly high software and hardware fault tolerance. We devised a fault tolerant architecture and various methodologies to ensure fault tolerance. We implemented these techniques systematically throughout operating system development. In the design stage, we developed a design methodology called the recovery process chart to verify that recovery mechanisms were complete. In the manufacturing stage, we applied the concept of critical routes to recovery and other processes essential to high dependability. We also developed a method of finding critical routes in a recovery process chart. In the test stage, we added an artificial software fault injection mechanism to the operating system. It generates various reproducible errors at appropriate times and reduces the number of personnel needed for test, making system reliability evaluation easy.

  • Modeling and Simulation of the Sliding Window Algorithm for Fault-Tolerant Clock Synchronization

    Manfred J. PFLUEGL  Douglas M. BLOUGH  

     
    PAPER

      Vol:
    E75-D No:6
      Page(s):
    792-796

    Synchronous clocks are an essential requirement for a variety of distributed system applications. Many of these applications are safety-critical and require fault tolerance. In this paper, a general probabilistic clock synchronization model is presented. This model is uniformly probabilistic, incorporating random message delays, random clock drifts, and random fault occurrences. The model allows faults in any system component and of any type. Also, a new Sliding Window Clock Synchronization Algorithm (SWA) providing increased fault tolerance is proposed. The probabilistic model is used for an evaluation of SWA which shows that SWA is capable of tolerating significantly more faults than other algorithms and that the synchronization tightness is as good or better than that of other algorithms.

  • A Design of Static Operatable Low-Power 16-bit Microprocessor

    Hiroaki KANEKO  Takashi MIYAZAKI  Hideki SUGIMOTO  

     
    PAPER-Low-Voltage Operation

      Vol:
    E75-C No:10
      Page(s):
    1188-1195

    This paper describes a 16-bit microprocessor using circuit and process technology that realize static operation considering low-power consumption. The microprocessor so called V30HL achieved 4 times of performance per a unit power consumption as well as kept a complete software/hardware compatibility with standard 16-bit microprocessors. Also, the microprocessor operates in the range of DC-8 MHz for 2.7-5.5 V supply.

3241-3260hit(3318hit)