In this paper, we propose a floorplan aware high-level synthesis algorithm with body biasing for delay variation compensation, which minimizes the average leakage energy of manufactured chips. In order to realize floorplan-aware high-level synthesis, we utilize huddle-based distributed register architecture (HDR architecture). HDR architecture divides the chip area into small partitions called a huddle and we can control a body bias voltage for every huddle. During high-level synthesis, we iteratively obtain expected leakage energy for every huddle when applying a body bias voltage. A huddle with smaller expected leakage energy contributes to reducing expected leakage energy of the entire circuit more but can increase the latency. We assign control-data flow graph (CDFG) nodes in non-critical paths to the huddles with larger expected leakage energy and those in critical paths to the huddles with smaller expected leakage energy. We expect to minimize the entire leakage energy in a manufactured chip without increasing its latency. Experimental results show that our algorithm reduces the average leakage energy by up to 39.7% without latency and yield degradation compared with typical-case design with body biasing.

This study proposes an effective pseudo relevance feedback method for information retrieval in the context of question answering. The method separates two retrieval models to improve the precision of initial search and the recall of feedback search. The topic-preserving query expansion links the two models to prevent the topic shift.

Previously, it is not obvious to what extent was accepted for the assessors when we see the 3D image (including multi-view 3D) which the luminance change may affect the stereoscopic effect and assessment generally. We think that we can conduct a general evaluation, along with a subjective evaluation, of the luminance component using both the S-CIELAB color space and CIEDE2000. In this study, first, we performed three types of subjective evaluation experiments for contrast enhancement in an image by using the eight viewpoints parallax barrier method. Next, we analyzed the results statistically by using a support vector machine (SVM). Further, we objectively evaluated the luminance value measurement by using CIEDE2000 in the S-CIELAB color space. Then, we checked whether the objective evaluation value was related to the subjective evaluation value. From results, we were able to see the characteristic relationship between subjective assessment and objective assessment.

Silicon-on-insulator (SOI) has become one of the most famous materials in recent years, especially in silicon photonics applications. This paper presents a comparative performance of a SOI-based optical interconnect (OI) vs. an electrical interconnect (EI) for high-speed performances at a circuit level. The SOI-based optical waveguide was designed using OptiBPM to obtain a single mode condition (SMC). Then, the optical interconnect (OI) link was simulated in OptiSPICE and was tested as an interconnection in two-stage CS amplifiers. The results showed that the two-stage CS amplifier using OI offered several advantages in terms of electrical performances, such as voltage gain, frequency bandwidth, slew rate, and propagation delay, which makes it superior to the EI.

With rapid increase of the number of applications as well as the sizes of data, multi-query processing on the MapReduce framework has gained much attention. Meanwhile, there have been much interest in skyline query processing due to its power of multi-criteria decision making and analysis. Recently, there have been attempts to optimize multi-query processing in MapReduce. However, they are not appropriate to process multiple skyline queries efficiently and they also require modifications of the Hadoop internals. In this paper, we propose an efficient method for processing multi-skyline queries with MapReduce without any modification of the Hadoop internals. Through various experiments, we show that our approach outperforms previous studies by orders of magnitude.

The growth in the amount of information available on the Internet and thousands of user queries per second brings huge challenges to the index update and query processing of search engines. Index compression is partially responsible for the current performance achievements of existing search engines. The selection of the index compression algorithms must weigh three factors, i.e., compression ratio, compression speed and decompression speed. In this paper, we study the well-known Simple-9 compression, in which exist many branch operations, table lookup and data transfer operations when processing each 32-bit machine word. To enhance the compression and decompression performance of Simple-9 algorithm, we propose a successive storage structure and processing metric to compress two successive Simple-9 encoded sequence of integers in a single data processing procedure, thus the name Successive Simple-9 (SSimple-9). In essence, the algorithm shortens the process of branch operations, table lookup and data transfer operations when compressing the integer sequence. More precisely, we initially present the data storage format and mask table of SSimple-9 algorithm. Then, for each mode in the mask table, we design and hard-code the main steps of the compression and decompression processes. Finally, analysis and comparison on the experimental results of the simulation and TREC datasets show the compression and decompression efficiency speedup of the proposed SSimple-9 algorithm.

Object detection is at the heart of nearly all the computer vision systems. Standard off-the-shelf embedded processors are hard to meet the trade-offs among performance, power consumption and flexibility required by object detection applications. Therefore, this paper presents an Application Specific Instruction set Processor (ASIP) for object detection using AdaBoost-based learning algorithm with Haar-like features as weak classifiers. Algorithm optimizations are employed to reduce memory bandwidth requirements without losing reliability. In the proposed ASIP, Single Instruction Multiple Data (SIMD) architecture is adopted for fully exploiting data-level parallelism inherent to the target algorithm. With adding pipeline stages, application-specific hardware components and custom instructions, the AdaBoost algorithm is accelerated by a factor of 13.7x compared to the optimized pure software implementation. Compared with ARM946 and TMS320C64+, our ASIP shows 32x and 7x better throughput, 10x and 224x better area efficiency, 6.8x and 18.8x better power efficiency, respectively. Furthermore, compared to hard-wired designs, evaluation results show an advantage of the proposed architecture in terms of chip area efficiency while maintain a reliable performance and achieve real-time object detection at 32fps on VGA video.

This paper proposes a novel framework for enhancing underwater images captured by optical imaging model and non-local means denoising. The proposed approach adjusts the color balance using biasness correction and the average luminance. Scene visibility is then enhanced based on an underwater optical imaging model. The increase in noise in the enhanced images is alleviated by non-local means (NLM) denoising. The final enhanced images are characterized by improved visibility while retaining color fidelity and reducing noise. The proposed method does not require specialized hardware nor prior knowledge of the underwater environment.

Decentralized channel assignment schemes are proposed to obtain low system-wide spatial overlap regions in wireless local area networks (WLANs). The important point of channel assignment in WLANs is selecting channels with fewer contending stations rather than mitigating interference power due to its medium access control mechanism. This paper designs two potential game-based channel selection schemes, basically each access point (AP) selects a channel with smaller spatial overlaps with other APs. Owing to the property of potential games, each decentralized channel assignment is guaranteed to converge to a Nash equilibrium. In order that each AP selects a channel with smaller overlaps, two metrics are proposed: general overlap-based scheme yields the largest overlap reduction if a sufficient number of stations (STAs) to detect overlaps are available; whereas decomposed overlap-based scheme need not require such STAs, while the performance would be degraded due to the shadowing effect. In addition, the system-wide overlap area is analytically shown to be upper bounded by the negative potential functions, which derives the condition that local overlap reduction by each AP leads to system-wide overlap reduction. The simulation results confirm that the proposed schemes perform better reductions in the system-wide overlap area compared to the conventional interference power-based scheme under the spatially correlated shadowing effect. The experimental results demonstrate that the channel assignment dynamics converge to stable equilibria even in a real environment, particularly when uncontrollable APs exist.

Deploying low power nodes (LPNs), which reuse the spectrum licensed to a macrocell network, is considered to be a promising way to significantly boost network capacity. Due to the spectrum-sharing, the deployment of LPNs could trigger the severe problem of interference including intra-tier interference among dense LPNs and inter-tier interference between LPNs and the macro base station (MBS), which influences the system performance strongly. In this paper, we investigate a spectrum-sharing approach in the downlink for two-tier networks, which consists of small cells (SCs) with several LPNs and a macrocell with a MBS, aiming to mitigate the interference and improve the capacity of SCs. The spectrum-sharing approach is described as a multi-objective optimization problem. The problem is solved by the nondominated sorting genetic algorithm version II (NSGA-II), and the simulations show that the proposed spectrum-sharing approach is superior to the existing one.

We propose an architecture for a 1-bit band-pass delta-sigma modulator (BP-DSM) that outputs concurrent multiband RF signals. The proposed BP-DSM consists of parallel bandpass filters (BPFs) in the feedback loop to suppress the quantization noise at each target frequency band while maintaining the stability. Each BPF is based on second-order parallel infinite impulse response (IIR) filters. This architecture can unify and reconfigure the split BPFs according to the number of bands. The architecture complexity is proportional to the bandwidth of each RF signal and is independent of the carrier spacing between the bands. The conventional architecture of a concurrent multiband digital modulator, reported previously, has multiple input ports to the dedicated BPF at each band and so it cannot be efficiently integrated. Measurements show that the proposed architecture is feasible for transmitting a concurrent dual-band and a triple-band by changing the 1-bit digital data stream while keeping a data transmission rate of 10Gb/s. We demonstrate that the proposed architecture outputs the signal with LTE intra-band and inter-band carrier aggregation on 0.8GHz, 2.1GHz and 3.5GHz, each with 40MHz bandwidth in 120MHz aggregated bandwidth, whose bandwidth surpasses the bandwidth with carrier aggregation of LTE-A up to 100MHz. Adjacent channel leakage ratios of -49dBc and -46dBc are achieved at 3.5GHz in the concurrent dual-band and triple-band, respectively.

This paper presents a single image super-resolution (SR) algorithm based on self-similarity using non-local-mean (NLM) metric. In order to accurately find the best self-example even under noisy environment, NLM weight is employed as a self-similarity metric. Also, a pixel-wise soft-switching is presented to overcome an inherent drawback of conventional self-example-based SR that it seldom works for texture areas. For the pixel-wise soft-switching, an edge-oriented saliency map is generated for each input image. Here, we derived the saliency map which can be robust against noises by using a specific training. The proposed algorithm works as follows: First, auxiliary images for an input low-resolution (LR) image are generated. Second, self-examples for each LR patch are found from the auxiliary images on a block basis, and the best match in terms of self-similarity is found as the best self-example. Third, a preliminary high-resolution (HR) image is synthesized using all the self-examples. Next, an edge map and a saliency map are generated from the input LR image, and pixel-wise weights for soft-switching of the next step are computed from those maps. Finally, a super-resolved HR image is produced by soft-switching between the preliminary HR image for edges and a linearly interpolated image for non-edges. Experimental results show that the proposed algorithm outperforms state-of-the-art SR algorithms qualitatively and quantitatively.

Replacement of highly stressed logic gates with internal node control (INC) logics is known to be an effective way to alleviate timing degradation due to NBTI. We propose a path clustering approach to accelerate finding effective replacement gates. Upon the observation that there exist paths that always become timing critical after aging, critical path candidates are clustered to select representative path in each cluster. With efficient data structure to further reduce timing calculation, INC logic optimization has first became tractable in practical time. Through the experiments using a processor, 171x speedup has been demonstrated while retaining almost the same level of mitigation gain.

Bayesian networks are a powerful approach for representation and reasoning under conditions of uncertainty. Of the many good algorithms for learning Bayesian networks from data, the bio-inspired search algorithm is one of the most effective. In this paper, we propose a hybrid mutual information-modified binary particle swarm optimization (MI-MBPSO) algorithm. This technique first constructs a network based on MI to improve the quality of the initial population, and then uses the decomposability of the scoring function to modify the BPSO algorithm. Experimental results show that, the proposed hybrid algorithm outperforms various other state-of-the-art structure learning algorithms.

Collaborative filtering with only implicit feedbacks has become a quite common scenario (e.g. purchase history, click-through log, and page visitation). This kind of feedback data only has a small portion of positive instances reflecting the user's interaction. Such characteristics pose great challenges to dealing with implicit recommendation problems. In this letter, we take full advantage of matrix factorization and relative preference to make the recommendation model more scalable and flexible. In addition, we propose to take into consideration the concept of covisitation which captures the underlying relationships between items or users. To this end, we propose the algorithm Integrated Collaborative Filtering for Implicit Feedback incorporating Covisitation (ICFIF-C) to integrate matrix factorization and collaborative ranking incorporating the covisitation of users and items simultaneously to model recommendation with implicit feedback. The experimental results show that the proposed model outperforms state-of-the-art algorithms on three standard datasets.

This paper proposes 0-1-A-Ā LUT, a new programmable logic using atom switches, and a delay-optimal mapping algorithm for it. Atom switch is a non-volatile memory device of very small geometry which is fabricated between metal layers of a VLSI, and it can be used as a switch device of very small on-resistance and parasitic capacitance. While considerable area reduction of Look Up Tables (LUTs) used in conventional Field Programmable Gate Arrays (FPGAs) has been achieved by simply replacing each SRAM element with a memory element using a pair of atom switches, our 0-1-A-Ā LUT achieves further area and delay reduction. Unlike the conventional atom-switch-based LUT in which all k input signals are fed to a MUX, one of input signals is fed to the switch array, resulting area reduction due to the reduced number of inputs of the MUX from 2k to 2k-1, as well as delay reduction due to reduced fanout load of the input buffers. Since the fanout of this input buffers depends on the mapped logic function, this paper also proposes technology mapping algorithms to select logic function of fewer number of fanouts of input buffers to achieve further delay reduction. From our experiments, the circuit delay using our k-LUT is 0.94% smaller in the best case compared with using the conventional atom-switch-based k-LUT.

A comprehensive method applying a nonlinear frequency compression (FC) as complementary to multi-band loudness compensation is proposed, which is able to improve loudness compensation and simultaneously increase high-frequency speech intelligibility for digital hearing aids. The proposed nonlinear FC (NLFC) improves the conventional methods in the aspect that the compression ratio (CR) is adjusted based on the speech intelligibility percentage in different frequency ranges. Then, an adaptive wide dynamic range compression (AWDRC) with a time-varying CR is applied to achieve adaptive loudness compensation. The experimental test results show that the mean speech identification is improved in comparison with the state-of-art methods.

This letter proposes a class of polyphase zero correlation zone (ZCZ) sequence sets with low inter-set cross-correlation property. The proposed ZCZ sequence sets are constructed from DFT matrices and r-coincidence sequences. Each ZCZ sequence set is optimal, and the absolute value of the cross-correlation function of sequences from different sets is less than or equal to $rsqrt{N}$, where N denotes the length of each sequence. These ZCZ sequence sets are suitable for multiuser environments.

This paper proposes approximated log likelihood ratios (LLRs) for single carrier millimeter-wave (mmW) transmission systems in the presence of phase noise. In mmW systems, phase noise on carrier wave signals in very high frequency bands causes severe performance degradation. In order to mitigate the impairments of phase noise, forward error correction (FEC) techniques, such as low density parity check (LDPC) code, are effective. However, if the probabilistic model does not capture the exact behavior of the random process present in the received signal, FEC performance is severely degraded, especially in higher order modulation or high coding rate cases. To address this issue, we carefully examine the probabilistic model of minimum mean square error (MMSE) equalizer output including phase noise component. Based on the derived probabilistic model, approximated LLR computation methods with low computational burden are proposed. Computer simulations confirm that the approximated LLR computations on the basis of the derived probabilistic model are capable of improving bit error rate (BER) performance without sacrificing computational simplicity in the presence of phase noise.

In this paper, a novel fusion center controlled media access control (MAC) protocol for physical wireless parameter conversion sensor networks (PHY-C SN), and a transmission power design for each sensor node are proposed. In PHY-C SN, the sensing information is converted to corresponding subcarrier number of orthogonal frequency division multiplexing (OFDM) signals, and all sensor nodes can send sensing information simultaneously. In most wireless sensor network standards, each sensor node detects the surrounding wireless signal through carrier sense. However, sensor nodes cannot send signals simultaneously if carrier sense is applied in PHY-C SN. Therefore, a protocol for PHY-C SN is devised. In the proposed protocol, the fusion center detects the surrounding wireless environment by carrier sense and requests sensing information transmission toward sensor nodes if no other wireless systems are detected. Once the sensor nodes receive the request signal, they transmit sensing information to the fusion center. Further, to avoid harmful interference with surrounding wireless systems, the transmission power of each sensor is designed to suit the considering communication range and avoid interference toward other wireless systems. The effectiveness of the proposed protocol is evaluated by computer simulation. The parameters for collection like the number of collecting sensor nodes and the radius of the collection area are also examined when determining the transmission power of sensor nodes. Results show that highly efficient information collection with reducing interference both from and towards surrounding wireless systems can be implemented with PHY-C SN.