Kenichi SUZUKI Mitsuhiro TAKEDA Atsushi KAMO Hideki ASAI
This letter presents a novel application of the Verilog-A, which is a hardware description language for analog circuits, to the modeling and simulation of high-speed interconnects in time/frequency transform-domain for signal integrity problems. This modeling method with the Verilog-A language would handle the transfer function approximation and admittance matrices, which are expressed by the dominant poles and residues as used in AWE technique. Finally, it is shown that modeling and simulation of the high-speed interconnects with nonlinear terminations can be done easily.
In 1998, Jan and Tseng proposed two integrated schemes of user authentication and access control which can be used to implement a protection system in distributed computer systems. This paper will analyze the security of both schemes and show that an intruder can easily forge a login, be accepted and logged in as a legal user, and access system resources. We will then propose a modified scheme to withstand our proposed attacks.
Kazunori MUKASA Takeshi YAGI Kunio KOKURA
A novel optical transmission line consisted of fibers characterized by positive and negative medial dispersion of NZ-DSF and SMF was designed and fabricated. Both P-MDF and N-MDF have achieved the medial dispersion and low non-linearity simultaneously. Total characteristics were confirmed to be suitable for the future high-bit-rate transmission.
Yoshiharu FUJISAKU Masatoshi KAGAWA Toshio NAKAMURA Hitoshi MURAI Hiromi T. YAMADA Shigeru TAKASAKI Kozo FUJII
40 Gbit/s optical transceiver using a novel OTDM MUX module has been developed. OTDM (Optical-Time-Division-Multiplexing) MUX module, the core component of the transmitter, consisted of a optical splitter, two electro-absorption (EA) modulators and a combiner in a sealed small package. As the split optical paths run through the "air" in the module, greatly stable optical phase relation between bit-interleaved pulses could be maintained. With the OTDM MUX module, the selection between conventional Return-to-Zero (conventional-RZ) format and carrier-suppressed RZ (CS-RZ) format is performed by slightly changing the wavelength of laser-diode. In a receiver, 40 Gbit/s optical data train is optically demultiplexed to 10 Gbit/s optical train, before detected by the O/E receiver for 10 Gbit/s RZ format. Back-to-back MUX-DEMUX evaluations of the transceiver exhibited good sensitivities of under -30 dBm measured at 40 Gbit/s optical input to achieve the bit-error-rate (BER) of 10-9. Another unique feature of the transceiver system was a spectrum switch capability. The stable RZ and CS-RZ multiplexing operation was confirmed in the experiment. Once we adjust the 40 Gbit/s optical signal to CS-RZ format, the optical spectrum would maintain its CS spectrum shape for a long time to the benefit of the stable long transmission characteristics. In the recirculating loop experiment employing the OTDM MUX transceiver, the larger power margin was successfully observed with CS-RZ format than with conventional-RZ format, indicating that proper encoding of conventional-RZ and CS-RZ was realized with this prototype transceiver. In the case of CS-RZ format, the error free (BER < 10-9) transmission over 720 km was achieved with the long repeater amplifier span of 120 km.
Naohiko IRIE Fumio ARAKAWA Kunio UCHIYAMA Shinichi YOSHIOKA Atsushi HASEGAWA Kevin IADONATE Mark DEBBAGE David SHEPHERD Margaret GEARTY
An embedded processor core using split branch architecture has been developed. This processor core targets 400 MHz using 0.18 µm technology, and its higher frequency needs deeper pipeline than the conventional processor. To solve the increasing branch penalty problem caused by a deeper pipeline, this processor takes an active preload mechanism to preload the target instructions to internal buffers in order to hide the instruction cache latency. The processor also uses multiple instruction buffers to reduce branch penalty cycles of branch misprediction. The performance estimation result shows that about 70% of branch overhead cycles can be reduced from the conventional implementation. The area for this branch mechanism consumes only 1% of the total core, which is smaller than the conventional branch target buffer (BTB) scheme, and helps to achieve low power and low cost.
Much has been said and written about the changes in analog IC technology such as shrinking line widths, vanishingly low supply voltages, severe power limitations, and digital noise. But beyond these technology changes and their subsequent methodology changes, a far more subtle revolution is happening in the nature of the profession itself. Technology, software, and product evolution have all conspired to create a new kind of analog IC designer, one very different from the IC designers of the past.
Sangook MOON Yong Joo LEE Jae Min PARK Byung In MOON Yong Surk LEE
A new approach on designing a finite field multiplier architecture is proposed. The proposed architecture trades reduction in the number of clock cycles with resources. This architecture features high performance, simple structure, scalability and independence on the choice of the finite field, and can be used in high security cryptographic applications such as elliptic curve crypto-systems in large prime Galois Fields (GF(2m)).
Johannes KNEIP Matthias WEISS Wolfram DRESCHER Volker AUE Jurgen STROBEL Thomas OBERTHUR Michael BOLLE Gerhard FETTWEIS
This paper presents the HiperSonic 1, a multi-standard, application-specific signal processor, designed to execute the baseband conversion algorithms in IEEE802.11a- and HIPERLAN/2-based 5 GHz wireless LAN applications. In contrast to widely existing, dedicated implementations, most of the computational effort here was mapped onto a configurable, data- and instruction-parallel DSP core. The core is supplemented by mixed signal A/D, D/A converters and hardware accelerators. Memory and register architecture, instruction set and peripheral interfaces of the chip were carefully optimized for the targeted applications, leading to a sound combination of flexibility, die area and power consumption. The 120 MHz, 7.6 million-transistor solution was implemented in 0.18 µm CMOS and performs IEEE802.11a or HiperLAN/2 compliant baseband processing at data rates up to 60 Mbit/s.
Chiho LEE Gwangzeen KO Kiseon KIM
In this paper, we propose an activity-based estimation scheme to determine the received signal power disparity, that enhances the BER performance of the SIC scheme in a DS/CDMA system considering a practical voice activity factor, and compare BER performance with those of other schemes with or without estimation. Numerical analysis results show that the SIC scheme with the proposed activity-based estimation improves the BER performance compared with that without considering voice activity, and it approaches to that of the ideal estimation as the total number of concurrent users increases. In addition, the higher becomes the maximum attainable SNR, the better becomes the BER performance of the proposed activity-based estimation scheme.
Itsuro MORITA Keiji TANAKA Noboru EDAGAWA Masatoshi SUZUKI
The effectiveness of Aeff enlarged positive dispersion fiber (EE-PDF) and hybrid amplification configuration with erbium-doped fiber amplifier (EDFA) and fiber Raman amplifier for reducing the fiber nonlinearity and improving the transmission performance in long distance 40 Gbit/s-based WDM transmission was investigated. We have confirmed that the use of EE-PDF in modified dispersion map for 40 Gbit/s transmission is quite effective to increase the transmissible distance and have successfully demonstrated 16 40 Gbit/s WDM transmission over 2000 km with proper dispersion management. We have also confirmed that the use of distributed Raman amplification is quite effective to extend the repeater spacing. By adding the optimum Raman amplification, almost the same transmission performance was obtained with a doubled repeater spacing in long distance 40 Gbit/s-based WDM transmission.
Hiroki OOI Tomoo TAKAHARA George ISHIKAWA Shinichi WAKANA Yuichi KAWAHATA Hideki ISONO Nobuaki MITAMURA
We demonstrated variable dispersion compensation using the Virtually Imaged Phased Array (VIPA) for a 40-Gbit/s dense-WDM transmission system. The large tunable range from -800 to +800 ps/nm in the entire C-band wavelength range and the high tunable resolution of 1 ps/nm was achieved by using a 3-dimensional mirror equipped with a stepping motor that we developed. We adopted the dispersion monitor of 40-GHz intensity extracted from the received 40-Gbit/s baseband signals, and verified that this dispersion monitoring method is applicable to nonlinear transmission by detecting the monitor peak. Using the VIPA variable dispersion compensator and the dispersion monitor, we demonstrated 1.28-Tbit/s (40-Gbit/s 32 ch) automatic dispersion compensation. As a result, we confirmed that only two VIPAs and one fixed dispersion compensating fiber (DCF) are needed to make our method applicable to the entire C-band for dense WDM 40-Gbit/s systems having a large transmission range of 80 km.
Masahito TOMIZAWA Yoshiaki KISAKA Takashi ONO Yutaka MIYAMOTO Yasuhiko TADA
This paper proposes a statistical design approach for Non-Return-to-Zero (NRZ) 40 Gbit/s systems with Forward Error Correction (FEC); the approach considers Polarization Mode Dispersion (PMD). We introduce a fluctuating PMD emulator to experimentally clarify FEC performance in PMD-limited systems. By using the proposed design approach, and considering the FEC relaxation effect on PMD, the maximum transmission distance of an NRZ 40 Gbit/s system without PMD compensation is estimated as several hundreds of km depending on the number of cable concatenations per link and the probability threshold of system acceptance.
Kiyoshi FUKUCHI Kayato SEKIYA Risato OHHIRA Yutaka YANO Takashi ONO
A 1.6-Tb/s dense WDM signal was successfully transmitted over 480 km using the carrier-suppressed return-to-zero (CS-RZ) modulation format. The CS-RZ format was chosen because it exhibited better transmission performance over a wide fiber-input power window than the NRZ and RZ formats in a 40-Gb/s-based WDM transmission experiment with 100-GHz channel spacing, confirming its nonlinearity-insensitive nature in dense WDM systems. With the wide power window of CS-RZ, we achieved stable transmission of 4040-Gb/s WDM signals over a 480-km (680 km) standard SMF line with only the C-band, in which a spectral ripple remained during transmission. Distributed Raman amplification and forward error correction were not used, providing a margin for already installed transmission lines.
ChangYoon LEE Mitsuo GEN Yasuhiro TSUJIMURA
In this study, a hybrid genetic algorithm/neural network with fuzzy logic controller (NN-flcGA) is proposed to find the global optimum of reliability assignment/redundant allocation problems which should be simultaneously determined two different types of decision variables. Several researchers have obtained acceptable and satisfactory results using genetic algorithms for optimal reliability assignment/redundant allocation problems during the past decade. For large-size problems, however, genetic algorithms have to enumerate numerous feasible solutions due to the broad continuous search space. Recently, a hybridized GA combined with a neural network technique (NN-hGA) has been proposed to overcome this kind of difficulty. Unfortunately, it requires a high computational cost though NN-hGA leads to a robuster and steadier global optimum irrespective of the various initial conditions of the problems. The efficacy and efficiency of the NN-flcGA is demonstrated by comparing its results with those of other traditional methods in numerical experiments. The essential features of NN-flcGA namely, 1) its combination with a neural network (NN) technique to devise initial values for the GA, 2) its application of the concept of a fuzzy logic controller when tuning strategy GA parameters dynamically, and 3) its incorporation of the revised simplex search method, make it possible not only to improve the quality of solutions but also to reduce computational cost.
In this paper, we investigate self diagnosable systems on multi-processor systems, known as one-step t-diagnosable systems introduced by Preparata et al. Kohda has proposed "highly structured system" to design diagnosable systems such that faulty processors are diagnosed efficiently. On the other hand, it is known that Cayley graphs have been investigated as good models for architectures of large-scale parallel processor systems. We investigate some conditions for Cayley graphs to be topologies for optimal highly structured diagnosable systems, and present several examples of optimal diagnosable systems represented by Cayley graphs.
Hiroyuki EHARA Koji YOSHIDA Kazutoshi YASUNAGA Toshiyuki MORII
This paper presents a high quality 4-kbit/s speech coding algorithm based on a CELP algorithm. The coder operates on speech frames of 20 ms. The algorithm has following four main features: multiple sub-codebooks, backward adaptive mode switching, dispersed-pulse structure, and noise post-processing. The multiple sub-codebooks consist of a pulse-codebook and a random-codebook so that they can handle both signals, noise-like (e.g. unvoiced, stationary noise) and pulse-like (e.g. voiced). The backward adaptive mode switching is performed using decoded parameters; therefore, no additional mode bit is transmitted. The random-codebook size is switched with the backward adaptively selected mode. The subjective quality of unvoiced speech or noise-like signal can be improved by this switching operation because the random-codebook size is greatly increased in such signal mode. The dispersed-pulse structure provides better performance of sparse pulse excitation using dispersed pulses instead of simple unit pulses. The noise post-processing employs a stationary background noise generator for producing stationary noise signal. It significantly improves subjective quality of decoded signal under various background noise conditions. Subjective listening tests are conducted in accordance with ACR and DCR tests. The ACR test results indicate that the fundamental performance of the MDP-CELP is equivalent to that of 32-kbit/s adaptive differential pulse code modulation (ADPCM). The DCR test results show that the performance of the MDP-CELP is equivalent to or better than that of 8-kbit/s conjugate-structure algebraic code excited linear prediction (CS-ACELP) under several background noise conditions.
Kiyoko KATAYANAGI Yasuyuki MURAKAMI Masao KASAHARA
Recently, Kasahara and Murakami proposed new product-sum type public-key cryptosystems with the Chinese remainder theorem, Methods B-II and B-IV. They also proposed a new technique of selectable encryption key, which is referred to as 'Home Page Method (HP Method).' In this paper, first, we describe Methods B-II and B-IV. Second, we propose an effective attack for Method B-II and discuss the security of Methods B-II and B-IV. Third, applying the HP Method to Methods B-II and B-IV, we propose new product-sum type PKC with selectable encryption key. Moreover, we discuss the security of the proposed cryptosystems.
A new dimension-reduced interference suppression scheme is proposed for DS-CDMA systems over multipath channels. The proposed receiver resolves the problems of interference and multipath effects without needing to estimate the channel and training sequences. The minimum mean squared error (MMSE) criterion is used to obtain an algorithm to cancel the interference of each path. The MMSE filter is composed of two stages based on multipath effects. The proposed receiver has low complexity without great degradation of performance compared with the full dimension MMSE receiver with known channel information. Simulation results show that the proposed receiver converges to the optimal value rapidly because of its reduced dimension.
Kenji SATO Shoichiro KUWAHARA Yutaka MIYAMOTO Koichi MURATA Hiroshi MIYAZAWA
Phase-inversion between neighboring pulses appearing in carrier-suppressed return-to-zero pulses is effective in reducing the signal distortion due to chromatic dispersion and nonlinear effects. A generation method of the anti-phase pulses at 40 GHz is demonstrated by using semiconductor mode-locked lasers integrated with chirped gratings. Operation principle and pulse characteristics are described. Suppression of pulse distortion due to fiber dispersion is confirmed for generated anti-phase pulses. Repeaterless 150-km dispersion-shifted-fiber L-band transmission at 42.7 Gbit/s is demonstrated by using the pulse source.
Shih-Chang HSIA I-Chang JOU Shing-Ming HWANG
Watermarking techniques are widely used to protect the secret document. In some valuable literatures, most of them concentrate on the binary data watermarking by using comparisons of an original image and a watermarked image to extract the watermark. In this paper, an efficient watermarking algorithm is presented with two-layer hidden for gray-level image watermarking. In the first layer, the key information is found based on the codebook concept. Then the secret key is further hidden to the watermarked image adopting the encryption consisting of spatial distribution in the second layer. The simulations demonstrate that the watermarking information is perceptually invisible in the watermarked image. Moreover, the gray-level watermark can be extracted by referring key parameters rather than the original image, and the extracting quality is very good.