The design of N-dimensional (N-D) FIR filters requires in general an enormous computational effort. One of the most successful methods for design and implementation is the McClellan transformation. In this paper a numerically simple technique for determining the coefficients of the transformation is suggested. This appears to be the simplest available method for the design of N-D hyperspherically symmetric FIR filters with excellent symmetry.

For the connection request procedure in mobile communication systems, a previous study had shown that the 3-channel systems provide the haighest maximum of stable per channel throughput. In this paper, we propose and study a new algorithm, called the Parallel Collision Resolution Algorithm, which can be implemented in a Q-channel connection request environment, where Q3. For the implementation, the channels are arranged in R groups, where R is a positive integer. The collision resolution scheme distributes the collided messages over all the groups so that throughput and delay measures can be improved. At any point in time, there can be a maximum of R collision resolution schemes operational irrespective of the channel or the group number over which collisions occurred. The performance measures are estimated by computer simulation. Under the new algorithm, almost the same level of the perchannel stable throughput measure of a 3-channel network can be achieved in networks for which Q3. This feature allows freedom to the network designer to employ a higher number of connection request channels without forfeiting high channel utilization rates. When Q is an integral multiple of 3, the maximum stable per channel throughput level achieved can be the same as that achieved by the 3 channel system, if the grouping of channels is such that each group consists of 3 channels. When Q is not an integral multiple of 3, the intuitive strategy of organizing the channels in such a way that Q/3 groups consist of 3 channels each and one group consists of (Q mod 3) channels, may result in much degraded performance. It is found that, if the channels are so organised that no group is composed of (Q mod 3) channels, the performance levels can be substantially enhanced. Also, under the new algorithm, the delay measure is significantly improved, particularly in schemes like the mobile satellite systems with high propagation delays. We conclude that the new scheme presents a promising collision resolution methodology for connection request procedures.

One model of a laser is a set of differential equations called the Maxwell-Bloch equations. Actually, in a physical system, causing a chaotic behavior is very difficult. However the chaotic behavior can be observed easily in the system which has a mirror to feedback the delayed output.

A model for time spread-pulse position modulation (TS-PPM)/code division multiple access (CDMA) systems is presented. A TS signal is produced by a TS-filter, whose characteristic is a pseudonoise sequence in frequency domain. The error probability performance is analyzed and compared with those of on-off keying (OOK) and binary phase shift keying (BPSK). It is shown that at the same transmission speed TS-PPM is superior to TS-OOK and TS-BPSK due to the dramatic decrease of multiple access interference. The throughput of the network is analyzed, and its relation to the length of pseudonoise sequence and the packet length is also discussed.

This paper relates to a novel algorithm for fast estimation of the coefficients of the adaptive FIR filter. The novel algorithm is derived from a first order IIR filter experssion clarifying the estimation process of the NLMS (normalized least mean square) algorithm. The expression shows that the estimation process is equivalent to a procedure extracting the cross-correlation coefficient between the input and the output of an unknown system to be estimated. The interpretation allows to move a subtraction of the echo replica beyond the IIR filter, and the movement gives a construction with the IIR filter coefficient of unity which forms the arithmetic mean. The construction in comparison with the conventional NLMS algorithm, improves the covergence rate extreamly. Moreover, when we use the construction with a simple technique which limits the term of calculating the correlation coefficient in the beginning of a convergence process, the convergence delay becomes negligible. This is a very desirable performance for acoustic echo canceller. In this paper, double-talk and echo path fluctuation are also studied as the first stage for application to acoustic echo canceller. The two subjects can be resolved by introducing two switches and delays into the evaluation process of the correlation coefficient.

This paper proposes a new adaptive algorithm of the FIR type digital filter for an acoustic echo canceller and similar application fields. Unlike an echo canceller for line, an acoustic echo canceller requires a large number of taps, and it must work appropriately while it is driven by colored input signal. By controlling the filter tap length and updating filter coefficients multiple times during a single sampling interval, the proposed algorithm improves the convergence characteristics of adaptation even if colored input signal is introduced. This algorithm is maned VT-LMS after variable tap length LMS. The results of simulation show the effectiveness of the proposed algorithm not only for white noise but also for colored input signal such as speech. The VT-LMS algorithm has better convergence characteristice with very little extra computational load compared to the conventional algorithm.

This paper describes a new method for verifying designs at the RTL with respect to their specifications at the functional level. The base of the verification method shown here is the translation of the specification and design representations to graph models, where the descriptions common to both representations have a symbolic representation. These symbol labeled graphs are then simplified and, by solving the all node-pair path expression problem for them, a pair of regular expressions is obtained for every two nodes in the graphs. The first regular expression in each pair represents the flow of control and the second one the flow of data between the corresponding nodes. The process of verification is carried out by checking whether or not every pair of regular expressions of the specification has a corresponding pair in the design.

CFGs (context-free grammars) with various types of memory are introduced and their generative capacities are investigated. For an automata-theoretic characterization, a new type of automaton called partitioning automaton is introduced and it is shown that the class of languages generated by CFGs with memory type X is equal to the class of languages accepted by partitioning automata of type X.

This paper presents a protocol verification method which verifies that the behaviors of a protocol meet requirements. In this method, a protocol specification is expressed as Extended Finite State Machines (EFSM's) that can handle variables, and requirements are expressed using a branching-time temporal logic for a concise and unambiguous description. Using the acyclic expansion algorithm extended such that it can deal with EFSM's, the verification method first generates a state transition graph consisting of executable transitions for each process. Then a branching-time temporal logic formula representing a requirement is evaluated on one of the generated graphs which is relevant to the requirement. An executable state transition graph for each process is much smaller than a global state transition graph which has been used in the conventional verification techniques to represent the behaviors of the whole protocol system consisting of all processes. The computation for generating the graphs is also reduced to much extent for a large complex protocol. As a result, the presented method achieves efficient verification for requirements regarding a state of a process, transmission and reception of messages by a process, varibales of a process and sequences that interact among processes. The validity of the method is illustrated in the paper by the verification of a path-updating protocol for requirements such as process state reachability or fair termination among processes.

Recently, Burch et al. proposed symbolic model checking method to verify sequential machines formally. The method, which is based on logic function manipulation using binary decision diagram, can handle large sequential machines that cannot be handled by the conventional techniques. The expressive power of Computational Tree Logic (CTL), which was used by Burch et al., is not very powerful, for example, CTL cannot describe repetition of events. This papers shows an extension of the symbolic model checking algorithm to Branching time regular temporal logic (BRTL), which has been proposed by the authors as an improvement of CTL in terms of expressive power. The implemented verifier based on the proposed algorithm could verify behaviors of a microprocessor composed of approximately 1,600 gates and 68 flipflops.

The paper describes a parallel algorithm for the manipulation of binary decision diagrams on a shared memory multi-processor system. Binary decision diagrams are very efficient representations of logic functions, and are widely used in computer aided design of logic circuits. Logic operations on logic functions such as AND and OR are reduced to operations on binary decision diagrams representing these functions. Operations on binary decision diagrams are time-consuming in some cases, and a fast manipulation method is needed. As with the manipulation, we focus on the construction of a binary decision diagram from a logic formula, and devised a parallel algorithm for the construction. In the construction, there are many logic operations to be processed, and some of them can be processed in parallel. At first, we introduce an extraction method and a parallel-execution method for such parallelizable operations. This is the parallel execution method for an operation sequence (or a set of operations). To extract more parallelism, we introduce a dynamic expansion method of a logic operation. The dynamic expansion is a method to obtain sub-operations from a logic operation using the modified Shannon's expansion. These sub-operations are executed in parallel and the results of these sub-operations are merged to obtain the result of the original operation. Our parallel algorithm, which is based on the construction of shared binary decision diagrams with the negative edge and the operation cache, is implemented in C on a shared memory multi-processor system Sequent S-81 (CPU 80386 (16 MHz)28, 86.75MB), and applied to multiplier examples and ISCAS benchmarks. The speed-up ratio becomes 14 for multipliers, and becomes 11 for c1908 in ISCAS benchmarks.

This article proposes, given an independently-and-identically distributed binary source, an arithmetic code-like variable-to-variable length source code whose compression efficiency achieves nearly the rate function in a range of small distortion. Inheriting advantages of arithmetic codes, the proposed code requires neither large memory capacity nor large computation time for management of messages and codewords. The Elias code, which can be regarded as an antecedent of arithmetic codes, is defined originally in terms of the first-in-first-out (FIFO) coding form. The proposed code corresponds to an extension from the Elias code refined in terms of the last-in-first-out (LIFO) coding form into one considered a fidelity criterion.

Diffusion of phosphorus impurities from a polycrystalline silicon films into a silicon substrate was investigated as a function of the mean concentration of phosphorus in a polycrystalline silicon film at the first diffusion stage. We presented that good control of the redistribution of implanted phosphorus impurities was possible by optimizing the normalized dose, which is the value: [the total dose of phosphorus impurities]/[the polycrystalline silicon film thickness], in the case of samples both with and without an arsenic doped layers. In the range where the normalized dose was less than 1.52.51020 cm-3, deeper junctions were formed in samples with an arsenic doped layer. In the range where the normalized dose was more than 1.52.51020 cm-3, however, deeper junctions were formed in samples without any arsenic doped layer rather than in samples with an arsenic doped layer. These results mean that formation of the junction in the device structure where a high concentration phosphorus doped polysilicon layer is stacked on to the high concentration arsenic layer embeded at the surface of the substrate can be restricted by optimizing the normalized dose. Moreover, a trade-off relationship between suppressing phosphorus diffusion and maintaining low contact resistance against normalized doses was also observed.

Optical fiber cable systems are being developed in many countries for subscriber loops as the infrastructure to realize B-ISDN (Broadband Integrated Services Digital Network). The present systems are DLC (Digital Loop Carrier) systems which provide leased lines, POTS (Plain Old Telephone Services), and N-ISDN (Narrowband ISDN) services. Before FTTH (Fiber To The Home) networks can be implemented, their construction cost must be lowered to the level of the current metallic network. The FTTH network must also be easy to operate and maintain. In this paper, we describe optical fiber cables, splicing, and testing technologies used in the NTT cable networks, and introduce the technologies being developed to construct FTTH networks.

Microcrystalline silicon embedded in silicon oxide has been prepared by means of a wet oxidation of porous silicon (PS) anodically produced from degenerate Si wafers in a HF solution. As the oxidation proceeded, optical absorptions of the PS specimen in the visible light region shifted obviously to the higher energy side. Visible light emission from the oxidized specimen was observed at room temperature with photoexcitation by a He-Cd laser while the as-prepared specimen emitted no visible lights. These results are discussed in relation to the quantum size effect of the microcrystalline silicon confined in the oxide matrix as well as visible emissions from as-prepared specimens produced from non-degenerate Si wafers.

Subscriber network opticalization is the key issue for the next generation network. Fiber-optic systems have been limited to mainly big business applications, so far. Massive opticalization including home and small business customers remains the ultimate goal. Opticalization of the subscriber network needs an enormous investment and a long construction period. In order to achieve smooth evolution towards B-ISDN, the subscriber network must be effectively opticalized well in advance of full B-ISDN deployment. This paper presents the development concept of optical subscriber network. It also describes the design concept and configuration of fiber-optic subscriber systems. Deployment strategies and the developing technologies for the future subscriber network are also addressed.

In this paper, a type hybrid ARQ scheme with Adaptive Forward Error Correction (ARQ/AFEC) using BCH codes is proposed and analyzed. The basic idea in the proposed type hybrid ARQ/AFEC scheme is to increase the error-correcting capability of BCH code according to channel state using incremental redundancy. The incremental redundancy is the remainder ai(x) of an information frame f(x) of length n divided by a minimum polynomial mi(x) of α2i-1, where α is a primitive element of finite field GF(2l). Let gi(x) be the product of mj(x) (j=1, 2, , i) and let ci(x) be the remainder of f(x) divided by gi(x). The polynomial ci(x) is obtained from the remainders ai(x) and ci-1(x) since mi(x)and gi-1 (x) are relatively prime. Since f(x) + ci(x) is divided by gi(x), f(x) + ci(x) is the codeword of an i-error-correcting BCH code when n2l-1. So, the errors less than or equal to i bits in f(x) can be corrected if ci(x) has no error.

A Ge/Si structure grown by chemical vapor deposition (CVD) is angle-lapped and characterized by the micro-Raman spectroscopy. Near the interface, the phonon mode due to the Si-Ge bond is clearly observed, which indicates that a SiGe alloy is formed by the solid-phase interdiffusion at the interface. The thickness of the interfacial alloy layer is about 0.2 µm. Amount of residual strain is estimated by comparing the measured phonon frequencies with those predicted from the composition profie, but the shift due to the residual strain is not appreciable. Both the interdiffusion at the interface and the nearly complete relaxation of the lattice mismatch are attributed to the high growth temperature of the CVD sample.

The transmission of 8-bit µ-law PCM signals using 16-level weighted QAM over Gaussian channels is examined. The weighting process modifies the positions of the QAM constellation points so that the overall distortion in the recovered information-bearing source signal is reduced. The PCM bits are mapped to the weighted QAM points such that the most significant bits have a lower probability of being in error than the least significant bits. The weighted QAM systems have been optimized for the same energy signal energy per transmitted symbol as for unweighted QAM. Also, the erasure zone is established at the detector, such that if the output falls into the erasure zone, the regenerated sample is replaced by interpolation. The theoretical results indicates that 16-level weighted QAM have a gain of 5dB over unweighted QAM.

The DSD (Double Soft Decision) concatenated forward error correction scheme is proposed to realize a higher-coding-gain forward error correction system with simple hardware. The novel scheme soft decision decodes inner codes as well as outer codes. In this scheme, likelihood information from an inner Viterbi decoder is used for the decoding of outer codes. Path memory circuit status 1,0 ratio is newly proposed as a measure of likelihood information and it is shown that this method is the most reliable even though it has the simplest hardware among the alternative likelihood information extracting methods. Computer simulation clarifies that the proposed DSD scheme improves Pe performance to one-third that of the conventional hard decision outer decoding.