This paper is concerned with the validation of simple turning points of two-point boundary value problems of nonlinear ordinary differential equations. Usually it is hard to validate approximate solutions of turning points numerically because of it's singularity. In this paper, it is pointed out that applying the infinite dimensional Krawcyzk-based interval validation method to enlarged system, the existence of simple turning points can be verified. Taking an example, the result of validation is also presented.

The required building blocks of CMOS fuzzy chips capable of performing as adaptive fuzzy systems are described in this paper. The building blocks are designed with mixed-signal current-mode cells that contain low-resolution A/D and D/A converters based on current mirrors. These cells provide the chip with an analog-digital programming interface. They also perform as computing elements of the fuzzy inference engine that calculate the output signal in either analog or digital formats, thus easing communication of the chip with digital processing environments and analog actuators. Experimental results of a 9-rule prototype integrated in a 2. 4-µm CMOS process are included. It has a digital interface to program the antecedents and consequents and a mixed-signal output interface. The proposed design approach enables the CMOS realization of low-cost and high-inference fuzzy systems able to cope with complex processes through adaptation. This is illustrated with simulated results of an application to the on-line identification of a nonlinear dynamical plant.

This letter presents a new algorithm for improving the Signal to Noise Ratio (SNR) of complex sinusoidal signals contaminated by additive Gaussian noises using sum of Higher-Order Statistics (HOS). We conduct some computer simulations to show that the proposed algorithm can improve the SNR more than 7 dB compared with the conventional coherent integration when the SNR of the input signal is -10 dB.

Synchronization between two fully stretching piecewise affine Markov maps in the usual master-slave configuration has been proven to be possible in some interesting 2-dimensional and 3-dimensional cases. Aim of this contribution is to make a further step in the study of this phenomenon by showing that, if the two systems synchronize, the probability of having a certain synchronization time is bounded from above by an exponentially vanishing distribution. This result gives some formal ground to the numerical evidence shown in [2].

In this paper, we show that two-dimensional billiards with point interactions inside exhibit a chaotic nature in the microscopic world, although their classical counterpart is non-chaotic. After deriving the transition matrix of the system by using the self-adjoint extension theory of functional analysis, we deduce the general condition for the appearance of chaos. The prediction is confirmed by numerically examining the statistical properties of energy spectrum of rectangular billiards with multiple point interactions inside. The dependence of the level statistics on the strength as well as the number of the scatterers is displayed.

The most basic cross-talk minimization problem is to assign given n intervals to n parallel tracks where the cross-talk is defined between two intervals assigned to the adjacent tracks with the amount linear to parallel running length. This paper solves the problem for the case when any pair of intervals intersects and the objective is to minimize the sum of cross-talks. We begin the discussion with the fact that twice the sum of lengths of n/2 shortest intervals is a lower bound. Then an interval set that attains this lower bound is characterized with a simple assignment algorithm. Some additional considerations provide the minimum cross-talk for the other interval sets. The main procedure is to sort the intervals twice with respect to the length of left and right halves of intervals.

We here consider an extension of the validity of classical criteria ensuring the robustness of the statistical features of discrete time dynamical systems with respect to implementation inaccuracies and noise. The result is achieved by proving that, whenever a discrete time dynamical system is robust, all the discrete time dynamical systems topologically conjugate with it are also robust. In particular, this result offer an explanation for the stochastic robustness of the logistic map, which is confirmed by the reported experimental measurements.

A numerical method is proposed for efficiently locating fold bifurcation points of periodic orbits of high-dimensional differential-equation systems. This method is an extension of the subspace shooting method (or the Newton-Picard shooting method) that locates periodic orbits by combining the conventional shooting method and the brute-force method. Fold bifurcation points are located by combining a variant of the subspace shooting method with a fixed parameter value and the secant method for searching the parameter value of the bifurcation point. The target in the subspace-shooting part is an (not necessarily periodic) orbit represented by a Poincare mapping point which is close to the center manifold and satisfies the eigenvalue condition for the bifurcation. The secant-search part finds the parameter value where this orbit becomes periodic. Avoiding the need for differentiating the Poincare map with respect to the bifurcation parameter and exploiting several properties of the center manifold, the proposed method is both robust and easy to implement.

This paper describes an efficient simulation algorithm for the spatiotemporal pattern analysis of the continuous-time neural networks with the multivalued logic (multivalued continuous-time neural networks). The multivalued transfer function of neuron is approximated to the stepwise constant function which is constructed by the sum of the step functions with the different thresholds. By this approximation, the dynamics of the network can be formulated as a stepwise constant linear differential equation at each timestep and the optimal timestep for the numerical integration can be obtained analytically. Finally, it is shown that the proposed method is much faster than a variety of conventional simulators.

Modeling error is the major concerning issue in the trajectory estimation. This paper formulates the dynamic model of a reentry vehicle in reentry phase for identification with an unmodeled acceleration input covering possible model errors. Moreover, this work presents a novel on-line estimation approach, adaptive filter, to identify the trajectory of a reentry vehicle from a single radar measured data. This proposed approach combines the extended Kalman filter and the recursive least-squares estimator of input with the hypothetical testing scheme. The recursive least-squares estimator is provided not only to extract the magnitude of the unmodeled input but to offer a testing criterion to detect the onset and presence of the input. Numerical simulation demonstrates the superior capabilities in accuracy and robustness of the proposed method. In real flight analysis, the adaptive filter also performs an excellent estimation and prediction performances. The recommended trajectory estimation method can support defense and tactical operations for anti-tactical ballistic missile warfare.

Related with accuracy, computational complexity and so on, quality of computing for the so-called homotopy method has been discussed recently. In this paper, we shall propose an estimation method with interval analysis of region in which unique solution path of the homotopy equation is guaranteed to exist, when it is applied to a certain class of uniquely solvable nonlinear equations. By the estimation, we can estimate the region a posteriori, and estimate a priori an upper bound of the region.

Optical frequency division multiplexing (FDM) technique has the advantage of fully orthogonal transmissions. However, FDM system permits only a small number of FDM channels despite of a great effort, such as frequency stabilization. On the other hand, frequency-domain encoding code-division multiple-access (FE-CDMA) has been widely studied as a type of optical CDMA. In this system, encoding is done in the frequency domain of an ultrashort light pulse spread by optically Fourier transform. However, FE-CDMA accommodates very limited number of simultaneous users, though this scheme uses a vast optical bandwidth. It is attractive to consider the combination of both advantages of FDM and FE-CDMA. We propose FE-CDMA enhancement of FDM (FDM/FE-CDMA). Since in FDM/FE-CDMA the total bandwidth is partitioned into M optical bands and each band is encoded by the code with code length of Nc, we expect nearly perfect orthogonal transmissions. In addition, since the creation of FDM bands is realized by a passive filter, the optical frequency is precisely controlled and the optical frequency allocation is flexible. We derive the bit error rate (BER) as a function of the number of simultaneous users, bit rate, and the utilization efficiency of total bandwidth. We compare the performance of FDM/FE-CDMA with that of the conventional FE-CDMA in terms of the number of simultaneous users on condition that each chip width is constant. As a result, we show that FDM/FE-CDMA can support the larger number of simultaneous users than the conventional FE-CDMA at a given bit error rate under the same total bandwidth.

In this study, a coupled chaotic circuits network is realized by real circuit elements. By using a simple circuit converting generating spatial patterns to digital signal, irregular self-switching phenomenon of the appearing patterns can be observed as real physical phenomenon.

Simplification orderings, like the recursive path ordering and the improved recursive decomposition ordering, are widely used for proving the termination property of term rewriting systems. The improved recursive decomposition ordering is known as the most powerful simplification ordering. Recently Jouannaud and Rubio extended the recursive path ordering to higher-order rewrite systems by introducing an ordering on type structure. In this paper we extend the improved recursive decomposition ordering for proving termination of higher-order rewrite systems. The key idea of our ordering is a new concept of pseudo-terminal occurrences.

We propose an architectural reference of programmable devices that we call Plastic Cell Architecture (PCA). PCA is a reference for implementing a device with autonomous reconfigurability, which we also introduce in this paper. This reconfigurability is a further step toward new reconfigurable computing, which introduces variable- and programmable-grained parallelism to wired logic computing. This computing follows the Object-Oriented paradigm: it regards configured circuits as objects. These objects will be described in a new hardware description language dealing with the semantics of dynamic module instantiation. PCA is the fusion of SRAM-based FPGAs and cellular automata (CA), where the CA are dedicated to support run time activities of objects. This paper mainly focus on autonomous reconfigurability and PCA. The following discussions examine a research direction towards general-purpose reconfigurable computing.

In the IETF, discussions on the authentication method of the Dynamic Host Configuration Protocol (DHCP) message are active and several methods have been proposed. These related specifications were published and circulated as the IETF Internet-Drafts. However, they still have several drawbacks. One of the major drawbacks is that any user can reuse addresses illegally. A user can use an expired address that was allocated to a host. This kind of "illegal use" of the addresses managed by the DHCP server may cause serious security problems. In order to solve them, we propose a new access control method to be used as the DHCP message authentication mechanism. Furthermore, we have designed and developed the DAG (DHCP Access Control Gateway) according to our method. The DAG serves as a gateway that allows only network accesses from clients with the address legally allocated by the DHCP server. This provides secure DHCP service if DHCP servers do not have an authentication mechanism, which is most likely to occur. If a DHCP server has such an authentication scheme as being proposed in IETF Internet-Draft, the DAG can offer a way to enable only a specific client to access the network.

Merged DRAM/logic LSIs could provide high on-chip memory bandwidth by interconnecting logic portions and DRAM with wider on-chip buses. For merged DRAM/logic LSIs with the memory hierarchy including cache memory, we can exploit such high on-chip memory bandwidth by means of replacing a whole cache line (or cache block) at a time on cache misses. This approach tends to increase the cache-line size if we attempt to improve the attainable memory bandwidth. Larger cache lines, however, might worsen the system performance if programs running on the LSIs do not have enough spatial locality of references and cache misses frequently take place. This paper describes a novel cache architecture suitable for merged DRAM/logic LSIs, called variable line-size cache or VLS cache, for resolving the above-mentioned dilemma. The VLS cache can make good use of the high on-chip memory bandwidth by means of larger cache lines and, at the same time, alleviate the negative effects of larger cache-line size by partitioning each large cache line into multiple sub-lines and allowing every sub-line to work as an independent cache line. The number of sub-lines involved when a cache replacement occurs can be determined depending on the characteristics of programs. This paper also evaluates the cost/performance improvements attainable by the VLS cache and compares it with those of conventional cache architectures. As a result, it is observed that a VLS cache reduces the average memory-access time by 16. 4% while it increases the hardware cost by only 13%, compared to a conventional direct-mapped cache with fixed 32-byte lines.

This paper proposes a new processor architecture for manipulating the protocols of digital signal transport systems. In order to offer various kinds of telecommunication services, flexibility as well as high performance is required of digital signal transport systems. To realize such systems, this architecture consists of a core CPU, memories, and dedicated application-specific hardware. Software on the core CPU offers flexibility, while the dedicated hardware provides performance. A computer simulation confirms the efficiency of the architecture.

In this paper we describe the pipeline design and enhanced hardware for fast message handling in a RICA-1 processor, a processing element (PE) in the RWC-1 multiprocessor. The RWC-1 is based on the reduced inter-processor communication architecture (RICA), in which communications are combined with computation in the processor pipeline. The pipeline is enhanced with hardware mechanisms to support fine-grain parallel execution. The data paths of the RICA-1 super-scalar processor are commonly used for communication as well as instruction execution to minimize its implementation cost. A 128-PE system has been built on January 1998, and it is currently used for hardware debugging, software development and performance evaluation.

The dependence of the negative nonlinear absorption effect on the modulation degree and frequency of the incident laser was investigated in Er3+: LiYF4 crystals. With a decreasing modulation degree, a reverse-phased waveform was obtained in the transmitted waveform for modulation intensities of sinusoidal and rectangle waves. The transmitted waveform was observed symmetrically at modulation frequency of 0. 25 MHz. However, the transmitted waveform was asymmetrical at higher than 0. 5 MHz. In addition, the reverse-phased waveforms were obtained for sample lengths greater than 12 mm in the incident modulation degree of 10 to 56%. The NNA effect was observed at a temperature range of 20 to 500 K. It has been confirmed that a mechanism of the negative nonlinear absorption can be explained by considering an enhanced absorption model for a five-level system of the Er3+ ion.