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18141-18160hit(21534hit)

  • Elemental Universality of Sets of Logic Devices

    Kosaku INAGAKI  

     
    PAPER-Automata,Languages and Theory of Computing

      Vol:
    E81-D No:8
      Page(s):
    767-772

    This paper is concerned with a concept called universality or completeness of sets of logic devices. Universality characterizes sets of logic devices which can be used for the construction of arbitrary logic circuits. The elemental universality proposed here is the most general condition of universality which covers logic devices with/without delay time and combinational/sequential circuits. The necessary and sufficient condition of elemental universality shows that nonlinearity and nonmonotonicity are essential conditions for the realization of various digital mechanisms.

  • Heart Rate Simulation with IPFM Model Considering Absolute Refractory Period and Demodulation of Original Generating Function

    Yasuaki NOGUCHI  Takeo HAMADA  Fujihiko MATSUMOTO  Suguru SUGIMOTO  

     
    PAPER-Medical Electronics and Medical Information

      Vol:
    E81-D No:8
      Page(s):
    933-939

    The Heart Rate Variability (HRV) analysis has become vigorous these days. One reason for this is that the HRV analysis investigates the dynamics of the autonomic nervous system activities which control the HRV. The Integral Pulse Frequency Modulation (IPFM) model is a pulse generating mechanism model in the nervous system, that is one of the models which connects the HRV to the autonomic nervous system activities. The IPFM model is a single frequency component model; however, the real HRV has multiple frequency components. Moreover, there are refractory periods after generating action potentials are initiated. Nevertheless, the IPFM model does not consider refractory periods. In order to make sure of the accuracy and the effectiveness of the integral function (IF) method applied to the real data, we consider the absolute refractory periods and two frequency components. In this investigation, the simulated HRV was made with a single and double frequency component using the IPFM model with and without absolute refractory periods. The original generating function of the IPFM model was demodulated by using the instantaneous heart rate tachogram. The power of the instantaneous pulse rate per minute was analyzed by the direct FFT method, the IF FFT method without the absolute refractory periods, and the IF FFT method with the absolute refractory periods. It was concluded that the IF FFT method can demodulate the original generating function accurately.

  • Wide-Wavelength-Range Modulator-Integrated DFB Laser Diodes Fabricated on a Single Wafer

    Masayuki YAMAGUCHI  Koji KUDO  Hiroyuki YAMAZAKI  Masashige ISHIZAKA  Tatsuya SASAKI  

     
    INVITED PAPER-Active Devices for Photonic Networks

      Vol:
    E81-C No:8
      Page(s):
    1219-1224

    Different-wavelength distributed feedback laser diodes with integrated modulators (DFB/MODs) are fabricated on a single wafer operate at wavelengths from 1. 52 µm to 1. 59 µm, a range comparable to the expanded Er-doped fiber amplifier gain band. A newly developed field-size-variation electron-beam lithography enables grating pitch to be controlled to within 0. 0012 nm, and narrow-stripe selective metal-organic vapor-phase epitaxy is used to control the bandgap wavelength of laser active layers and modulator absorption layers for each channel. The channel spacing of fabricated 40-channel DFB/MODs is 214 GHz in average with a standard deviation of 0. 39 nm. Very uniform lasing and modulating performances are achieved, such as threshold currents about 10 mA and extinction ratios about 20 dB at -2 V in average. These devices have been used to demonstrate 2. 5-Gb/s transmission over 600 km of a normal fiber with a power penalty of less than 1 dB.

  • A Software Tool to Enhance Analytical Performance Evaluation Technology

    Chiung-San LEE  

     
    PAPER-Sofware System

      Vol:
    E81-D No:8
      Page(s):
    846-854

    Evaluating analytically computer architecture performance is mostly cheap and quick. However, existing analytical performance evaluation techniques usually have a difficult and time-consuming modeling process. Moreover, existing techniques do not support well the capability for finding the bottleneck and its cause of a target system being evaluated. To address the above problems and to enhance analytical performance evaluation technology, in this paper we propose a software tool that accepts system models described in a specification language, generating an executable program that performs the actual performance evaluation. The whole approach is built on a subsystem-oriented performance evaluation tool, which is, in turn, based on a formal subsystem-oriented performance evaluation technique and a subsystem specification language.

  • Spatial Resolution Improvement of a Low Spatial Resolution Thermal Infrared Image by Backpropagated Neural Networks

    Maria del Carmen VALDES  Minoru INAMURA  

     
    PAPER-Image Processing,Computer Graphics and Pattern Recognition

      Vol:
    E81-D No:8
      Page(s):
    872-880

    Recent progress in neural network research has demonstrated the usefulness of neural networks in a variety of areas. In this work, its application in the spatial resolution improvement of a remotely sensed low resolution thermal infrared image using high spatial resolution of visible and near-infrared images from Landsat TM sensor is described. The same work is done by an algebraic method. The tests developed are explained and examples of the results obtained in each test are shown and compared with each other. The error analysis is also carried out. Future improvements of these methods are evaluated.

  • Transistor Leakage Fault Diagnosis for CMOS Circuits

    Xiaoqing WEN  Hideo TAMAMOTO  Kewal K. SALUJA  Kozo KINOSHITA  

     
    PAPER-Fault Diagnosis

      Vol:
    E81-D No:7
      Page(s):
    697-705

    This paper presents a new methodology for diagnosing transistor leakage faults in a CMOS circuit by using both IDDQ and logic value information. A hierarchical procedure is used to identify and delete impossible fault candidates efficiently and a procedure is employed to generate diagnostic tests for improving diagnostic resolution. A novel approach for handling the intermediate output voltage of a faulty gate is used in new methods for fault simulation and diagnostic test generation based on primary output values. Experimental results on ISCAS85 circuits show the effectiveness of the proposed methodology.

  • On Properties of Kleene TDDs

    Yukihiro IGUCHI  Tsutomu SASAO  Munehiro MATSUURA  

     
    PAPER-Logic Simulation and Logic Optimization

      Vol:
    E81-D No:7
      Page(s):
    716-723

    Three types of ternary decision diagrams (TDDs) are considered: AND -TDDs, EXOR-TDDs, and Kleene-TDDs. Kleene-TDDs are useful for logic simulation in the presence of unknown inputs. Let N(BDD:f), N(AND-TDD:f), and N(EXOR-TDD:f) be the number of non-terminal nodes in the BDD, the AND-TDD, and the EXOR-TDD for f, respectively. Let N(Kleene-TDD:) be the number of non-terminal nodes in the Kleene -TDD for , where is the regular ternary function corresponding to f. Then N(BDD:f) N(TDD:f). For parity functions, N(BDD:f)=N(AND-TDD:f)=N(EXOR-TDD:f)=N(Kleene-TDD:). For unate functions,N(BDD:f)=N(AND-TDD:f). The sizes of Kleene-TDDs are O(3n/n), and O(n3) for arbitrary functions, and symmetric functions, respectively. There exist a 2n-variable function, where Kleene-TDDs require O(n) nodes with the best order, while O(3n) nodes in the worst order.

  • Cyclotron Wave Converter of Microwaves into DC

    Vladimir A. VANKE  Hiroshi MATSUMOTO  Naoki SHINOHARA  Akinori KITA  

     
    PAPER-Microwave and Millimeter Wave Technology

      Vol:
    E81-C No:7
      Page(s):
    1136-1142

    Perspectives of Cyclotron Wave Converter (CWC) of microwaves into DC are discussed in a form of short review. All main parts of CWC (microwave cavity, reverse region and collector) are analysed. Existing experimental results are briefly described.

  • Test Generation for Sequential Circuits under IDDQ Testing

    Toshiyuki MAEDA  Yoshinobu HIGAMI  Kozo KINOSHITA  

     
    PAPER-IDDQ Testing

      Vol:
    E81-D No:7
      Page(s):
    689-696

    This paper presents a test generation method for sequential circuits under IDDQ testing environment and the identification of untestable faults based on the information of illegal states. We consider a short between two signal lines, a short within one gate and a short between two nodes in different gates. The proposed test generation method consists of two techniques. First technique is to use weighted random vectors, and second technique is to use test generator for stuck-at faults. By using the two techniques together, high fault coverage and short computational time can be achieved. Finally experimental results for ISCAS89 benchmark circuits are presented.

  • Partial Scan Design Methods Based on n-Fold Line-Up Structures and the State Justification of Pure Load/Hold Flip-Flops

    Toshinori HOSOKAWA  Toshihiro HIRAOKA  Mitsuyasu OHTA  Michiaki MURAOKA  Shigeo KUNINOBU  

     
    PAPER-Design for Testability

      Vol:
    E81-D No:7
      Page(s):
    660-667

    We will present a partial scan design method based on n-fold line-up structures in order to achieve high fault efficiency and reduce test pattern generation time for practical LSIs. We will also present a partial scan design method based on the state justification of pure load/hold FFs in order to achieve high fault efficiency and reduce the number of scan FFs for practical LSIs with lots of load/hold FFs. Experimental results for practical LSIs show that our presented methods can achieve high fault efficiency (more than 99%) and reduce the number of scan FFs for the LSI with lots of load/hold FFs.

  • Improving Random Pattern Testability with Partial Circuit Duplication Approach

    Hiroshi YOKOYAMA  Xiaoqing WEN  Hideo TAMAMOTO  

     
    PAPER-Design for Testability

      Vol:
    E81-D No:7
      Page(s):
    654-659

    The advantage of random testing is that test application can be performed at a low cost in the BIST scheme. However, not all circuits are random pattern testable due to the existence of random pattern resistant faults. In this paper, we present a method for improving the random pattern testability of logic circuits by partial circuit duplication approach. The basic idea is to detect random pattern resistant faults by using the difference between the duplicated part of a circuit and the original part. Experimental results on benchmark circuits show that high fault coverage can be achieved with a very small amount of hardware overhead.

  • Guided-Probe Diagnosis of LSIs Containing Macrocells

    Norio KUJI  Tadao TAKEDA  

     
    PAPER-Beam Testing/Diagnosis

      Vol:
    E81-D No:7
      Page(s):
    731-737

    A novel method for the guided-probe diagnosis of high-performance LSIs containing macrocells, which have no internal netlist essential to the diagnosis, has been developed. In this method, the macrocell netlist is derived from its layout by extracting a leaf-cell-level netlist and is combined with the original one. Logic models for the leaf cells in the extracted netlist are also generated to obtain the logic-simulation data in the macrocells. The logic modeling is extended for application to memory macrocells, based on the idea that analog-behavior leaf cells in the memory macrocells are converted into logically equivalent circuits for logic simulation. Specifically, sense amplifiers and wired-or connections on bit lines are replaced with the corresponding logic-behavior models. The proposed method has been successfully applied to actual design data of LSIs containing macrocells, and it has been verified that it enables fault paths inside macrocells to be accurately traced and that the logic models give good timing resolution in the logic simulation. Using the proposed method, LSIs containing macrocells will be able to be diagnosed regardless of the macrocell types, without the need for a "golden" device, by an electron-beam guided probe system.

  • Third Order Longitudinal Mode Piezoelectric Ceramic Transformer for High-Voltage Power Inverter

    Takeshi INOUE  Mitsuru YAMAMOTO  Shingo KAWASHIMA  Seiji HIROSE  

     
    PAPER-Ultrasonic Electronics

      Vol:
    E81-C No:7
      Page(s):
    1128-1135

    Low-profile, miniaturized and highly efficient power inverters are required to light up backlights, which include cold cathode fluorescent lamps (CCFLs), in color liquid crystal displays (LCDs), replacing conventional power inverters with electromagnetic transformers. The object of this study is to actualize a power inverter to which a novel multilayered piezoelectric ceramic transformer operating in the third order longitudinal mode is applied. The piezoelectric transformer has a symmetrical structure in the lengthwise direction and its generating part operates in a piezoelectric stiffened mode in order to increase both energy conversion efficiency and power density. This transformer has great advantages. Namely, all the electronic terminals in this transformer can be connected at the vibration nodes of the transformer, which contributes to the guarantee of stable transformer performances at high power operation, and this transformer is superior in impedance matching against the backlight load at steady state, because the output impedance of this transformer is much lower than that of conventional Rosen type transformers. Then a power inverter with the transformer was fabricated. In this power inverter, a separately excited oscillation circuit was adopted to drive the transformer with high efficiency, and the transformer drive frequency was controlled by detecting the backlight current in order to adjust the backlight luminance properly. As a result, the fabricated power inverter exhibited more than 90% overall efficiency and 4. 5-W output power, which is enough power to light up a 9. 4 inch color LCD, including the stray capacitance loss resulting from CCFL mounting. The luminance value on a light transmission plate of the backlight was more than 2000 cd/m2.

  • Controlling Chaos in a Hogg-Huberman Model of a Manufacturing System

    Toshimitsu USHIO  Nobuyoshi MOTONAKA  

     
    PAPER-Nonlinear Problems

      Vol:
    E81-A No:7
      Page(s):
    1507-1511

    Hogg and Huberman have proposed a strategy for stabilizing chaotic multi-agent systems. This paper applies their strategy to a resource allocation problem in a manufacturing system consisting of two machines and two types of parts. These part-types conflict each other over resource allocation. We introduce a discrete-time model of the system by using game theory, and examine stability and bifurcation phenomena of its fixed point. We show by computer simulation that chaotic behaviors are observed after successive occurrence of period-doubling bifurcations. It is also shown that the optimal state of the system is stabilized by a reward mechanism.

  • Evaluation of a CDMA Cell Design Algorithm Considering Non-Uniformity of Traffic and Base Station Locations

    Kohji TAKEO  Shinichi SATO  

     
    PAPER

      Vol:
    E81-A No:7
      Page(s):
    1367-1377

    Non-uniform traffic can affect communications quality in microcell systems, and this disparity in communications quality between base stations (BSs) lowers the system efficiency in CDMA systems. If traffic distribution and propagation conditions are already known during the introduction of a CDMA system, it is desirable to design cell areas according to the non-uniformity of traffic distribution and BS locations. Cell area is determined by the transmission power of the pilot-signal from the BS and it is necessary to control the transmission power of mobile stations in the uplink, which is determined by the desired power level at the BS, according to the cell area. The disparity in communications quality can be rectified by optimally designing the two parameters of the pilot-signal power and desired power level. This paper describes an algorithm for setting both the pilot-signal power and the desired power level during the cell design stage in CDMA systems. The proposed algorithm operates that the communications qualities of all BSs in the system converge to average quality by adjusting the two parameters. The parameters of all BSs in the whole system can be determined through computer calculation. Through performance evaluations, we confirmed that the average SIRs of all BSs attained almost the same value and the variance between the BSs was less than half by adopting the cell design algorithm when there was dispersion in BS placement. This algorithm is also effective using the actual measured SIR after a system has been established.

  • Transformation of Normalized ARMA Lattice Filters for the Purpose of Signal Synthesis

    Miki HASEYAMA  Shinichi SHIRAISHI  Hideo KITAJIMA  

     
    LETTER-Digital Signal Processing

      Vol:
    E81-A No:7
      Page(s):
    1529-1532

    This letter proposes a method to transform normalized ARMA lattice filters, which are originally realized for signal analysis, into signal synthesis lattice filters. Although the transformation method has been proposed for normalized ARMA lattice filters with the MA order which is greater than or equal to the AR order, it has not been done when the AR order is greater than the MA order. With the proposed method, once an ARMA lattice filter with the AR order greater than the MA order is realized, then it can be transformed to the signal synthesis filter.

  • An Information Announcement System Based on WWW for Mobile Computers

    Shigeaki TAGASHIRA  Keniti NAGATOMO  Keizo SAISHO  Akira FUKUDA  

     
    PAPER

      Vol:
    E81-A No:7
      Page(s):
    1387-1395

    With the advance of computer technologies, mobile computers can hold many local resources in themselves. In many cases it is impossible to announce local resources on them because almost information announcement systems are not designed for them. In this paper, an information announcement system for mobile computers based on WWW is proposed. The system efficiently announces resources on mobile computers independently of whether they are connected to a network or not, and wherever they are connected. The system can also select suitable announcement methods according to the type of resources. We implement a prototype of proposed system and evaluate it. The result of evaluation confirms effectiveness of the proposed system.

  • Media Synchronization Control Based on Buffer Occupancy for Stored Media Transmission in PHS

    Masami KATO  Noriyoshi USUI  Shuji TASAKA  

     
    PAPER

      Vol:
    E81-A No:7
      Page(s):
    1378-1386

    This paper proposes a scheme for synchronization of stored video and audio streams in PHS. A video stream of H. 263 is transmitted over a PHS channel with ARQ control, while an audio stream of 32 kbit/s ADPCM is sent on another channel without any control. In order to preserve the temporal constraints within the video stream as well as the relationship between the video and audio streams, we adopt a new control scheme which modifies the target output time according to the amount of video data in the receive-buffer. Through simulation we assess the characteristics of this scheme in both random and burst error environments and confirm the effectiveness of the scheme.

  • Spectrum Resources Management on Two-Tier Cellular Networks

    Isman BAZAR  Yoshikuni ONOZATO  

     
    PAPER

      Vol:
    E81-A No:7
      Page(s):
    1330-1338

    For two-tier cellular network design, resource management between tiers is an important issue to be studied. In this paper, in order to use the network resources preciously, we considered sharing of the available spectrum between the tiers. We evaluate this sharing for two network architectures. In the first architecture, called System I, DS-CDMA is deployed in both tiers. In the second architecture, called System II, TDMA is deployed for users in the microcell tier and CDMA for macrocell users. Using analytically evaluated intercell interference for a two-tier cellular system, we will show the performance and the allowable system capacity for the above systems.

  • Proposal of Chirp Multiplexing Transform/Intensity Modulation/Direct Detection System for Radio Highway Networks

    Yozo SHOJI  Katsutoshi TSUKAMOTO  Shozo KOMAKI  

     
    PAPER

      Vol:
    E81-A No:7
      Page(s):
    1396-1405

    This paper newly proposes the CMT/IM/DD system for universal radio access networks where radio base stations (RBSs) and an optic backbone network are universally available among different radio services and providers. In the proposed system, the Chirp Fourier transformer at an RBS, converts the received FDM multiple radio service signals into optical TDM format signals, then transfers them over the optic fiber-link. This paper is focused on the discussion about the performance on the up-link of the CMT/IM/DD system. A new type of the configuration of CMT and the direct demodulation for the CMT signal are also proposed, and the SNR considering inter-symbol and inter-channel interferences caused by the CMT is theoretically analyzed. Analysis results show that the overall SNR performance of the CMT system is superior to the conventional SCM system when the number of radio channels is more than 26.

18141-18160hit(21534hit)