A CMOS current-mode S-shape correction circuit with shape-adjustable control is proposed for suiting different LCD panel's characteristics from different manufactures. The correction shape is divided into three segments for easy curve-fitting using three lower order polynomials. Each segment could be realized by a corresponding current-mode circuit. The proposed circuit consists of several control points which are designed for tuning the correction shape. The S-shape correction circuit was fabricated using the 0.35 µm TSMC CMOS technology. The measured input dynamic range of the circuit is from 0 µA to 220 µA. The -3 dB bandwidth of the circuit is up to 262 MHz in a high input current region.

Motion blur in TFT-LCD is caused by sample and hold characteristic, slow response time of liquid crystal, and the inconsistency between object tracking of the human eye and the actual object location. In order to solve this problem, a high frame rate driving method based on motion estimation and motion compensation has been applied to LCD products. However, as the required processing time of motion estimation increases in LCD TV and monitor systems, real-time video image processing becomes more difficult. Frame interpolation through the large macro block (MB) size has limitations to detect small objects. So, this paper proposes the efficient motion estimator architecture which uses seven kinds of macro blocks to enhance the accuracy of motion estimation and combines the parallel processing with pre-computation technology and hardware optimization for high-speed processing. Also, for increased efficiency in the hardware architecture, we employed an I2C (Inter Integrated Circuit) communication unit to control the key parameters easily through the personnel computer. Simulation results show that the critical path at the motion estimator is reduced by about 27.47% compared to the conventional structure. As a result, the proposed motion estimator will be applicable for the high-speed frame interpolation of variable video.

A novel data serializer is proposed for use in mobile TFT-LCD driver ICs. The proposed data serializer adopting hierarchical switching and repeater/separator schemes provides 82% power reduction and 27% speed improvement with 27% area saving. Measured overall power consumption of a TFT-LCD driver IC with the proposed data serializer was reduced by as much as 49%.

Slit-Mura defect is a notorious yield flaw of color filters. In this study, an innovative non-contact in-line optical inspection method is developed to detect low contrast slit Mura through quantitative measurements by a spectrometer. Using the features of either thickness or chromaticity profiles across a slit Mura, a thickness difference from 21 nm to 41 nm of color filters can be differentiated accurately. Thus, the quality of color filters can be accessed in-line during the manufacturing process TFT-LCDs.

The TFT-LCD image has non-uniform brightness that is the major difficulty of finding the visible defect called Mura in the field. To facilitate Mura detection, background signal shading should level off and Mura signal must be amplified. In this paper, Mura signal amplification and background signal flattening method is proposed based on human visual system (HVS). The proposed DC normalized contrast sensitivity function (CSF) is used for the Mura signal amplification and polynomial regression (PR) is used to level off the background signal. In the enhanced image, tri-modal thresholding segmentation technique is used for finding Dark and White Mura at the same time. To select reliable defect, falsely detected invisible region is eliminated based on Weber's Law. By the experimental results of artificially generated 1-d signal and TFT-LCD image, proposed algorithm has novel enhancement results and can be applied to real automated inspection system.

A cross-coupled charge pump with internal pumping capacitor, which is advantageous from a point of minimizing TFT-LCD driver IC module, is newly proposed in this paper. By using NMOS and PMOS diodes connected to boosting nodes from VIN nodes, the pumping node is precharged to the same value at the pumping node in starting pumping. Since the first-stage charge pump is designed differently from the other stage pumps, a back current of pumped charge from charge pumping node to input stage is prevented. As a pumping clock driver is located in front of pumping capacitor, the driving capacity is improved by reducing a voltage drop of the pumping clock line from parasitic resistor. Finally, a layout area is decreased more compared with the conventional cross-coupled charge pump by using a stack-MIM capacitor. A proposed charge pump for TFT-LCD driver IC is designed with 0.13 µm triple-well DDI process, fabricated, and tested.

The thin film transistor liquid crystal display (TFT-LCD) image has nonuniform brightness, which is a major difficulty in finding the Mura defect region. To facilitate Mura segmentation, globally widely varying background signal must be flattened and then Mura signal must be enhanced. In this paper, Mura signal enhancement and background-signal-flattening methods using wavelet coefficient processing are proposed. The wavelet approximation coefficients are used for background-signal flattening, while wavelet detail coefficients are employed to magnify the Mura signal on the basis of an adapted contrast sensitivity function (CSF). Then, for the enhanced image, trimodal thresholding segmentation technique and a false-region elimination method based on the human visual system (HVS) are employed for reliable Mura segmentation. The experimental results show that the proposed algorithms produce promising results and can be applied to automated inspection systems for finding Muras in a TFT-LCD image.

We propose a filtering method for optimal estimation of TFT-LCD's surface region except defect's region. To estimate the non-uniform intensity variation on TFT-LCD surface region, the 4-directional Gaussian filter based on image pyramid structure is proposed. The experimental result verified the proposed method's performance

In this paper, a high-speed logic circuitry using bootstrapped and low-temperature polysilicon (LTPS) technologies for TFT-LCD panels is proposed. The new circuitry realizes high-speed operation owing to the application of a logic-swing voltage that is wider than the power-supply voltage using bootstrapped technology. As a result, the new logic circuitry can be operated at an operational frequency around 3-10 times higher than that of the conventional circuitry under the conditions of a 0.5 pF load capacitor at the output of a noninverting buffer and +10 V power-supply voltages. The new circuit is named "BST-TFT logic circuitry."

We present our recent results of the 10-bit data driver LSI for 42-inch diagonal TFT-LCD TV with full HD format. To develop data driver LSIs for a true 10-bit TFT-LCD TV with full HD (19201080) format, small chip area, low power consumption, and output uniformity between channels are key problems that must be solved. By applying a two-stage DAC which combines 8-bit resistor-string DAC and 2-bit binary weighted capacitor DAC, the area increase is limited to only 30% compared to the area of 8-bit resistor-string DAC. The output deviation between channels is successfully limited within 5 mV and the driver LSI with 414 outputs consumes the maximum total current of 16 mA when driving 42-inch HDTV panel. We confirmed that the picture with 10-bit shades of gray is much more natural than that with 8-bit shades of gray.

A novel multi-phase charge-sharing technique is proposed for the dot-inversion method to reduce AC power consumption of the TFT-LCD column driver without requiring any external capacitor for charge conservation. Simple and easy-to-control circuitry is applied in the proposed method, and the power saving efficiency depends on number of charge phases. Increasing the number of charge phases, the saving power efficiency is also raised. Excluding power dissipation of switches, the power saving efficiency is up to 75% theoretically with infinite phases. For previous work, the maximum power saving efficient is 50% without external capacitor. The HSPICE simulation results including power dissipation of all switches show that the proposed method with seven charge phases (eight-column lines as one group) decreases the power consumption of 23-68% and 10-18%, respectively, compared with original circuit (without any low-power scheme) and previous low-power charge-recycling works.

New positive and negative bias voltage generators for TFT-LCD's drivers utilizing charge pump circuits are introduced. The generators can generate positive or negative voltages with various amplitude by simply changing the number of pumping stages. By using the circuit simulation program HSPICE, it is demonstrated that the introduced generators can provide enough positive or negative voltages for TFT-LCD's drivers.

We proposed a new method to evaluate display legibility as a function of resolution. This method was able to evaluated display legibility without being restricted to the display resolution. Using this method, subjective psychological experiments were carried out to investigate display resolution, which provides legibility, in observing small characters. Samples viewed by subjects were images displayed on a high-resolution TFT-LCD that we developed, CRT images and printed documents for comparison. We have found that TFT-LCD legibility was much better than that of CRT, and that minimum resolution of about 175 dpi was needed for use in legible document viewers.

We have analyzed a displayed image of TFT-LCD three-dimensionally in case of low power drive using Multi-Field Driving Method (MFD). We have also proposed a concept of multi-media driving method using MFD in which a displayed image was divided into some interlaced subfield images and the number of interlaced subfields can be changed depending on the moving quantities of displayed images. This method made it possible not only to reduce a driving power consumption in case of still images to less than half, compared to that with conventional methods, but also to maintain high moving image quality.

This paper proposes a new duplication redundancy technology, 2 Transistors for 1.5 Gates, that is capable of automatic defect tolerance, so making large, high-resolution, color TFT-LCD panel fabrication both easy and economical. This redundancy technology with automatic defect tolerant capability has a low hardware overhead and is very capable of compensating for open circuit defects in a large active-matrix panel. This technology was confirmed by fabricating a 9.5-inch color TFT-LCD panel with 640480 pixels(960960 dots). This panel showed excellent display performance and produced pictures without defects. The yield improvement effect of this technology was also confirmed by calculation based on the Boltzmann statistics model. Consequently, this technology is clearly seen to have a yield improvement effect equal to defect density reduction of about one order, compared to non redundancy. This technology drastically reduces dot and line defects, enabling fabrication of large, high-resolution, color TFT-LCD panels at a relatively low cost.

We have proposed a concept of low power drive system for a multi-media TFT-LCD using MFD in which a displayed image is divided into some interlaced subfield images and the number of interlaced subfields can be changed depending on the moving quantities of displayed images. This method has been applied to a 9.5" TFT-LCD and successful operation has been confirmed without moving image degradation.