A quasi-periodic signal is a periodic signal with period and amplitude variations. Several physiological signals, including the electrocardiogram (ECG), can be treated as quasi-periodic. Vector quantization (VQ) is a valuable and universal tool for signal compression. However, compressing quasi-periodic signals using VQ presents several problems. First, a pre-trained codebook has little adaptation to signal variations, resulting in no quality control of reconstructed signals. Secondly, the periodicity of the signal causes data redundancy in the codebook, where many codevectors are highly correlated. These two problems are solved by the proposed codebook replenishment VQ (CRVQ) scheme based on a bar-shaped (BS) codebook structure. In the CRVQ, codevectors can be updated online according to signal variations, and the quality of reconstructed signals can be specified. With the BS codebook structure, the codebook redundancy is reduced significantly and great codebook storage space is saved; moreover variable-dimension (VD) codevectors can be used to minimize the coding bit rate subject to a distortion constraint. The theoretic rationale and implementation scheme of the VD-CRVQ is given. The ECG data from the MIT/BIH arrhythmic database are tested, and the result is substantially better than that of using other VQ compression methods.

Adaptive optimization of the notch bandwidth of a lattice-based adaptive infinite impulse response (IIR) notch filter is presented in this paper. The filter is used to improve the performance of a direct sequence spread spectrum (DSSS) binary phase shift keying (BPSK) communication system by suppressing a narrow-band interference at the receiver. A least mean square (LMS) algorithm used to adapt the notch bandwidth coefficient to its optimum value which corresponds to the maximum signal to noise ratio (SNR) improvement factor is derived. Bit error rate (BER) improvement gained by the DSSS communication system using the filter with the optimized notch bandwidth is also shown. Computer simulation results are compared with those obtained analytically to demonstrate the validity of theoretical predictions for various received signal parameters.

In this paper, we present an efficient VLSI architecture for the stand-alone application of a speech recognition system based on discriminative Bayesian neural network (DBNN). Regarding the recognition phase, the architecture of the Bayesian distance unit (BDU) is constructed first. In association with the BDU, we propose a template-serial architecture for the path distance accumulation to perform the recognition procedure. A corresponding architecture is also developed to accelerate the discriminative training procedure. It contains the intelligent look-up table for the sigmoid function. In comparison to the traditional one-table method, the memory size reduces drastically with only slight loss of accuracy. Combining the proposed hardware accelerators with the cost efficient programmable core, we took the most out of both programmable and application-specific architectures, including performance, design complexity, and flexibility.

It is widely known that the family of projection filters includes the generalized inverse filter, and that the family of parametric projection filters includes parametric generalized projection filters. However, relations between the family of parametric projection filters and constrained least squares filters are not sufficiently clarified. In this paper, we consider relations between parameter estimation and image restoration by these families. As a result, we show that the restored image by the family of parametric projection filters is a maximum penalized likelihood estimator, and that it agrees with the restored image by constrained least squares filter under some suitable conditions.

Problems concerning a phase-locked loop (PLL) fabricated by a deep-sub-micron process were investigated, and a high-speed self-calibration technique for tuning a voltage-controlled oscillator (VCO) frequency range automatically was developed. The self-calibration technique can measure VCO frequency in short time by comparing intervals between a PLL reference and a VCO output. Furthermore, a loop-filter bypassing method was also used to change the calibration frequency in short time. At 0.7 V and 200 MHz, the prototype PLL has a calibration time of 1.4 µs and a total settling time of 10 µs, which are adequate for microprocessor applications. Moreover, the PLL has a cycle-to-cycle jitter of 142 ps and a power consumption of 470 µW.

This letter addresses a neural network (NN)-based predictor for the LP (Linear Prediction) residual. A new NN predictor takes into consideration not only prediction error but also quantization effects. To increase robustness against the quantization noise of the nonlinear prediction residual, a constrained back propagation learning algorithm, which satisfies a Kuhn-Tucker inequality condition is proposed. Preliminary results indicate that the prediction gain of the proposed NN predictor was not seriously decreased even when the constrained optimization algorithm was employed.

A novel formulation for the Scalar-field approach of Integral Equation formulation of the Measured Equation of Invariance (SIE-MEI) is derived from the scalar reciprocity relation to solve the scalar Helmholtz equation. The basics of this formulation are similar to IE-MEI method for the electromagnetic (EM) problem. The surface integral equation is derived from reciprocity relation and on-surface MEI postulates are used. As a result it generates a sparse linear system with the same number of unknowns as of Boundary Element Method (BEM) and keeps the merits in minimum storage memory requirements and CPU time consumption for computing the final matrix. IE-MEI method has been proposed for two-dimensional (2D) electromagnetic problem, but three-dimensional (3D) problem is very difficult to be extend. This scalar-field approach of IE-MEI method is identical to electromagnetic in 2D, but easily extended to the 3D scalar-field scattering problem contrary to EM problem. The numerical results of sphere and cube are verified with some rigorous or numerical solutions, which give excellent agreement.

This letter proposes a packet length-based group-wise transmission (LGT) rate scheduling scheme for non-real time data service for the uplink of direct sequence code division multiple access (DS/CDMA) system using the burst switching scheme to support the integrated voice/data service. The LGT scheme optimally determines two different rate groups and their optimal data rates so as to minimize the average packet transmission delay. It has shown that the packet transmission delay performance can be significantly improved over the conventional single-rate packet transmission scheme for integrated voice/data service. Furthermore, a main feature of the proposed scheme is simplicity in its implementation.

This paper suggests that a watermarking technique based on the number theoretic transform (NTT) may effectively be employed for detecting alterations on lossless digital master images. Due to its fragility, the NTT-based technique is sensitive to detecting alterations, compared with that based on the discrete Fourier transform (DFT).

In this paper, we present new stability conditions for a class of large-scale hybrid dynamical systems composed of a number of interconnected hybrid subsystems. The stability conditions are given in terms of discontinuous Lyapunov functions of the stable hybrid subsystems. Furthermore, the stability conditions are represented by LMIs (Linear Matrix Inequalities) which are computationally tractable.

Pilot-aided adaptive prediction channel estimation is proposed for coherent detection in a frequency-nonselective fading channel. It is an extension of the conventional weighted multi-slot averaging (WMSA) channel estimation and consists of 3 steps. A block of Np pilot symbols is periodically transmitted, each pilot block being followed by Nd data symbols to form a data slot. In the first step, the instantaneous channel gain is estimated by coherent addition of Np pilot symbols. Using the K past and K future estimated instantaneous channel gains, the second step predicts the instantaneous channel gains at the end and beginning of data slot of interest by a forward predictor and a backward predictor, respectively. The tap-weights of forward prediction and backward prediction are adaptively updated using the normalized least mean square (NLMS) algorithm. Finally, in the third step, the instantaneous channel gain at each data symbol position within the data slot of interest is estimated by simple averaging or linear interpolation using the two adaptively predicted instantaneous channel gains. The computer simulation confirms that the proposed adaptive prediction channel estimation achieves better bit error rate (BER) performance than the conventional WMSA channel estimation in a fast fading channel and/or in the presence of frequency offset between a transmitter and a receiver.

A circuit that carries out an Hadamard transform of an input image using the pulse width modulation technique is proposed. The proposed circuit architecture realizes the function of an Hadamard transform with a full-size pixel image. A test chip that we designed and fabricated integrates 64 64 pixels in a 4.9 mm 4.9 mm area, with 0.35 µm CMOS technology. The functional operation and linearity of this chip are measured. An image processing application utilizing this chip is demonstrated.

A hierarchical timing adjuster that operates with intermittent adjustment has been developed for use in low-power DDR SDRAMs. Intermittent adjustment reduces power consumption in both coarse- and fine-delay circuits. Furthermore, the current-controlled fine-tuning of delay is free of short-circuit current and achieves a resolution of about 0.1 ns. In a design with 0.16-µm node technology, these techniques make the hierarchical timing adjuster able to reduce the operating current to 4.8 mA, which is 20% for the value in a conventional scheme with every-cycle measurement. The proposed timing adjuster achieves a three-cycle lock-in and only generates an internal clock pulse that has coarse resolution in the second cycle. The circuit operates over the range from 60 to 150 MHz, and occupies 0.29 mm2.

This paper presents a novel low-energy memory design technique based on variable analysis for on-chip data memory (RAM) in application-specific systems, which called VAbM technique. It targets the exploitation of both data locality and effective data width of variables to reduce energy consumed by data transfer and storage. Variables with higher access frequency and smaller effective data width are assigned into a smaller low-energy memory with fewer bit lines and word lines, placed closer the processor. Under constraints of the number of memory banks, VAbM technique use variable analysis results to perform allocating and assigning on-chip RAM into multiple banks, which have different size with different number of word lines and different number of bit lines tailored to each application requirements. Experimental results with several real embedded applications demonstrate significant energy reduction up to 64.8% over monolithic memory, and 27.7% compared to memory designed by memory banking technique.

MOSFETs can be used as capacitors, but its capacitance can vary by 5 to 7 times as its terminal voltage varies. To reduce the voltage dependence of the capacitance, this paper proposed two types of devices: one is called accumulation MOSFET (AMOS) and the other is formed by two conventional PMOS connected in anti-parallel. These two devices are readily available in the standard digital CMOS processes. The proposed capacitors were implemented in three different CMOS processes. The measured results show that the capacitances of both devices have less voltage dependence than a single PMOS. The voltage dependence of the AMOS capacitance can be as small as 17%. The minimum capacitance per unit area of the AMOS is 1.8 times that of the double-poly capacitor in an analog/mixed-mode CMOS process. To verify the usefulness of these two types of capacitors, they are used as compensation capacitors in a conventional two-stage amplifier. The measured results show that the amplifier compensated by the AMOS capacitor has little variation (6%) of the unity-gain frequency over the input common-mode range. Due to its smaller die area and cheaper digital process, AMOS can be used as compensation capacitor without resorting to more expensive analog process.

This paper proposes a multi-hop wireless link system for radio access networks (RANs) of new generation mobile communication systems. The performance of the multi-hop wireless link system is evaluated from the viewpoints of total output power, co-frequency interference characteristics, and the system frequency bandwidth based on a comparison with that of the single-hop wireless link system, which is currently used as a RAN. The proposed system is effective in realizing an enormous approach link capacity from both the total output power and the co-frequency interference viewpoints. From the system frequency bandwidth viewpoint, the optimum number of relays in the multi-hop connection is determined to be three hops in a line-of-sight propagation environment in order to minimize the frequency bandwidth for transferring traffic. We conclude that the multi-hop wireless link system is suitable for new generation mobile communication systems.

In an orthogonal frequency division multiplexing (OFDM) system, the bit error performance is degraded in the presence of multiple propagation paths whose excess delays are longer than the Guard Interval (GI), because the orthogonality between subcarriers cannot be maintained. Therefore, the GI has to be long enough for an expected delay spread of the channel. On the other hand, a long GI causes a decrease in transmission efficiency. In this paper, we propose a new OFDM demodulation method with a variable effective symbol duration, in order to improve the bit error performance in the presence of multipaths whose excess delays are longer than the GI. The proposed method can realize more stable radio communication systems under a multipath propagation environment even if a propagation path whose excess delay is longer than the GI exists. In other words, the proposed method can improve transmission efficiency without performance degradation by a shortened GI under the same environment. The principle of the proposed method is explained, and the bit error probability of the proposed method is analyzed theoretically in an AWGN channel and a multipath fading channel. The performance of the proposed method is then evaluated by computer simulation. The results show that the proposed method improves the system availability under more various multipath fading environments without changing the system parameters.

In this paper, we propose topic extraction models based on statistical relevance scores between topic words and words in articles, and report results obtained in topic extraction experiments using continuous speech recognition for Japanese broadcast news utterances. We attempt to represent a topic of news speech using a combination of multiple topic words, which are important words in the news article or words relevant to the news. We assume a topic of news is represented by a combination of words. We statistically model mapping from words in an article to topic words. Using the mapping, the topic extraction model can extract topic words even if they do not appear in the article. We train a topic extraction model capable of computing the degree of relevance between a topic word and a word in an article by using newspaper text covering a five-year period. The degree of relevance between those words is calculated based on measures such as mutual information or the χ2-method. In experiments extracting five topic words using a χ2-based model, we achieve 72% precision and 12% recall for speech recognition results. Speech recognition results generally include a number of recognition errors, which degrades topic extraction performance. To avoid this, we employ N-best candidates and likelihood given by acoustic and language models. In experiments, we find that extracting five topic words using N-best candidate and likelihood values achieves significantly improved precision.

In this semi-tutorial paper, the reliability-based decoding approaches using the reprocessing of the most reliable information set are investigated. This paper somehow homogenizes and compares former different studies, hopefully improving the overall transparency, and completing each one with tricks provided by the others. A couple of sensible improvements are also suggested. However, the main goal remains to integrate and compare recent works based on a similar general approach, which have unfortunately been performed in parallel without much efforts of comparison up to now. Their respective (dis)advantages, especially in terms of average or maximum complexity are elaborated. We focus on suboptimum decoding while some works to which we refer were developed for maximum likelihood decoding (MLD). No quantitative error performance analysis is provided, although we are in a position to benefit from some qualitative considerations, and to compare different strategies in terms of higher or lower expected error performances for a same complexity. With simulations, however, it turns out that all considered approaches perform very closely to each other, which was not especially obvious at first sight. The simplest strategy proves also the fastest in terms of CPU-time, but we indicate ways to implement the other ones so that they get very close to each other from this point of view also. On top of relying on the same intuitive principle, the studied algorithms are thus also unified from the point of view of their error performances and computational cost.

A new blocking artifact reduction algorithm is proposed that uses block classification and feedforward neural network filters in the spatial domain. At first, the existence of blocking artifact is determined using statistical characteristics of neighborhood block, which is then used to classify the block boundaries into one of four classes. Thereafter, adaptive inter-block filtering is only performed in two classes of block boundaries that include blocking artifact. That is, in smooth regions with blocking artifact, a two-layer feedforward neural network filters trained by an error back-propagation algorithm is used, while in complex regions with blocking artifact, a linear interpolation method is used to preserve the image details. Experimental results show that the proposed algorithm produces better results than the conventional algorithms.