Recently, ABR has been attracting attention as a new service category of ATM, and the methodology to realize ABR is being actively discussed in the ATM Forum. ABR is expected to become a suitable class for supporting LAN services on ATM networks. To this end, a technical foundation must be established in which bandwidth is effectively utilized and quality is guaranteed. In order for ABR to use a portion of the bandwidth that is not used by high-priority classes (CBR, VBR), it is necessary to appropriately estimate the unused portion of the bandwidth. Due to the fact that the unused portion of the bandwidth in ATM networks fluctuates, such fluctuations must be taken into account. This paper describes ABR connection admission control and design of the congestion detecting point in an ABR buffer using Allan variance of the unused portion of the bandwidth.

A novel method of multichannel surface EMG processing has been developed to compensate for the distortion in bipolar surface EMG signals due to the movement of innervation zones. The distortion of bipolar surface EMG signals was mathematically described as a filtering function. A compensating technique for such distorted bipolar surface EMG signals was developed for the brachial biceps during dynamic contractions in which the muscle length and tension change. The technique is based on multichannel surface EMG measurement, a method for estimating the movement of an innervation zone, and the inverse filtering technique. As a result, the distorted EMG signals were compensated and transformed into nearly identical waveforms, independent of the movement of the innervation zone.

An ordered binary decision diagram (OBDD) is a directed acyclic graph for representing a Boolean function. OBDDs are widely used in various areas which require Boolean function manipulation, since they can represent efficiently many practical Boolean functions and have other desirable properties. However, there is very little theoretical research on the complexity of constructing an OBDD. In this paper, we prove that the optimal variable ordering problem of a shared BDD is NP-complete, and briefly discuss the approximation hardness of this problem and related OBDD problems.

Recently, a number of concurrency control algorithms have been proposed for multidatabase system (MDBS) concurrency control methods (CCMs) and the most challenging issue of them has been a concern about how to ensure global serializability (GSR). In this paper, we examine two concurrency control algorithms of MDBS through simulation approach: optimistic ticket method (OTM) and global ticket method (GTM). In historical note, OTM is known to be the first practical solution, since this approach ensures GSR by way of automatically resolving indirect conflicts among global transactions without making any restrictions on local CCMs. However, OTM is expected to yield poor performance since it enforces all global transactions to take a local ticket which causes direct conflicts between them. In GTM, the global transaction manager in an MDBS assigns a global ticket to global transactions rather than accessing a local ticket as in OTM. Our experimental results showed that GTM outperforms OTM in cases that short timeout values are given. However, in case that the timeout value relatively becomes long, our results demonstrated that OTM outperforms GTM.

In anonymous survey, statistical information by attributes of respondents -such as his gender, age or adress-plays an important role in the interpretation of data. However, giving away all his attributes may cause privacy problem. That is, gathering many attributes may help identifying specifically who responded to the anonymous survey. In this paper, we propose a protocol executed among several `entities in charge' in order to compute statistical information for surveys. The advantage of adopting this protocol is that it does not release extra information of attributes on calculating statistical results. We can show that this protocol is a secure computation in the sense of Micali-Rogaway if played by semi-honest entities. We furthurly give a protocol with zero-knowledge proofs to ensure that the entities are indeed semi-honest.

This paper concerns multiple-valued logical function realized by asynchronous circuit that may have feed-back loops and its completeness problems. The first aim is to give mathematical definition of an asynchronous circuit over multiple-valued logical functions and of the realization of multiple-valued logical function by means of an asynchronous circuit. For asynchronous element, the definition of circuit construction and initialization are very sensitive. A slight modification may have a considerable influence on the completeness. We consider three types of completeness (LF-, GS-, NS-completeness) for a set of multiple-valued logical functions. The LF-completeness means completeness of logical functions realized loop-free cirucit. The GS-completeness means completeness under general initialization assumption. The NS-completeness measn completeness under initialization by input assumption. The second aim is to give a completeness criterion for each type of completeness. This aim is realized for LF-completeness in general case and GS-completeness in ternary case. A completeness criteria for GS-completeness and NS-completeness are given under strong conditions.

A program slice is a set of program statements that directly or indirectly contribute to the values assumed by a set of variables at some program execution point. A few slicing algorithms have proposed to far but none of them are considered from the viewpoint of program modification. In this paper, we define a variable dependence graph (VDG) and show a new slicing algorithm on VDG. We also compare the time complexity of the algorithm with that of other existing algorithms and discuss the suitableness of our algorithm for program modification. As the result of this, we argue our algorithm is suitable for embedding debugging systems.

It is known that an anticausal IIR filter can be realized in real time by using the time reversed section technique. When combined with a casual IIR filter, the overall transfer function can yield exact linear phase characteristic in theory. This paper presents a new method for designing complex IIR digital filters with exact linear phase. The design problem of IIR filters with exact linear phase can be reduced to magnitude-only filter design. The proposed procedure is based on the formulation of an eigenvalue problem by using Remez exchange algorithm. By solving the eigenvalue problem to compute the real maximum eigenvalue, the solution of the rational interpolation problem can be achieved. Therefore, the optimal filter coefficients are easily obtained through a few iterations. The proposed design algorithm not only retains the speed inherent in Remez exchange algorithm, but also Simplifies the interpolation step because is has been reduced to the computation of the real maximum eigenvalue. Several examples are presented to demonstrate the effectiveness of the proposed method.

This paper investigates Available Bit Rate (ABR) traffic control based on the Explicit Forward Congestion Indication (EFCI). A flow control mechanism is specified for ABR service to control the source rate. Resource Management (RM) cells are used to convey feedback. A source sends a forward RM cell for at least every N cells sent. At the destination, a forward RM cell turns around as a backward RM cell and returns to the source. A data cell has EFCI-bit in its header field. A network element sets EFCI-bit if it is congested. A destination indicates congestion status of networks by using RM cells based on the value of the EFCI-bit of the data cells. A one-bit feedback scheme is used by the ATM Forum. However, indication schemes have also been proposed which use explicit indication of source rate based both on values of the EFCI-bit of data cells and on other information contained in a forward RM cell. We evaluated explicit indication schemes as well as a one-bit scheme by simulation. Simulation study showed explicit cell rate indication gives superior performance than one-bit indication especially for long round trip distances. In this paper, we report the results with brief discussion.

A fast and stable algorithm for locating a desired eigenvalue and its corresponding eigenvector is presented. Its effectiveness is shown through a numerical simulation. The proposed algorithm is fast and numerically accurate enough to be applied to a real application.

In order to reduce the ever increasing cost for ULSI manufacturing due to the complexity of integrated circuits, dramatic simplification in the logic LSI architecture as well as the very flexible circuit configuration have been achieved using a highfunctionality device neuron-MOSFET (γMOS).In γMOS logic circuits, however, computations based on the multiple-valued logic is the key for enhancing the functionality. Therefore, much higher accuracy of processing is required. After brief description of the operational principle of γMOS logic, the relationship between the number of multiple logic levels and the functionality enhancement is discussed for further enhancing the functionality of γMOS logic circuits by increasing the number of multiple logic levels, and the accuracy requirements for the manufacturing processes are studied. The order of a few percent accuracy is required for all principal device structural parameters when it is aimed to handle 50-level multiple-valued variable in the γMOS logic circuit.

A new anti-static technology to neutralize static electricity by high energy photon irradiation has been developed. Ions and electrons required for neutralization are generated by ionization of gas molecules in the vicinity of a charged substance. Gas molecules absorbs photons to become ionized. The wavelength chosen for the irradiation depends on the neutralization atmosphere. Soft X-rays with wavelength over about 1 are effective in air or O2 gas at pressure higher than several hundreds Torr. Vacuum UV-rays with wavelength below about 1350 is effective in N2 gas, Ar gas, or reduced pressure ambients. These methods feature excellent neutralization capa-bility. Electrostatic potential can be reduced to 0 V in a very short time without encountering the problems of which conven-tional corona discharge ionizers.

This paper describes a variable multi-level QAM modem applied to a wireless ATM transport network with the aim of effectively offering ATM network services over a terrestrial digital radio system. The concept of the wireless ATM transport network based on a Virtual Path (VP) capacity control system which optimizes both the number of channels and the multi-level QAM scheme for existing traffic variation is discussed. To achieve a hitless switch as a technical requirement of this network, we propose a modem configuration and a modulation scheme control (MSC) signal transmission. In this modem configuration, a multi-level control logic circuit in the modulator is used as the signal formatter. A modulated signal for the modulation scheme is maintained at a constant average power. Decision data and error signal selection for the received signal is carried out in the multi-level control logic circuit in the demodulator. The fluctuation of the demodulator loops due to modulation scheme switch can be reduced by using a fully digitized AGC loop and by converting the received signal to the condition of decision level constant. The MSC signal inserted into the first path data signal is transmitted without error by arranging the maximum amplitude of the signal point set. In this way, switching between the modulator and the demodulator is possible frame by frame. Finally, we present experimental results for a variable multi-level QAM modem employing four modulation schemes: QPSK, 16 QAM, 64 QAM, and 256 QAM. Through experiments, we prove that the modulation scheme is switched without fluctuation of the demodulator control loops by maintaining the signal condition of the decision level constant. The achievement of a hitless switch for multi-level QAM is also confirmed by experiments.

This paper presents a method of employing a priority scheme in a random access environment. A prioritized nonblocked stack collision resolution algorithm with binary feedback is developed and tested using simulations. The algorithm accommodates an n-level priority scheme which makes it attractive in mobile data systems. The effectiveness of the algorithm is described on its ability to first, reject the lowest priority class when the system load is near or on the maximum value and second, minimize the delay spread of the higher class users. The performance of the algorithm is characterized using the throughput/delay and cumulative delay for each class of users.

This paper proposed a method of slot allocation in a multislot TDMA system when multiple service priorities are supported. The algorithm is tested both in Variable Rate Reservation Access (VRRA) and Advanced TDMA protocols. We exploit the multislot reservation capability to achieve the delay requirements of each priority level. The channel allocation algorithm assumed that all data terminals are capable of multislot reservation. In this case the delay variance can be controlled based on the packet length information and the accumulated delay of each data user. The performance of the system is evaluated using the cumulative delay distribution and mean overall delays for the different user types.

We propose a partitioned-bus architecture with a variable-width-bus scheme to reduce power consumption in bus lines in VLSIs. The partitioned-bus architecture (horizontal partitioning) restricts bus driving range to minimal, while the variable-width-bus scheme (vertical partitioning) uses additional tag lines so as to automatically indicate effective bus width with-out driving unnecessary bus lines depending on data to be transferred. Applying this method to a general purpose microprocessor, we demonstrate 30% and 35% power consumption reduction in bus lines, respectively for the partitioned-bus architecture and the variable-width-bus scheme, compared with the conventional bus architecture. Combining the both together, we show about 55% power consumption reduction in bus lines for typical applications. Increase in chip area for this architecture is about 30% compared with the conventional bus architecture.

This paper describes Kleenean coefficients that are a subset of Kleenean functions for use in representing multiple-valued logic functions. A conventional multiple-valued sum-of-products expression uses product terms that are the MIN of literals and constants. In this paper, a new sum-of-products expression is allowed to sum product terms that also include variables and complements of variables. Since the conventional sum-of-products expression is complete, so also is the augmented one. A minimization method of the new expression is described besed on the binary Quine-McCluskey algorithm. The result of computer simulation shows that a saving of the number of implicants used in minimal expressions by approximately 9% on the average can be obtained for some random functions. A result for some arithmetic functions shows that the minimal solutions of MOD radix SUM, MAX and MIN functions require much fewer implicants than those of the standard sum-of-products expressions. Thus, this paper clarifies that the new expression has an advantage to reduce the number of implicants in minimal sum-of-products expressions.

The realization of scientific manufacturing of ULSIs in the 21st century will require the development of a technical infrastructure of "Ultra Clean Technology" and the firm establishment of the three principles of high performance processes. Three principles are 1)Ultra Clean Si Wafer Surface, 2)Ultra Clean Processing Environment, and 3)Perfect Parameter controlled process. This paper describes the methods of resolving the problems inherent in Ultra Clean Technology, taking as examples issues in quarter-micron or more advanced semiconductor process and manufacturing equipment, particularly when faced with the challenges of plasma dry etching. Issues indispensable to the development of tomorrow's highly accurate and reliable plasma dry etching equipment are the development of technologies for the accurate measurement of plasma parameters, ultra clean gas delivery systems, chamber cleaning technology on an in-situ basis, and simulating the plasma chemistry.This paper also discusses the standardization of semiconductor manufacturing equipment, which is considered one of the ways to reduce the steep rise in production line construction costs. The establishment of Ultra Clean Technology also plays a vital role in this regard.

An ATM network design algorithm is treated as a resource allocation problem. As an effective way to facilitate a coexistence of traffic with its diverse characteristics and different quality of service (QOS) requirements in ATM networks, a virtual path (VP) concept has been proposed. In attempting to design the VP (Virtual Path)-based ATM network, it requires to consider a network topology and traffic pattern generated from users for minimizing a network construction cost while satisfying QOS requirements such as cell / call loss probabilities and cell delay times. In this paper, we propose a new heuristic design algorithm for the VP-based ATM network under QOS constraints. A minimum bandwidth required to transfer a given amount of traffic is first obtained by utilizing an equivalent bandwidth method. After all the routes of VPs are temporarily established by means of the shortest paths, we try to minimize the network cost through the alternation of VP route, the separation of a single VP into several VPs, and the introduction of VCX nodes. To evaluate our design algorithm, we consider two kinds of traffic; voice traffic as low speed service and still picture traffic as high speed service. Through numerical examples, we demonstrate that our design method can achieve an efficient use of network resources, which results in the cost-effective VP-based ATM network.

In this paper, we formulate and solve a discrete-time queueing problem that has two potential applications: ATM multiplexers and DQDB networks. We first consider the modeling of an ATM multiplexer. The object of the analysis is a periodic traffic stream (CBR traffic), which is one of the inputs to the multiplexer. As in previous works of the subject, we consider a memoryless background traffic input. Here, in addition to this background traffic, we take into account the influence of a high-priority traffic, which is time-correlated and requires expedited service. We analyze the influence of these two types of traffic on the statistics of the interdeparture time (jitter process) and the delay of the periodic traffic stream. We obtain their distributions in a form of z-transforms, and from these we derive closed form expressions for the average delay and the variance of the interdeparture time. Our results show that the delay and jitter are very sensitive to the burstiness of the high priority traffic arrival process. We next apply our analytical modeling to a DQDB network when some of its stations are driven by CBR sources. We can obtain interesting results concerning the influence of the physical location of a DQDB station on the jitter.