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  • Temporally Forward Nonlinear Scale Space for High Frame Rate and Ultra-Low Delay A-KAZE Matching System

    Songlin DU  Yuan LI  Takeshi IKENAGA  

     
    PAPER

      Pubricized:
    2020/03/06
      Vol:
    E103-D No:6
      Page(s):
    1226-1235

    High frame rate and ultra-low delay are the most essential requirements for building excellent human-machine-interaction systems. As a state-of-the-art local keypoint detection and feature extraction algorithm, A-KAZE shows high accuracy and robustness. Nonlinear scale space is one of the most important modules in A-KAZE, but it not only has at least one frame delay and but also is not hardware friendly. This paper proposes a hardware oriented nonlinear scale space for high frame rate and ultra-low delay A-KAZE matching system. In the proposed matching system, one part of nonlinear scale space is temporally forward and calculated in the previous frame (proposal #1), so that the processing delay is reduced to be less than 1 ms. To improve the matching accuracy affected by proposal #1, pre-adjustment of nonlinear scale (proposal #2) is proposed. Previous two frames are used to do motion estimation to predict the motion vector between previous frame and current frame. For further improvement of matching accuracy, pixel-level pre-adjustment (proposal #3) is proposed. The pre-adjustment changes from block-level to pixel-level, each pixel is assigned an unique motion vector. Experimental results prove that the proposed matching system shows average matching accuracy higher than 95% which is 5.88% higher than the existing high frame rate and ultra-low delay matching system. As for hardware performance, the proposed matching system processes VGA videos (640×480 pixels/frame) at the speed of 784 frame/second (fps) with a delay of 0.978 ms/frame.

  • Extended Inter-Device Digital Rights Sharing and Transfer Based on Device-Owner Equality Verification Using Homomorphic Encryption

    Yoshihiko OMORI  Takao YAMASHITA  

     
    PAPER-Information Network

      Pubricized:
    2020/03/13
      Vol:
    E103-D No:6
      Page(s):
    1339-1354

    In this paper, we propose homomorphic encryption based device owner equality verification (HE-DOEV), a new method to verify whether the owners of two devices are the same. The proposed method is expected to be used for credential sharing among devices owned by the same user. Credential sharing is essential to improve the usability of devices with hardware-assisted trusted environments, such as a secure element (SE) and a trusted execution environment (TEE), for securely storing credentials such as private keys. In the HE-DOEV method, we assume that the owner of every device is associated with a public key infrastructure (PKI) certificate issued by an identity provider (IdP), where a PKI certificate is used to authenticate the owner of a device. In the HE-DOEV method, device owner equality is collaboratively verified by user devices and IdPs that issue PKI certificates to them. The HE-DOEV method verifies device owner equality under the condition where multiple IdPs can issue PKI certificates to user devices. In addition, it can verify the equality of device owners without disclosing to others any privacy-related information such as personally identifiable information and long-lived identifiers managed by an entity. The disclosure of privacy-related information is eliminated by using homomorphic encryption. We evaluated the processing performance of a server needed for an IdP in the HE-DOEV method. The evaluation showed that the HE-DOEV method can provide a DOEV service for 100 million users by using a small-scale system in terms of the number of servers.

  • Bee Colony Algorithm Optimization Based on Link Cost for Routing and Wavelength Assignment in Satellite Optical Networks Open Access

    Yeqi LIU  Qi ZHANG  Xiangjun XIN  Qinghua TIAN  Ying TAO  Naijin LIU  Kai LV  

     
    PAPER-Internet

      Pubricized:
    2019/12/18
      Vol:
    E103-B No:6
      Page(s):
    690-702

    Rapid development of modern communications has initiated essential requirements for providing efficient algorithms that can solve the routing and wavelength assignment (RWA) problem in satellite optical networks. In this paper, the bee colony algorithm optimization based on link cost for RWA (BCO-LCRWA) is tailored for satellite networks composed of intersatellite laser links. In BCO-LCRWA, a cost model of intersatellite laser links is established based on metrics of network transmission performance namely delay and wavelengths utilization, with constraints of Doppler wavelength drift, transmission delay, wavelength consistency and continuity. Specifically, the fitness function of bee colony exploited in the proposed algorithm takes wavelength resources utilization and communication hops into account to implement effective utilization of wavelengths, to avoid unnecessary over-detouring and ensure bit error rate (BER) performance of the system. The simulation results corroborate the improved performance of the proposed algorithm compared with the existing alternatives.

  • Post-Packaging Simulation Based on MOSFET Characteristics Variations Due to Resin-Molded Encapsulation Open Access

    Naohiro UEDA  Hirobumi WATANABE  

     
    PAPER-Ultrasonic Electronics

      Pubricized:
    2020/01/14
      Vol:
    E103-C No:6
      Page(s):
    317-323

    A method for estimating circuit performance variation caused by packaging-induced mechanical stress is proposed. The developed method is based on the stress distribution chart for the target integrated circuit (IC) and the stress sensitivity characteristics of individual devices. This information is experimentally obtained using a specially designed test chip and a cantilever bending calibration system. A post-packaging analysis and simulation tool, called Stress Netlist Generator (SNG), is developed for conducting the proposed method. Based on the stress distribution chart and the stress sensitivity characteristics, SNG modifies the SPICE model parameters in the target netlist according to the impact of the packaging-induced stress. The netlist generated by SNG is used to estimate packaging-induced performance variation with high accuracy. The developed method is remarkably effective even for small-scale ICs with chip sizes of roughly 1 mm2, such as power management ICs, which require higher precision.

  • Ridge-Adding Homotopy Approach for l1-norm Minimization Problems

    Haoran LI  Binyu WANG  Jisheng DAI  Tianhong PAN  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2020/03/10
      Vol:
    E103-D No:6
      Page(s):
    1380-1387

    Homotopy algorithm provides a very powerful approach to select the best regularization term for the l1-norm minimization problem, but it is lack of provision for handling singularities. The singularity problem might be frequently encountered in practical implementations if the measurement matrix contains duplicate columns, approximate columns or columns with linear dependent in kernel space. The existing method for handling Homotopy singularities introduces a high-dimensional random ridge term into the measurement matrix, which has at least two shortcomings: 1) it is very difficult to choose a proper ridge term that applies to several different measurement matrices; and 2) the high-dimensional ridge term may accumulatively degrade the recovery performance for large-scale applications. To get around these shortcomings, a modified ridge-adding method is proposed to deal with the singularity problem, which introduces a low-dimensional random ridge vector into the l1-norm minimization problem directly. Our method provides a much simpler implementation, and it can alleviate the degradation caused by the ridge term because the dimension of ridge term in the proposed method is much smaller than the original one. Moreover, the proposed method can be further extended to handle the SVMpath initialization singularities. Theoretical analysis and experimental results validate the performance of the proposed method.

  • Massive MIMO Antenna Arrangement Considering Spatial Efficiency and Correlation between Antennas in Mobile Communications

    Kiyoaki ITOI  Masanao SASAKI  Hiroaki NAKABAYASHI  

     
    PAPER-Antennas and Propagation

      Pubricized:
    2019/11/12
      Vol:
    E103-B No:5
      Page(s):
    570-581

    This paper presents an algorithm to arrange a large number of antenna elements in the limited space of massive MIMO base station antenna without degrading the communication quality under a street-cell line-of-sight environment in mobile communications. The proposed algorithm works by using mathematical optimization in which the objective function is the correlation coefficient between the channel responses of two elements of the base station antenna, according to an algorithm constructed based on the results obtained through basic examinations of the characteristics of the correlation coefficient between channel responses. The channel responses are computed by using the propagation path information obtained by ray-tracing. The arrangements output by the proposed algorithm are mainly evaluated by channel capacity comparison with uniformly spaced arrangements on the vertical plane in single user and multiuser environments. The evaluation results of these arrangements in downlink demonstrate the superiority of the arrangements generated by the proposed algorithm, especially in term of robustness against an increase in the number of users.

  • Optimization Problems for Consecutive-k-out-of-n:G Systems

    Lei ZHOU  Hisashi YAMAMOTO  Taishin NAKAMURA  Xiao XIAO  

     
    PAPER-Reliability, Maintainability and Safety Analysis

      Vol:
    E103-A No:5
      Page(s):
    741-748

    A consecutive-k-out-of-n:G system consists of n components which are arranged in a line and the system works if and only if at least k consecutive components work. This paper discusses the optimization problems for a consecutive-k-out-of-n:G system. We first focus on the optimal number of components at the system design phase. Then, we focus on the optimal replacement time at the system operation phase by considering a preventive replacement, which the system is replaced at the planned time or the time of system failure which occurs first. The expected cost rates of two optimization problems are considered as objective functions to be minimized. Finally, we give study cases for the proposed optimization problems and evaluate the feasibility of the policies.

  • Enhanced Secure Transmission for Indoor Visible Light Communications

    Sheng-Hong LIN  Jin-Yuan WANG  Ying XU  Jianxin DAI  

     
    LETTER-Information Network

      Pubricized:
    2020/02/25
      Vol:
    E103-D No:5
      Page(s):
    1181-1184

    This letter investigates the secure transmission improvement scheme for indoor visible light communications (VLC) by using the protected zone. Firstly, the system model is established. For the input signal, the non-negativity and the dimmable average optical intensity constraint are considered. Based on the system model, the secrecy capacity for VLC without considering the protected zone is obtained. After that, the protected zone is determined, and the construction of the protected zone is also provided. Finally, the secrecy capacity for VLC with the protected zone is derived. Numerical results show that the secure performance of VLC improves dramatically by employing the protected zone.

  • Insertion/Deletion/Substitution Error Correction by a Modified Successive Cancellation Decoding of Polar Code Open Access

    Hikari KOREMURA  Haruhiko KANEKO  

     
    PAPER-Coding Theory

      Vol:
    E103-A No:4
      Page(s):
    695-703

    This paper presents a successive cancellation (SC) decoding of polar codes modified for insertion/deletion/substitution (IDS) error channels, in which insertions and deletions are described by drift values. The recursive calculation of the original SC decoding is modified to include the drift values as stochastic variables. The computational complexity of the modified SC decoding is O (D3) with respect to the maximum drift value D, and O (N log N) with respect to the code length N. The symmetric capacity of polar bit channel is estimated by computer simulations, and frozen bits are determined according to the estimated symmetric capacity. Simulation results show that the decoded error rate of polar code with the modified SC list decoding is lower than that of existing IDS error correction codes, such as marker-based code and spatially-coupled code.

  • A New Closed-Form Algorithm for Spatial Three-Dimensional Localization with Multiple One-Dimensional Uniform Linear Arrays

    Yifan WEI  Wanchun LI  Yuning GUO  Hongshu LIAO  

     
    LETTER-Digital Signal Processing

      Vol:
    E103-A No:4
      Page(s):
    704-709

    This paper presents a three-dimensional (3D) spatial localization algorithm by using multiple one-dimensional uniform linear arrays (ULA). We first discuss geometric features of the angle-of-arrival (AOA) measurements of the array and present the corresponding principle of spatial cone angle intersection positioning with an angular measurement model. Then, we propose a new positioning method with an analytic study on the geometric dilution of precision (GDOP) of target location in different cases. The results of simulation show that the estimation accuracy of this method can attain the Cramér-Rao Bound (CRB) under low measurement noise.

  • System Design for Traveling Maintenance in Wide-Area Telecommunication Networks

    Kouji HIRATA  Hiroshi YAMAMOTO  Shohei KAMAMURA  Toshiyuki OKA  Yoshihiko UEMATSU  Hideki MAEDA  Miki YAMAMOTO  

     
    PAPER

      Pubricized:
    2019/10/25
      Vol:
    E103-B No:4
      Page(s):
    363-374

    This paper proposes a traveling maintenance method based on the resource pool concept, as a new network maintenance model. For failure recovery, the proposed method utilizes permissible time that is ensured by shared resource pools. In the proposed method, even if a failure occurs in a communication facility, maintenance staff wait for occurrence of successive failures in other communication facilities during the permissible time instead of immediately tackling the failure. Then, the maintenance staff successively visit the communication facilities that have faulty devices and collectively repair them. Therefore, the proposed method can reduce the amount of time that the maintenance staff take for fault recovery. Furthermore, this paper provides a system design that optimizes the proposed traveling maintenance according to system requirements determined by the design philosophy of telecommunication networks. Through simulation experiments, we show the effectiveness of the proposed method.

  • Service Chain Construction Algorithm for Maximizing Total Data Throughput in Resource-Constrained NFV Environments

    Daisuke AMAYA  Shunsuke HOMMA  Takuji TACHIBANA  

     
    PAPER

      Pubricized:
    2019/10/08
      Vol:
    E103-B No:4
      Page(s):
    335-346

    In resource-constrained network function virtualization (NFV) environments, it is expected that data throughput for service chains is maintained by using virtual network functions (VNFs) effectively. In this paper, we formulate an optimization problem for maximizing the total data throughput in resource-constrained NFV environments. Moreover, based on our formulated optimization problem, we propose a heuristic service chain construction algorithm for maximizing the total data throughput. This algorithm also determines the placement of VNFs, the amount of resources for each VNF, and the transmission route for each service chain. It is expected that the heuristic algorithm can construct service chains more quickly than the meta-heuristic algorithm. We evaluate the performance of the proposed methods with simulations, and we investigate the effectiveness of our proposed heuristic algorithm through a performance comparison. Numerical examples show that our proposed methods can construct service chains so as to maximize the total data throughput regardless of the number of service chains, the amount of traffic, and network topologies.

  • Reducing Dense Virtual Networks for Fast Embedding Open Access

    Toru MANO  Takeru INOUE  Kimihiro MIZUTANI  Osamu AKASHI  

     
    PAPER

      Pubricized:
    2019/10/25
      Vol:
    E103-B No:4
      Page(s):
    347-362

    Virtual network embedding has been intensively studied for a decade. The time complexity of most conventional methods has been reduced to the cube of the number of links. Since customers are likely to request a dense virtual network that connects every node pair directly (|E|=O(|V|2)) based on a traffic matrix, the time complexity is actually O(|E|3=|V|6). If we were allowed to reduce this dense network to a sparse one before embedding, the time complexity could be decreased to O(|V|3); the time saving would be of the order of a million times for |V|=100. The network reduction, however, combines several virtual links into a broader link, which makes the embedding cost (solution quality) much worse. This paper analytically and empirically investigates the trade-off between the embedding time and cost for the virtual network reduction. We define two simple reduction operations and analyze them with several interesting theorems. The analysis indicates that an exponential drop in embedding time can be achieved with a linear increase in embedding cost. A rigorous numerical evaluation justifies the desirability of the trade-off.

  • Stronger Hardness Results on the Computational Complexity of Picross 3D

    Kei KIMURA  

     
    PAPER-Algorithms and Data Structures

      Vol:
    E103-A No:4
      Page(s):
    668-676

    Picross 3D is a popular single-player puzzle video game for the Nintendo DS. It presents a rectangular parallelepiped (i.e., rectangular box) made of unit cubes, some of which must be removed to construct an object in three dimensions. Each row or column has at most one integer on it, and the integer indicates how many cubes in the corresponding 1D slice remain when the object is complete. Kusano et al. showed that Picross 3D is NP-complete and Kimura et al. showed that the counting version, the another solution problem, and the fewest clues problem of Picross 3D are #P-complete, NP-complete, and Σ2P-complete, respectively, where those results are shown for the restricted input that the rectangular parallelepiped is of height four. On the other hand, Igarashi showed that Picross 3D is NP-complete even if the height of the input rectangular parallelepiped is one. Extending the result by Igarashi, we in this paper show that the counting version, the another solution problem, and the fewest clues problem of Picross 3D are #P-complete, NP-complete, and Σ2P-complete, respectively, even if the height of the input rectangular parallelepiped is one. Since the height of the rectangular parallelepiped of any instance of Picross 3D is at least one, our hardness results are best in terms of height.

  • Design and Implementation of 10Gbps Software PPPoE Router for IoT Smart Home Network

    Ping DU  Akihiro NAKAO  Satoshi MIKI  Makoto INOUE  

     
    PAPER-Network

      Pubricized:
    2019/10/08
      Vol:
    E103-B No:4
      Page(s):
    422-430

    In the coming smart-home era, more and more household electrical appliances are generating more and more sensor data and transmitting them over the home networks, which are often connected to Internet through Point-to-Point Protocol over Ethernet (PPPoE) for desirable authentication and accounting. However, according to our knowledge, high-speed commercial home PPPoE router is still absent for a home network environment. In this paper, we first introduce and evaluate our programmable platform FLARE-DPDK for ease of programming network functions. Then we introduce our effort to build a compact 10Gbps software FLARE PPPoE router on a commercial mini-PC. In our implementation, the control plane is implemented with Linux PPPoE software for authentication-like signaling control. The data plane is implemented over FLARE-DPDK platform, where we get packets from physical network interfaces directly bypassing Linux kernel and distribute packets to multiple CPU cores for data processing in parallel. We verify our software PPPoE router in both lab and production network environment. The experimental results show that our FLARE software PPPoE router can achieve much higher throughput than a commercial PPPoE router tested in a production environment.

  • Compiler Software Coherent Control for Embedded High Performance Multicore

    Boma A. ADHI  Tomoya KASHIMATA  Ken TAKAHASHI  Keiji KIMURA  Hironori KASAHARA  

     
    PAPER

      Vol:
    E103-C No:3
      Page(s):
    85-97

    The advancement of multicore technology has made hundreds or even thousands of cores processor on a single chip possible. However, on a larger scale multicore, a hardware-based cache coherency mechanism becomes overwhelmingly complicated, hot, and expensive. Therefore, we propose a software coherence scheme managed by a parallelizing compiler for shared-memory multicore systems without a hardware cache coherence mechanism. Our proposed method is simple and efficient. It is built into OSCAR automatic parallelizing compiler. The OSCAR compiler parallelizes the coarse grain task, analyzes stale data and line sharing in the program, then solves those problems by simple program restructuring and data synchronization. Using our proposed method, we compiled 10 benchmark programs from SPEC2000, SPEC2006, NAS Parallel Benchmark (NPB), and MediaBench II. The compiled binaries then are run on Renesas RP2, an 8 cores SH-4A processor, and a custom 8-core Altera Nios II system on Altera Arria 10 FPGA. The cache coherence hardware on the RP2 processor is only available for up to 4 cores. The RP2's cache coherence hardware can also be turned off for non-coherence cache mode. The Nios II multicore system does not have any hardware cache coherence mechanism; therefore, running a parallel program is difficult without any compiler support. The proposed method performed as good as or better than the hardware cache coherence scheme while still provided the correct result as the hardware coherence mechanism. This method allows a massive array of shared memory CPU cores in an HPC setting or a simple non-coherent multicore embedded CPU to be easily programmed. For example, on the RP2 processor, the proposed software-controlled non-coherent-cache (NCC) method gave us 2.6 times speedup for SPEC 2000 “equake” with 4 cores against sequential execution while got only 2.5 times speedup for 4 cores MESI hardware coherent control. Also, the software coherence control gave us 4.4 times speedup for 8 cores with no hardware coherence mechanism available.

  • SOH Aware System-Level Battery Management Methodology for Decentralized Energy Network

    Daichi WATARI  Ittetsu TANIGUCHI  Takao ONOYE  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E103-A No:3
      Page(s):
    596-604

    The decentralized energy network is one of the promising solutions as a next-generation power grid. In this system, each house has a photovoltaic (PV) panel as a renewable energy source and a battery which is an essential component to balance between generation and demand. The common objective of the battery management on such systems is to minimize only the purchased energy from a power company, but battery degradation caused by charge/discharge cycles is also a serious problem. This paper proposes a State-of-Health (SOH) aware system-level battery management methodology for the decentralized energy network. The power distribution problem is often solved with mixed integer programming (MIP), and the proposed MIP formulation takes into account the SOH model. In order to minimize the purchased energy and reduce the battery degradation simultaneously, the optimization problem is divided into two stages: 1) the purchased energy minimization, and 2) the battery aging factor reducing, and the trade-off exploration between the purchased energy and the battery degradation is available. Experimental results show that the proposed method achieves the better trade-off and reduces the battery aging cost by 14% over the baseline method while keeping the purchased energy minimum.

  • Polynomial-Time Reductions from 3SAT to Kurotto and Juosan Puzzles

    Chuzo IWAMOTO  Tatsuaki IBUSUKI  

     
    PAPER

      Pubricized:
    2019/12/20
      Vol:
    E103-D No:3
      Page(s):
    500-505

    Kurotto and Juosan are Nikoli's pencil puzzles. We study the computational complexity of Kurotto and Juosan puzzles. It is shown that deciding whether a given instance of each puzzle has a solution is NP-complete.

  • A ZigBee/Wi-Fi Cooperative Channel Control Method and Its Prototyping Open Access

    Kazuhiko KINOSHITA  Shu NISHIKORI  Yosuke TANIGAWA  Hideki TODE  Takashi WATANABE  

     
    PAPER-Network

      Pubricized:
    2019/09/03
      Vol:
    E103-B No:3
      Page(s):
    181-189

    Coexistence between ZigBee and Wi-Fi technologies, which operate within the same frequency band, is increasing with the widespread use of the IoT (Internet of Things). ZigBee devices suffer significant decreases in the sink arrival rate of packets in the presence of Wi-Fi interference. To overcome this problem, many channel control methods have been proposed. These methods switch only ZigBee channels to avoid interference with Wi-Fi. In contrast, we propose a cooperative channel control method for improving ZigBee packet arrival rate by controlling both the Wi-Fi and ZigBee channels. Specifically, the proposed method not only controls ZigBee devices and channels but also requests a temporary pause in the use of specific Wi-Fi channels. Finally, computer simulations show the effectiveness of the proposed method from the viewpoints of ZigBee's packet arrival rate and applications' satisfaction. In addition, the feasibility of the proposed method is also confirmed by experiments with prototyping.

  • Parallelization of Boost and Buck Type DC-DC Converters by Individual Passivity-Based Control Open Access

    Yuma MURAKAWA  Yuhei SADANDA  Takashi HIKIHARA  

     
    PAPER-Systems and Control

      Vol:
    E103-A No:3
      Page(s):
    589-595

    This paper discusses the parallelization of boost and buck converters. Passivity-based control is applied to each converter to achieve the asymptotic stability of the system. The ripple characteristics, error characteristics, and time constants of the parallelized converters are discussed with considering the dependency on the feedback gains. The numerical results are confirmed to coincide with the results in the experiment for certain feedback gains. The stability of the system is also discussed in simulation and experiment. The results will be a step to achieve the design of parallel converters.

521-540hit(5900hit)