This paper proposes methods for accelerating DPA by using the CPU and the GPU in a parallel manner. The overhead of naive DPA evaluation software increases excessively as the number of points in a trace or the number of traces is enlarged due to the rapid increase of file I/O overhead. This paper presents some techniques, with respect to DPA-arithmetic and file handling, which can make the overhead of DPA software become not extreme but gradual as the increase of the amount of trace data to be processed. Through generic experiments, we show that the software, equipped with the proposed methods, using both CPU and GPU can shorten the time for evaluating the DPA resistance of devices by almost half.

Break arcs are generated between electrical contacts in a DC 42 V resistive circuit. Contact materials are Ag/SnO2 and Ag/ZnO. Circuit current when contacts are closed is varied from 5 A to 21 A. The radial magnetic field to drive break arcs is formed between the contact gap with a permanent magnet embedded in the cathode. The arc motion is observed with a high-speed camera. Experimental results with the magnet are compared with those without the magnet. Following results are shown. Similar experimental results to pure silver contacts are obtained for Ag/SnO2 and Ag/ZnO contact pairs. The rotational motion of the break arcs and the shortening effect of the arc duration are confirmed. The ring-shaped, wide and uniform traces are observed on the contact surfaces after break operations. This result shows the prevention effect of local erosion of electrical contacts and the reduction of total amount of contact erosion. The rotational frequency f is increased with the increase of the arc current Iarc. These results for Ag/SnO2 and Ag/ZnO contact pairs are similar to the results for pure silver contacts in our previous experiments. The rotational frequency of the break arc for the Ag/SnO2 and Ag/ZnO contacts is lower than that for the pure silver contacts.

Break arcs are generated between pure silver electrical contacts in a DC high-voltage resistive circuit. The break arc is driven by the external magnetic field of a permanent magnet from horizontal direction of contacts. Electrical contacts are separated at constant opening speed at 75 mm/s. The maximum supply voltage is 300 V. The maximum circuit current when electrical contacts are closed is 20 A. The maximum output power of the supply is limited to 6.0 kW. The gap between the contacts and the magnet is defined as x. The gap is varied from 2.5 mm to 10.0 mm to change the magnetic flux density that affects the break arc. The break arc is observed with a high-speed camera. The effect of the magnetic field on the arc duration was examined. As a result, break arcs are successfully extinguished by the transverse magnetic field when the gap x is 2.5 mm. Then the length of the break arc just before lengthening of the break arc L and the Lorentz force that affects the break arc F are examined. The length L was almost constant for each gap x and independent of the circuit current I and the Lorentz force F. The break arc is driven by the magnetic field when the arc length reached a certain length that was determined by the strength of the magnetic flux density.

The Hidden Vector Encryption scheme is one of the searchable public key encryption schemes that allow for searching encrypted data. The Hidden Vector Encryption scheme supports conjunctive equality, comparison, and subset queries, as well as arbitrary conjunctive combinations of these queries. In a Hidden Vector Encryption scheme, a receiver generates a token for a vector of searchable components and sends the token to a query server which has the capability to evaluate it on encrypted data. All of the existing Hidden Vector Encryption schemes, which are all pairing-based, require token elements and pairing computations proportional to the number of searchable components in the token. In this paper, we suggest an improved paring-based Hidden Vector Encryption scheme where the token elements and pairing computations are independent of the number of searchable components. Namely, for an arbitrary conjunctive search query, the token is of size O(1) and the query server only needs O(1) pairing computations. The latter improvement in particular might be very attractive to a query server in a larger search system with many users. To achieve our goal, we introduce a novel technique to generate a token, which may be of independent interest.

The paper presents the state of knowledge about thermal-erosion processes in contacts of low-voltage switching devices for power engineering on switching currents under short-circuit conditions. The graphical models of the short arc and the distribution of arc power introduced into contacts are shown. The method for measurements of a contact temperature during an electric discharge has been elaborated. The obtained test results are presented, i.e. changes of a contact temperature as a function of arc parameters such as current, energy, and integral ∫idt. The tests have shown that a "break point" exists on the curve expressing the relationship between a temperature rise and arc parameters in the range of high currents. The location of this point is dependent on a diameter of contacts and a value of current, and is associated with thermal energy delivered to electrodes. It has been observed that for each diameter of contacts there exists such value of an energetic quantity of arc (current, ∫idt, energy), at which diameters of arc roots are the same as a contact diameter. Above this value, the shape of a curve is changed. The obtained results explain and confirm the discontinuity of a curve expressing a contact arc erosion as a function of current, which was observed earlier by the other research workers.

This paper presents a comprehensive explanation of the formation of the electric arc between opening contacts in a current carrying electric circuit. As the contacts begin to open a molten metal bridge forms between them. The rupture of this bridge and the initial formation of the electric arc are studied in both atmospheric air and vacuum using experiments to determine the direction of metal transfer between the contacts as a function of time after the rupture of the molten metal bridge. High speed streak photography is also used to show the rupture of the molten metal bridge and the initial formation of the electric arc. Analysis of these data show that a very high-pressure, high-temperature metal vapor zone exists between the contacts after the rupture of the molten metal bridge. Under this condition a pseudo-arc forms where current is carried by metal ions and an anomalous, high net transfer of metal to the cathodic contact occurs. The pressure in this region decreases rapidly and there is a transition to the usual electric arc, which still operates in the metal vapor. In this arc the current is now mostly carried by electrons. The data shows that there is still a net transfer of metal to the cathode, but now its volume is a function of the arcing time.

A transceiver employing hierarchical constellation encodes two hierarchies with different levels of protection and selectively decodes one or both of them, resulting in constellation inconsistency of encoding and decoding. Therefore, a conventional ordered successive interference cancellation (OSIC) receiver, which restores the signals as they are transmitted, can not be compatible with the constellation inconsistency. To mitigate this problem, an OSIC detector with the individual received bit rate per data stream is first designed. To further improve the error performance, the proposed detector is modified, for which distinct criteria are used for demodulation and cancellation. It is shown that the proposed detector achieves spectrally efficient detection while guaranteeing reliable communication.

This paper presents an asynchronous FPGA that combines 4-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. 4-phase dual-rail encoding is employed to achieve small area and low power for function units, while LEDR encoding is employed to achieve high throughput and low power for the data transfer using programmable interconnection resources. Area-efficient protocol converters and their control circuits are also proposed in transistor-level implementation. The proposed FPGA is designed using the e-Shuttle 65nm CMOS process. Compared to the 4-phase-dual-rail-based FPGA, the throughput is increased by 69% with almost the same transistor count. Compared to the LEDR-based FPGA, the transistor count is reduced by 47% with almost the same throughput. In terms of power consumption, the proposed FPGA achieves the lowest power compared to the 4-phase-dual-rail-based and the LEDR-based FPGAs. Compared to the synchronous FPGA, the proposed FPGA has lower power consumption when the workload is below 35%.

A scheme for designing a hierarchical fuzzy classification system with a different number of fuzzy partitions based on statistical characteristics of the data is proposed. To minimize the number of misclassified patterns in intermediate layers, a method of fuzzy partitioning from the defuzzified outputs of previous layers is also presented. The effectiveness of the proposed scheme is demonstrated by comparing the results from five datasets in the UCI Machine Learning Repository.

There has been much interest in a spatial query which acquires sensor readings from sensor nodes inside specified geographical area of interests. A centralized approach performs the spatial query at a server after acquiring all sensor readings. However, it incurs high wireless transmission cost in accessing all sensor nodes. Therefore, various in-network spatial search methods have been proposed, which focus on reducing the wireless transmission cost. However, the in-network methods sometimes incur unnecessary wireless transmissions because of dead space, which is spatially indexed but does not contain real data. In this paper, we propose a hybrid spatial query processing algorithm which removes the unnecessary wireless transmissions. The main idea of the hybrid algorithm is to find results of a spatial query at a server in advance and use the results in removing the unnecessary wireless transmissions at a sensor network. We compare the in-network method through several experiments and clarify our algorithm's remarkable features.

This paper proposes a high-speed architecture to realize two-variable numeric functions. It represents the given function as an edge-valued multiple-valued decision diagram (EVMDD), and shows a systematic design method based on the EVMDD. To achieve a design, we characterize a numeric function f by the values of l and p for which f is an l-restricted Mp-monotone increasing function. Here, l is a measure of subfunctions of f and p is a measure of the rate at which f increases with an increase in the dependent variable. For the special case of an EVMDD, the EVBDD, we show an upper bound on the number of nodes needed to realize an l-restricted Mp-monotone increasing function. Experimental results show that all of the two-variable numeric functions considered in this paper can be converted into an l-restricted Mp-monotone increasing function with p=1 or 3. Thus, they can be compactly realized by EVBDDs. Since EVMDDs have shorter paths and smaller memory size than EVBDDs, EVMDDs can produce fast and compact NFGs.

This paper presents a high-speed, low-complexity VLSI architecture based on the modified Euclidean (ME) algorithm for Reed-Solomon decoders. The low-complexity feature of the proposed architecture is obtained by reformulating the error locator and error evaluator polynomials to remove redundant information in the ME algorithm proposed by Truong. This increases the hardware utilization of the processing elements used to solve the key equation and reduces hardware by 30.4%. The proposed architecture retains the high-speed feature of Truong's ME algorithm with a reduced latency, achieved by changing the initial settings of the design. Analytical results show that the proposed architecture has the smallest critical path delay, latency, and area-time complexity in comparison with similar studies. An example RS(255,239) decoder design, implemented using the TSMC 0.18 µm process, can reach a throughput rate of 3 Gbps at an operating frequency of 375 MHz and with a total gate count of 27,271.

In deep submicron era, wire delay is no longer negligible and is becoming a dominant factor of the system performance. To cope with the increasing wire delay, several state-of-the-art architectural synthesis flows have been proposed for the distributed register architectures by enabling on-chip multicycle communication. In this article, we present a new performance-driven criticality-aware synthesis framework CriAS targeting regular distributed register architectures. To achieve high system performance, CriAS features a hierarchical binding-then-placement for minimizing the number of performance-critical global data transfers. The key ideas are to take time criticality as the major concern at earlier binding stages before the detailed physical placement information is available, and to preserve the locality of closely related critical components in the later placement phase. The experimental results show that CriAS can achieve an average of 14.26% overall performance improvement with no runtime overhead as compared to the previous art.

In this paper, we study the problem of processing continuous range queries in a hierarchical wireless sensor network. Recently, as the size of sensor networks increases due to the growth of ubiquitous computing environments and wireless networks, building wireless sensor networks in a hierarchical configuration is put forth as a practical approach. Contrasted with the traditional approach of building networks in a "flat" structure using sensor devices of the same capability, the hierarchical approach deploys devices of higher-capability in a higher tier, i.e., a tier closer to the server. While query processing in flat sensor networks has been widely studied, the study on query processing in hierarchical sensor networks has been inadequate. In wireless sensor networks, the main costs that should be considered are the energy for sending data and the storage for storing queries. There is a trade-off between these two costs. Based on this, we first propose a progressive processing method that effectively processes a large number of continuous range queries in hierarchical sensor networks. The proposed method uses the query merging technique proposed by Xiang et al. as the basis. In addition, the method considers the trade-off between the two costs. More specifically, it works toward reducing the storage cost at lower-tier nodes by merging more queries and toward reducing the energy cost at higher-tier nodes by merging fewer queries (thereby reducing "false alarms"). We then present how to build a hierarchical sensor network that is optimal with respect to the weighted sum of the two costs. This allows for a cost-based systematic control of the trade-off based on the relative importance between the storage and energy in a given network environment and application. Experimental results show that the proposed method achieves a near-optimal control between the storage and energy and reduces the cost by 1.002 -- 3.210 times compared with the cost achieved using the flat (i.e., non-hierarchical) setup as in the work by Xiang et al.

In 2009, Jeong et al. proposed a new searchable encryption scheme with keyword-recoverability which is secure even if the adversaries have any useful partial information about the keyword. They also proposed an extension scheme for multi-keywords. However, this paper demonstrates that Jeong et al.'s schemes are vulnerable to off-line keyword guessing attacks, where an adversary (insider/outsider) can retrieve information of certain keyword from any captured query message of the scheme.

This paper presents a novel algorithm for Nearest Neighbor (NN) classifier. NN classification is a well-known method of pattern classification having the following properties: * it performs maximum-margin classification and achieves less than twice the ideal Bayesian error, * it does not require knowledge of pattern distributions, kernel functions or base classifiers, and * it can naturally be applied to multiclass classification problems. Among the drawbacks are A) inefficient memory use and B) ineffective pattern classification speed. This paper deals with the problems A and B. In most cases, NN search algorithms, such as k-d tree, are employed as a pattern search engine of the NN classifier. However, NN classification does not always require the NN search. Based on this idea, we propose a novel algorithm named k-d decision tree (KDDT). Since KDDT uses Voronoi-condensed prototypes, it consumes less memory than naive NN classifiers. We have confirmed that KDDT is much faster than NN search-based classifier through a comparative experiment (from 9 to 369 times faster than NN search based classifier). Furthermore, in order to extend applicability of the KDDT algorithm to high-dimensional NN classification, we modified it by incorporating Gabriel editing or RNG editing instead of Voronoi condensing. Through experiments using simulated and real data, we have confirmed the modified KDDT algorithms are superior to the original one.

When developing an index for a similarity search in metric spaces, how to divide the space for effective search pruning is a fundamental issue. We present Maximal Metric Margin Partitioning (MMMP), a partitioning scheme for similarity search indexes. MMMP divides the data based on its distribution pattern, especially for the boundaries of clusters. A partitioning boundary created by MMMP is likely to be located in a sparse area between clusters. Moreover, the partitioning boundary is at maximum distances from the two cluster edges. We also present an indexing scheme, named the MMMP-Index, which uses MMMP and pivot filtering. The MMMP-Index can prune many objects that are not relevant to a query, and it reduces the query execution cost. Our experimental results show that MMMP effectively indexes clustered data and reduces the search cost. For clustered data in a vector space, the MMMP-Index reduces the computational cost to less than two thirds that of comparable schemes.

We propose a moving picture coding by lapped transform and an edge adaptive deblocking filter to reduce the blocking distortion. We apply subband coding (SBC) with lapped transform (LT) and zero pruning set partitioning in hierarchical trees (zpSPIHT) to encode the difference picture. Effective coding using zpSPIHT was achieved by quantizing and pruning the quantized zeros. The blocking distortion caused by block motion compensated prediction is reduced by an edge adaptive deblocking filter. Since the original edges can be detected precisely at the reference picture, an edge adaptive deblocking filter on the predicted picture is very effective. Experimental results show that blocking distortion has been visually reduced at very low bit rate coding and better PSNRs of about 1.0 dB was achieved.

Robotic systems operating in the real-world have to cope with unforeseen events by determining appropriate decisions based on noisy or partial knowledge. In this respect high functional robots are equipped with many sensors and actuators and run multiple processing modules in parallel. The resulting complexity is even further increased in case of cooperative multi-robot systems, since mechanisms for joint operation are needed. In this paper a complete and modular framework that handles this complexity in multi-robot systems is presented. It provides efficient exchange of generated data as well as a generic scheme for task execution and robot coordination.

Recently, Hu et al. have suggested a fully secure hierarchical identity-based encryption (HIBE) scheme that achieves constant size ciphertext and tight security reduction. Their construction was based on Gentry's IBE scheme that supports their security proof. In this paper, we show that their security proof is incorrect. We point out the difference between Gentry's proof and that of Hu et al., and we show that the security of Hu et al.'s HIBE scheme cannot be reduced to their claimed complexity assumption.