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[Keyword] arc(1310hit)

461-480hit(1310hit)

  • How to Decide Selection Functions for Power Analysis: From the Viewpoint of Hardware Architecture of Block Ciphers

    Daisuke SUZUKI  Minoru SAEKI  Koichi SHIMIZU  Tsutomu MATSUMOTO  

     
    PAPER-Implementation

      Vol:
    E94-A No:1
      Page(s):
    200-210

    In this paper we first demonstrate that effective selection functions in power analysis attacks change depending on circuit architectures of a block cipher. We then conclude that the most resistant architecture on its own, in the case of the loop architecture, has two data registers have separate roles: one for storing the plaintext and ciphertext, and the other for storing intermediate values. There, the pre-whitening operation is placed at the output of the former register. The architecture allows the narrowest range of selection functions and thereby has resistance against ordinary CPA. Thus, we can easily defend against attacks by ordinary CPA at the architectural level, whereas we cannot against DPA. Secondly, we propose a new technique called "self-templates" in order to raise the accuracy of evaluation of DPA-based attacks. Self-templates enable to differentiate meaningful selection functions for DPA-based attacks without any strong assumption as in the template attack. We also present the results of attacks to an AES co-processor on an ASIC and demonstrate the effectiveness of the proposed technique.

  • Anonymous Hierarchical Identity-Based Encryption with Short Ciphertexts

    Jae Hong SEO  Tetsutaro KOBAYASHI  Miyako OHKUBO  Koutarou SUZUKI  

     
    PAPER-Public Key Cryptography

      Vol:
    E94-A No:1
      Page(s):
    45-56

    We propose an anonymous Hierarchical Identity-Based Encryption (anonymous HIBE) scheme with short ciphertexts. Prior to our work, most anonymous HIBE schemes have long ciphertexts increased according to the hierarchical depth of recipient. The size of the ciphertext in our scheme does not depend on the depth of the hierarchy. Moreover, our scheme achieves the lowest computational cost because during the decryption phase the computational cost of decryption is constant. The security can be proven under reasonable assumptions without using random oracles. Our scheme achieves selective-ID security notion.

  • An Enhanced Automatic Gain Control Algorithm for Initial Cell Search in 3GPP LTE TDD System

    Jun-Hee JANG  Keun-Dea KIM  Hyung-Jin CHOI  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E93-B No:12
      Page(s):
    3606-3615

    In this paper, we propose an AGC (Automatic Gain Control) algorithm for initial cell search in 3GPP (3rd Generation Partnership Project) LTE (Long Term Evolution) TDD (Time Division Duplex) system. Since the received signal has a large signal power difference between uplink and downlink subframe in wireless communication systems using a TDD scheme, conventional AGC scheme cannot sufficiently adjust the AGC gain because the AGC gain cannot converge fast enough to properly respond. Therefore, conventional AGC scheme leads to increased AGC gain variation, and the received signal will be attenuated by large AGC gain variation. To overcome this limitation, we propose an AGC scheme based on the average amplitude ratio calculation which can not only effectively increase convergence speed of the AGC gain but also maintain the stability of AGC operation in LTE TDD system. Also, it is important for AGC to converge efficiently for the accurate radio frame timing detection during the subsequent initial cell search procedure. Therefore, we also consider the proposed AGC scheme in combination with PSS (Primary Synchronization Signal) detection interface for the first step of initial cell search process in LTE TDD system to obtain both a stable AGC operation and accurate PSS detection performance. By extensive computer simulation in the presence of frequency offset and various channel environments, we verified that the proposed method can obtain a good behavior in terms of demodulation and PSS detection performance in LTE TDD system.

  • A Novel Emergency Rescue Urgent Communications for Sharing Evacuation Support Information in Panic-Type Disasters

    Tomotaka WADA  Akinori YAMANE  Kazuhiro OHTSUKI  Hiromi OKADA  

     
    PAPER

      Vol:
    E93-B No:12
      Page(s):
    3429-3437

    Many people have suffered and died due to a lot of large-scale disasters such as earthquake, fire, and terrorism, etc. In disasters where most evacuators become panic, two things are necessary for their immediate evacuation. The first is to estimate the location of the disaster occurrence. The second is to construct an evacuation support system that searches for safe and efficient evacuation routes. In this paper, we propose Emergency Rescue Urgent Communication -- Evacuation Support System (EUC-ESS) based on Mobile Ad-hoc networks (MANET) composed of many mobile terminals. Using experiments and computer simulations, we show that this system would support evacuators in determining appropriate routes for survivors.

  • Coexistence of Dynamic Spectrum Access Based Heterogeneous Networks

    Chen SUN  Yohannes D. ALEMSEGED  HaNguyen TRAN  Hiroshi HARADA  

     
    PAPER

      Vol:
    E93-B No:12
      Page(s):
    3293-3301

    This paper addresses the coexistence issue of distributed heterogeneous networks where the network nodes are cognitive radio terminals. These nodes, operating as secondary users (SUs), might interfere with primary users (PUs) who are licensed to use a given frequency band. Further, due to the lack of coordination and the dissimilarity of the radio access technologies (RATs) among these wireless nodes, they might interfere with each other. To solve this coexistence problem, we propose an architecture that enables coordination among the distributed nodes. The architecture provides coexistence solutions and sends reconfiguration commands to SU networks. As an example, time sharing is considered as a solution. Further, the time slot allocation ratios and transmit powers are parameters encapsulated in the reconfiguration commands. The performance of the proposed scheme is evaluated in terms of the coexistence between PUs and SUs, as well as the coexistence among SUs. The former addresses the interference from SUs to PUs, whereas the latter addresses the sharing of an identified spectrum opportunity among heterogeneous SU networks for achieving an efficient spectrum usage. In this study, we first introduce a new parameter named as quality of coexistence (QoC), which is defined as the ratio between the quality of SU transmissions and the negative interference to PUs. In this study we assume that the SUs have multiple antennas and employ fixed transmit power control (fixed-TPC). By using the approximation to the distribution of a weighted sum of chi-square random variables (RVs), we develop an analytical model for the time slot allocation among SU networks. Using this analytical model, we obtain the optimal time slot allocation ratios as well as transmit powers of the SU networks by maximizing the QoC. This leads to an efficient spectrum usage among SUs and a minimized negative influence to the PUs. Results show that in a particular scenario the QoC can be increased by 30%.

  • Register File Size Reduction through Instruction Pre-Execution Incorporating Value Prediction

    Yusuke TANAKA  Hideki ANDO  

     
    PAPER-Computer System

      Vol:
    E93-D No:12
      Page(s):
    3294-3305

    Two-step physical register deallocation (TSD) is an architectural scheme that enhances memory-level parallelism (MLP) by pre-executing instructions. Ideally, TSD allows exploitation of MLP under an unlimited number of physical registers, and consequently only a small register file is needed for MLP. In practice, however, the amount of MLP exploitable is limited, because there are cases where either 1) pre-execution is not performed; or 2) the timing of pre-execution is delayed. Both are due to data dependencies among the pre-executed instructions. This paper proposes the use of value prediction to solve these problems. This paper proposes the use of value prediction to solve these problems. Evaluation results using the SPECfp2000 benchmark confirm that the proposed scheme with value prediction for predicting addresses achieves equivalent IPC, with a smaller register file, to the previous TSD scheme. The reduction rate of the register file size is 21%.

  • Performance and Energy Efficiency Tradeoffs of Storage Class Memory

    Heekwon PARK  Seungjae BAEK  Jongmoo CHOI  

     
    LETTER-Computer System

      Vol:
    E93-D No:11
      Page(s):
    3112-3115

    The traditional mobile consumer electronics such as media players and smart phones use two distinct memories, SDRAM and Flash memory. SDRAM is used as main memory since it has characteristic of byte-unit random accessibility while Flash memory as secondary storage due to its characteristic of non-volatility. However, the advent of Storage Class Memory (SCM) that supports both SDRAM and Flash memory characteristics gives an opportunity to design a new system configuration. In this paper, we explore four feasible system configurations, namely RAM-Flash, RAM-SCM, SCM-Flash and SCM-Only. Then, using a real embedded system equipped with FeRAM, a type of SCM, we analyze the tradeoffs between performance and energy efficiency of each configuration. Experimental results have shown that SCM has great potential to reduce energy consumption for all configurations while performance is highly application dependent and might be degraded on the SCM-Flash and SCM-Only configuration.

  • Is There Real Fusion between Sensing and Network Technology? -- What are the Problems? Open Access

    Masatoshi ISHIKAWA  

     
    INVITED PAPER

      Vol:
    E93-B No:11
      Page(s):
    2855-2858

    Processing structures required in sensing are designed to convert real-world information into useful information, and there are various restrictions and performance goals depending on physical restrictions and the target applications. On the other hand, network technologies are mainly designed for data exchange in the information world, as is seen in packet communications, and do not go well with sensing structures from the viewpoints of real-time properties, spatial continuity, etc. This indicates the need for understanding the architectures and restrictions of sensor technologies and network technologies when aiming to fuse these technologies. This paper clarifies the differences between these processing structures, proposes some issues to be addressed in order to achieve real fusion of them, and presents future directions toward real fusion of sensor technologies and network technologies.

  • Throughput Maximization in Cooperation Based Symbiotic Cognitive Radio Networks

    Peng XUE  Peng GONG  Duk Kyung KIM  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E93-B No:11
      Page(s):
    3207-3210

    In the symbiotic cognitive radio (CR) networks, the CR users (CUs) may assist the primary transmission in a cooperation time, and obtain an incentive time for their own data transmission. In this letter, we study the throughput maximization problem in the symbiotic CR networks. Under the symbiosis and transmit power constraints, we aim to find the optimal cooperation time to assist the primary transmission and power allocations among the CUs. Given the cooperation time, the optimal power allocations can be solved by multi-level water-filling (MWF) with individual volume limits. A theoretical analysis is presented on the cooperation time and a modified bisection algorithm with low complexity is proposed to find the sub-optimal cooperation time. Simulation results show that the spectrum usage efficiency can be significantly improved as the number of CUs increases.

  • A Self-Calibration Technique for Capacitor Mismatch Errors of an Interleaved SAR ADC

    Yasuhide KURAMOCHI  Masayuki KAWABATA  Kouichiro UEKUSA  Akira MATSUZAWA  

     
    PAPER-Electronic Circuits

      Vol:
    E93-C No:11
      Page(s):
    1630-1637

    We present self-calibration techniques for an interleaved SAR (Successive Approximation Register) ADC. The calibration technique is based on hardware corrections for linearity of single stage, gain error and mismatch errors of parallel ADCs. The 4-interleaved 11-bit ADC has been fabricated in a 0.18-µm CMOS process. Using the calibrations, measurement and calculation results show that the differences of ramp characteristic among the 4-interleaving ADC can be decresased to under 0.63 LSB.

  • Estimating Mobile-Friendliness Scores of Web Pages

    Jihwan SONG  Xing XIE  Yoon-Joon LEE  Ji-Rong WEN  

     
    LETTER-Data Engineering, Web Information Systems

      Vol:
    E93-D No:11
      Page(s):
    3124-3127

    Mobile devices such as cell phones and personal digital assistants (PDAs) are becoming increasingly popular tools to access the Internet. Unfortunately, the experience of users attempting to access web pages with these mobile devices has been less than satisfactory because of their small display areas, slow communications links and low computing power. In this paper, we propose a trained scorer to estimate the mobile-friendliness scores of web pages, providing an indication of their suitability for mobile devices. These scores help mobile-friendly pages receive higher ranks in search results when mobile users seek information on the web. Our experiments show that the search results re-ranked by our mobile-friendliness scores increase mobile user satisfaction.

  • IP Lookup Using the Novel Idea of Scalar Prefix Search with Fast Table Updates

    Mohammad BEHDADFAR  Hossein SAIDI  Masoud-Reza HASHEMI  Ali GHIASIAN  Hamid ALAEI  

     
    PAPER

      Vol:
    E93-D No:11
      Page(s):
    2932-2943

    Recently, we have proposed a new prefix lookup algorithm which would use the prefixes as scalar numbers. This algorithm could be applied to different tree structures such as Binary Search Tree and some other balanced trees like RB-tree, AVL-tree and B-tree with minor modifications in the search, insert and/or delete procedures to make them capable of finding the prefixes of an incoming string e.g. an IP address. As a result, the search procedure complexity would be O(log n) where n is the number of prefixes stored in the tree. More important, the search complexity would not depend on the address length w i.e. 32 for IPv4 and 128 for IPv6. Here, it is assumed that interface to memory is wide enough to access the prefix and some simple operations like comparison can be done in O(1) even for the word length w. Moreover, insertion and deletion procedures of this algorithm are much simpler and faster than its competitors. In what follows, we report the software implementation results of this algorithm and compare it with other solutions for both IPv4 and IPv6. It also reports on a simple hardware implementation of the algorithm for IPv4. Comparison results show better lookup and update performances or superior storage requirements for Scalar Prefix Search in both average and worst cases.

  • Exact Formulation for Stochastic ML Estimation of DOA

    Haihua CHEN  Masakiyo SUZUKI  

     
    PAPER

      Vol:
    E93-A No:11
      Page(s):
    2141-2152

    This paper addresses the issue of Unconditional or Stochastic Maximum likelihood (SML) estimation of directions-of-arrival (DOA) finding using sensors with arbitrary array configuration. The conventional SML estimation is formulated without an important condition that the covariance matrix of signal components must be non-negative definite. An likelihood function can not be evaluated exactly for all possible sets of directions. First, this paper reveals that the conventional SML has three problems due to the lack of the condition. 1) Solutions in the noise-free case are not unique. 2) Global solution in the noisy case becomes ambiguous occasionally. 3) There exist situations that any local solution does not satisfy the condition of the non-negative definiteness. We propose an exact formulation of the SML estimation of DOA to evaluate an likelihood function exactly for any possible set of directions. The proposed formulation can be utilized without any theoretical difficulty. The three problems of the conventional SML are solved by the proposed exact SML estimation. Furthermore we show a local search technique in the conventional SML has a good chance to find an optimal or suboptimal DOA although the suboptimal solutions violate the condition of the non-negative definiteness. Finally some simulation results are shown to demonstrate good estimation properties of the exact SML estimation.

  • Hybrid Uniform Distribution of Particle Swarm Optimizer

    Junqi ZHANG  Ying TAN  Lina NI  Chen XIE  Zheng TANG  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E93-A No:10
      Page(s):
    1782-1791

    Particle swarm optimizer (PSO) is a stochastic global optimization technique based on a social interaction metaphor. Because of the complexity, dynamics and randomness involved in PSO, it is hard to theoretically analyze the mechanism on which PSO depends. Statistical results have shown that the probability distribution of PSO is a truncated triangle, with uniform probability across the middle that decreases on the sides. The "truncated triangle" is also called the "Maya pyramid" by Kennedy. However, very little is known regarding the sampling distribution of PSO in itself. In this paper, we theoretically analyze the "Maya pyramid" without any assumption and derive its computational formula, which is actually a hybrid uniform distribution that looks like a trapezoid and conforms with the statistical results. Based on the derived density function of the hybrid uniform distribution, the search strategy of PSO is defined and quantified to characterize the mechanism of the search strategy in PSO. In order to show the significance of these definitions based on the derived hybrid uniform distribution, the comparison between the defined search strategies of the classical linear decreasing weight based PSO and the canonical constricted PSO suggested by Clerc is illustrated and elaborated.

  • Performance and Power Modeling of On-Chip Bus System for a Complex SoC

    Hyun LEE  Je-Hoon LEE  Kyoung-Rok CHO  

     
    PAPER-Integrated Electronics

      Vol:
    E93-C No:10
      Page(s):
    1525-1535

    This paper presents latency and power modeling of an on-chip bus at the early stage of SoC design. The latency model is to estimate a bus throughput associated with bus configuration and behavioral model before the system-level modeling for a target SoC is established. The power model roughly calculates the power consumption of an on-chip bus including the power consumed by bus wire and bus logics. Thus, the bus architecture is determined by the trade-off between the bus throughput and power estimation obtained from the proposed bus model. We evaluate the target SoCs such as an MPEG player and a portable multimedia player so as to compare the estimated throughput from the proposed bus model to the result performed by a commercial system-level co-simulation framework. As the simulation results, the latency and power consumption of the proposed model shows 14% and 8% differences compared with the result from the validated commercial co-simulation tool.

  • Structural Models that Manage IT Portfolio Affecting Business Value of Enterprise Architecture

    Takaaki KAMOGAWA  

     
    PAPER-Office Information Systems, e-Business Modeling

      Vol:
    E93-D No:9
      Page(s):
    2566-2576

    This paper examines the structural relationships between Information Technology (IT) governance and Enterprise Architecture (EA), with the objective of enhancing business value in the enterprise society. Structural models consisting of four related hypotheses reveal the relationship between IT governance and EA in the improvement of business values. We statistically examined the hypotheses by analyzing validated questionnaire items from respondents within firms listed on the Japanese stock exchange who were qualified to answer them. We concluded that firms which have organizational ability controlled by IT governance are more likely to deliver business value based on IT portfolio management.

  • Effect of Different Vent Configurations on the Interruption Performance of Arc Chamber

    Degui CHEN  Xingwen LI  Ruicheng DAI  

     
    PAPER

      Vol:
    E93-C No:9
      Page(s):
    1399-1403

    Gas flow in arc quenching chamber has an important effect on the interruption capability of low voltage circuit breakers. In this paper, based on a simplified model of arc chamber with a single break, which can be opened by the electro-dynamics repulsion force automatically, the effect of different vent configurations including middle vent and side vent on the interruption performance is investigated. First, the experiments are carried out to compare the different performance in the interruption process between middle vent type and side vent type. In addition, according to the experimental model, a 3-D magneto-hydrodynamic model was developed by adapting and modified the commercial computational fluid dynamics software FLUENT. The simulation results show the same trend in arc motion as explained in the experimental conclusions in theory.

  • A Low Power SOC Architecture for the V2.0+EDR Bluetooth Using a Unified Verification Platform

    Jeonghun KIM  Suki KIM  Kwang-Hyun BAEK  

     
    PAPER-Computer System

      Vol:
    E93-D No:9
      Page(s):
    2500-2508

    This paper presents a low-power System on Chip (SOC) architecture for the v2.0+EDR (Enhanced Data Rate) Bluetooth and its applications. Our design includes a link controller, modem, RF transceiver, Sub-Band Codec (SBC), Expanded Instruction Set Computer (ESIC) processor, and peripherals. To decrease power consumption of the proposed SOC, we reduce data transfer using a dual-port memory, including a power management unit, and a clock gated approach. We also address some of issues and benefits of reusable and unified environment on a centralized data structure and SOC verification platform. This includes flexibility in meeting the final requirements using technology-independent tools wherever possible in various processes and for projects. The other aims of this work are to minimize design efforts by avoiding the same work done twice by different people and to reuse the similar environment and platform for different projects. This chip occupies a die size of 30 mm2 in 0.18 µm CMOS, and the worst-case current of the total chip is 54 mA.

  • Study on the Retrograde Motion of Arc under Transverse Magnetic Field

    Guofu ZHAI  Xinglei CUI  Xue ZHOU  

     
    PAPER

      Vol:
    E93-C No:9
      Page(s):
    1431-1436

    The phenomena of retrograde motion of arc in the atmosphere under transverse magnetic field were studied. AgSnO2 contacts were set in DC resistive and inductive circuits, respectively. The break voltage was 28 V, the current ranged from 1 to 5 A, and the magnetic flux density changed from 0 to 100 mT. A high speed camera and an oscilloscope were used to record time variations of arc images, voltages and currents, simultaneously. Different from previous experiment results, the arc motion showed three stages which was more obvious under larger magnetic flux density in inductive circuit. It was also found that the arc movement was closely related with the arc voltage. Explanation to the retrograde motion under such conditions was given.

  • A Study on Wear of Brush and Carbon Flat Commutator of DC Motor for Automotive Fuel Pump

    Koichiro SAWA  Takahiro UENO  Hidenori TANAKA  

     
    PAPER

      Vol:
    E93-C No:9
      Page(s):
    1443-1448

    In an automotive fuel pump system, a small DC motor is widely used to drive the pump and driven by a automotive battery. Recently a bio-fuel, usually a mixture of gasoline and ethanol has been used due to shortage of gasoline and environmental aspect. It affects strongly the performances of a DC motor, especially commutation phenomena, what kind of fuel is used. Therefore the authors have started to investigate the influence of ethanol on the commutation phenomena. They have been reporting the wear of brush and carbon flat commutator in gasoline and ethanol so far. In this paper commutation period, arc duration, brush and commutator wear are examined in ethanol 50-gasoline 50%. Brush wears are very small compared with the previous results. Namely in the present test a mechanical sliding wear is predominant rather than erosion by arc due to short arc duration. Further, an area eroded by arc is observed to re-appear as a sliding surface. From these results a threshold arc energy between arc erosion and mechanical sliding wear is obtained, and a wear model is proposed to explain the above wear pattern on the sliding surface.

461-480hit(1310hit)