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781-800hit(1309hit)

  • A Compact Design of W-Band High-Pass Waveguide Filter Using Genetic Algorithms and Full-Wave Finite Element Analysis

    An-Shyi LIU  Ruey-Beei WU  Yi-Cheng LIN  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E88-C No:8
      Page(s):
    1764-1771

    This paper proposes an efficient two-phase optimization approach for a compact W-band double-plane stepped rectangular waveguide filter design, which combines genetic algorithms (GAs) with the simplified transmission-line model and full-wave analysis. Being more efficient and robust than the gradient-based method, the approach can lead to a compact waveguide filter design. Numerical results show that the resultant waveguide filter design with 4 sections (total length 19.6 mm) is sufficient to meet the design goal and provides comparable performance to that with 8 sections (total length 35.6 mm) by the Chebyshev synthesis approach. Based on the present approach, nineteen compact high-pass waveguide filters have been implemented and measured at the W-band with satisfactory performance.

  • A Proposal of Various IP Mobility Services to Apply the Mobile VLAN in the Ubiquitous Environment

    Shigeaki TANIMOTO  Naoto FUJIKI  

     
    PAPER

      Vol:
    E88-B No:7
      Page(s):
    2743-2755

    In recent years, the Internet has come to be able to be used at higher speed and more cheaply everywhere as the broadband service and the wireless LAN service have been provided by various ISPs. In such a ubiquitous environment, a demand for mobile computing environments in the intranet and easy access from remote sites has been increasing greatly as well as the Internet. To meet this requirement, we have proposed a Logical Office service, which is a kind of the mobile VLAN, and enables terminal plug and play, layer two tunneling, and ubiquitous communication. This paper newly proposes that the offer of the IP mobility to not only the movement of the terminal but also existing network services be possible the Logical Office service which we developed. As a result, it was verified to operate existing network services such as wirelesses LAN on the Logical Office service, and for newly existing network services to able to have the IP mobility.

  • Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems

    Luca FANUCCI  Sergio SAPONARA  Massimiliano MELANI  Pierangelo TERRENI  

     
    PAPER-Adaptive Signal Processing

      Vol:
    E88-D No:7
      Page(s):
    1538-1545

    With reference to video motion estimation in the framework of the new H.264/AVC video coding standard, this paper presents algorithmic and architectural solutions for the implementation of context-aware coprocessors in real-time, low-power embedded systems. A low-complexity context-aware controller is added to a conventional Full Search (FS) motion estimation engine. While the FS coprocessor is working, the context-aware controller extracts from the intermediate processing results information related to the input signal statistics in order to automatically configure the coprocessor itself in terms of search area size and number of reference frames; thus unnecessary computations and memory accesses can be avoided. The achieved complexity saving factor ranges from 2.2 to 25 depending on the input signal while keeping unaltered performance in terms of motion estimation accuracy. The increased efficiency is exploited both for (i) processing time reduction in case of software implementation on a programmable platform; (ii) power consumption reduction in case of dedicated hardware implementation in CMOS technology.

  • Architecture of a Stereo Matching VLSI Processor Based on Hierarchically Parallel Memory Access

    Masanori HARIYAMA  Haruka SASAKI  Michitaka KAMEYAMA  

     
    PAPER-Digital Circuits and Computer Arithmetic

      Vol:
    E88-D No:7
      Page(s):
    1486-1491

    This paper presents a VLSI processor for high-speed and reliable stereo matching based on adaptive window-size control of SAD(Sum of Absolute Differences) computation. To reduce its computational complexity, SADs are computed using multi-resolution images. Parallel memory access is essential for highly parallel image processing. For parallel memory access, this paper also presents an optimal memory allocation that minimizes the hardware amount under the condition of parallel memory access at specified resolutions.

  • History-Based Auxiliary Mobility Management Strategy for Hierarchical Mobile IPv6 Networks

    Ki-Sik KONG  Sung-Ju ROH  Chong-Sun HWANG  

     
    PAPER-Network Management/Operation

      Vol:
    E88-A No:7
      Page(s):
    1845-1858

    The reduction of the signaling load associated with IP mobility management is one of the significant challenges to IP mobility support protocols. Hierarchical Mobile IPv6 (HMIPv6) aims to reduce the number of the signaling messages in the backbone networks, and improve handoff performance by reducing handoff latency. However, this does not imply any change to the periodic binding update (BU) to the home agent (HA) and the correspondent node (CN), and now a mobile node (MN) additionally should send it to the mobility anchor point (MAP). Moreover, the MAP should tunnel the received packets to be routed to the MN. These facts mean that the reduction of the BU messages in the backbone networks can be achieved at the expense of the increase in the signaling bandwidth consumption within a MAP domain. On the other hand, it is observed that an MN may habitually stay for a relatively long time or spend on using much Internet in a specific cell (hereafter, home cell) covering its home, office or laboratory, etc. Thus, considering the preceding facts and observation, HMIPv6 may not be favorable especially during a home cell residence time in terms of signaling bandwidth consumption. To overcome these drawbacks of HMIPv6, we propose a history-based auxiliary mobility management strategy (H-HMIPv6) to enable an MN to selectively switch its mobility management protocols according to whether it is currently in its home cell or not in HMIPv6 networks. The operation of H-HMIPv6 is almost the same as that of HMIPv6 except either when an MN enters/leaves its home cell or while it stays in its home cell. Once an MN knows using its history that it enters its home cell, it behaves as if it operates in Mobile IPv6 (MIPv6), not in HMIPv6, until it leaves its home cell; No periodic BU messages to the MAP and no packet tunneling occur during the MN's home cell residence time. The numerical results indicate that compared with HMIPv6, H-HMIPv6 has apparent potential to reduce the signaling bandwidth consumption and the MAP blocking probability.

  • Performance Comparison of Stepwise Serial and Parallel Cell Search in WCDMA

    Moon Kyou SONG  

     
    PAPER-Terrestrial Radio Communications

      Vol:
    E88-B No:6
      Page(s):
    2539-2547

    For three-step cell search in WCDMA, a stepwise serial scheme is conventionally employed, where each step of cell search operates in serial. In order to reduce the cell search time, a stepwise parallel scheme can be considered as a candidate for cell search, where each step operates in pipelined fashion. However, in the parallel scheme where the processing time in every step is equal, excessive accumulations are caused in step (1) and step (3) because the period of a code used for step (2) is much longer than that for the other steps. And it does not provide any gain because the effect becomes easily saturated with the number of accumulations. In this paper, the performance of parallel cell search is analyzed, and compared with that of serial cell search. Finally, it is shown that the performance of parallel cell search can be improved by adjusting the processing time in each step, based on the analytic results.

  • A Rapid and Reliable Signal Acquisition Scheme for Indoor UWB Systems

    Suckchel YANG  Jongok OH  Yoan SHIN  

     
    LETTER

      Vol:
    E88-A No:6
      Page(s):
    1538-1542

    We propose a rapid and reliable signal acquisition scheme for UWB (Ultra Wide Band) systems in indoor wireless environments. The proposed scheme is a two-step search with different thresholds and search windows, where each step utilizes the single-dwell search with the bit reversal. Simulation results show that the proposed scheme for the UWB signals can achieve significant reduction of the required mean acquisition time as compared to other schemes including general double-dwell search scheme for various threshold levels. Furthermore, it is also observed that the proposed scheme can achieve much faster and reliable signal acquisition as the first threshold is larger in noisy environments.

  • Prioritized Call Admission Control of Multiservice Hierarchical Wireless Networks

    Shun-Ping CHUNG  Min-Tsang LI  

     
    PAPER-Terrestrial Radio Communications

      Vol:
    E88-B No:6
      Page(s):
    2566-2577

    Call admission control of multiservice hierarchical wireless networks supporting soft handoff is studied, where users with different average call holding times are assigned to different layers, i.e., microcells in the lower layer are used to carry users with shorter call holding time, whereas macrocells in the upper layer are for users with longer call holding time. Further, to give handoff calls priority over new calls, handoff queues are provided for handoff calls that can not obtain the required channel immediately. According to whether handoff queues are provided in microcells and/or macrocells, four different call admission control schemes are proposed and studied. We derive the mathematical model of the considered system with multi- dimensional Markov process, and find the steady state probability distribution iteratively and thus the performance measures of interest: new call blocking probability, forced termination probability, and mean waiting time in handoff queue. Analytical results show that providing handoff queues in both microcells and macrocells can achieve the best blocking performance at the expense of mean waiting time in handoff queue.

  • A Cycle Search Algorithm Based on a Message-Passing for the Design of Good LDPC Codes

    Sang Hyun LEE  Kwang Soon KIM  Yun Hee KIM  Jae Young AHN  

     
    PAPER-Coding Theory

      Vol:
    E88-A No:6
      Page(s):
    1599-1604

    A cycle search algorithm based on a message-passing in a Tanner graph is proposed for designing good LDPC codes. By applying the message-passing algorithm with a message alphabet composed of only two messages to a cycle search, we can perform a cycle search with less computational complexity than tree-based search algorithms. Also, the proposed algorithm can be easily implemented by using an existing message-passing decoder and can easily adopt different kind of criteria for an LDPC code design with a slight modification in the node update equations.

  • The Optimum Fusion Splicing Conditions for a Large Mode Area Photonic Crystal Fiber

    Byung-Hyuk PARK  Jinchae KIM  Un-Chul PAEK  Byeong Ha LEE  

     
    PAPER-Optical Fibers, Cables and Fiber Devices

      Vol:
    E88-C No:5
      Page(s):
    883-888

    We report the empirically obtained conditions for the fusion splicing with photonic crystal fibers (PCF) having large mode areas. By controlling the arc-power and the arc-time of a conventional electric-arc fusion splicer, the splicing loss between two PCFs could be lowered down to 0.2 dB in average. For the splicing PCF with a conventional single mode fiber (SMF), the loss was increased due to the modal field mismatch, but still below 0.45 dB in average. The tensile strength was weakened by the splicing from 2.83 GPa down to 1.04 GPa for the PCF-PCF case and 0.89 GPa for the PCF-SMF one.

  • Torus Ring: Improving Interconnection Network Performance by Modifying Hierarchical Ring

    Jong Wook KWAK  Hyong Jin BAN  Chu Shik JHON  

     
    LETTER-Computer Systems

      Vol:
    E88-D No:5
      Page(s):
    1067-1071

    In this letter, we propose "Torus Ring", which is a modified version of 2-level hierarchical ring. The Torus Ring has the same complexity as the hierarchical rings, since the only difference is the way it connects the local rings. It has an advantage over the hierarchical ring when the destination of a packet is the adjacent local ring, especially to the backward direction. Although we assume that the destination of a network packet is uniformly distributed across the processing nodes, the average number of hops in Torus Ring is equal to that of the hierarchical ring. However, the performance gain of the Torus Ring is expected to increase, due to the spatial locality of the application programs in the real parallel programming environment. In the simulation results, latencies of the interconnection network are reduced by up to 19%, with moderate ring utilization ratios.

  • Noise-Analysis Based Threshold-Choosing Algorithm in Motion Estimation

    Xiaoying GAN  Shiying SUN  Wentao SONG  Bo LIU  

     
    LETTER-Multimedia Systems for Communications" Multimedia Systems for Communications

      Vol:
    E88-B No:4
      Page(s):
    1753-1755

    A novel threshold choosing method for the threshold-based skip mechanism is presented, in which the threshold is obtained from the analysis of the video device induced noise variance. Simulation results show that the proposed method can remarkably reduce the computation time consumption with only marginal performance penalty.

  • Performance Analysis of an Adaptive Hybrid Search Code Acquisition Algorithm for DS-CDMA Forward Links

    Hyung-Rae PARK  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E88-B No:4
      Page(s):
    1586-1593

    We analyze the performance of an adaptive hybrid search code acquisition algorithm for direct-sequence code division multiple access (DS-CDMA) systems under slowly-moving mobile environments. The code acquisition algorithm is designed to provide the desired feature of constant false alarm rate (CFAR) to cope with nonstationarity of interference in CDMA forward links. An analytical expression for the mean acquisition time is first derived and the probabilities of detection, miss, and false alarm are then obtained for frequency-selective Rayleigh fading environments. The fading envelope of a received signal is assumed to be constant over the duration of post-detection integration (PDI), which is most reasonable, especially for slowly-moving mobile environments. The performance of the designed code acquisition algorithm shall be evaluated numerically to examine the effect of some design parameters, such as the sub-window size, the size of the PDI, the decision thresholds in search and verification modes, and so on, considering IMT-2000 environments.

  • An Energy-Efficient Clustered Superscalar Processor

    Toshinori SATO  Akihiro CHIYONOBU  

     
    PAPER-Digital

      Vol:
    E88-C No:4
      Page(s):
    544-551

    Power consumption is a major concern in embedded microprocessors design. Reducing power has also been a critical design goal for general-purpose microprocessors. Since they require high performance as well as low power, power reduction at the cost of performance cannot be accepted. There are a lot of device-level techniques that reduce power with maintaining performance. They select non-critical paths as candidates for low-power design, and performance-oriented design is used only in speed-critical paths. The same philosophy can be applied to architectural-level design. We evaluate a technique, which exploits dynamic information regarding instruction criticality in order to reduce power. We evaluate an instruction steering policy for a clustered microarchitecture, which is based on instruction criticality, and find it is substantially energy-efficient while it suffers performance degradation.

  • Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor

    Takahiro SEKI  Satoshi AKUI  Katsunori SENO  Masakatsu NAKAI  Tetsumasa MEGURO  Tetsuo KONDO  Akihiko HASHIGUCHI  Hirokazu KAWAHARA  Kazuo KUMANO  Masayuki SHIMURA  

     
    PAPER-Digital

      Vol:
    E88-C No:4
      Page(s):
    520-527

    In this paper, a Dynamic Voltage and Frequency Management (DVFM) scheme introduced in a microprocessor for handheld devices with wideband embedded DRAM is reported. Our DVFM scheme reduces the power consumption effectively by cooperation of the autonomous clock frequency control and the adaptive supply voltage control. The clock frequency is controlled using hardware activity information to determine the minimum value required by the current processor load. This clock frequency control is realized without special power management software. The supply voltage is controlled according to the delay information provided from a delay synthesizer circuit, which consists of three programmable delay components, gate delay, RC delay and a rise/fall delay. The delay synthesizer circuit emulates the critical-path delay within 4% voltage accuracy over the full range of process deviation and voltage. This accurate tracking ability realizes the supply voltage scaling according to the fluctuation of the LSI's characteristic caused by the temperature and process deviation. The DVFM contributes not only the dynamic power reduction, but also the leakage power reduction. This microprocessor, fabricated in 0.18 µm CMOS embedded DRAM technology achieves 82% power reduction in a Personal Information Management scheduler (PIM) application and 40% power reduction in a MPEG4 movie playback application. As process technology shrinks, the DVFM scheme with leakage power compensation effect will become more important realizing in high-performance and low-power mobile consumer applications.

  • Invariant Range Image Multi-Pose Face Recognition Using Gradient Face, Membership Matching Score and 3-Layer Matching Search

    Seri PANSANG  Boonwat ATTACHOO  Chom KIMPAN  Makoto SATO  

     
    PAPER-Image Recognition, Computer Vision

      Vol:
    E88-D No:2
      Page(s):
    268-277

    The purpose of this paper is to present the novel technique to solve the recognition errors in invariant range image multi-pose face recognition. The scale, center and pose error problems were solved by using the geometric transform. Range image face data (RIFD) was obtained from a laser range finder and was used in the model to generate multi-poses. Each pose data size was reduced by linear reduction. The reduced RIFD was transformed to the gradient face model for facial feature image extraction and also for matching using the Membership Matching Score model. Using this method, the results from the experiment are acceptable although the size of gradient face image data is quite small (659 elements). Three-Layer Matching Search was the algorithm designed to reduce the access timing to the most accurate and similar pose position. The proposed algorithm was tested using facial range images from 130 people with normal facial expressions and without eyeglasses. The results achieved the mean success rate of 95.67 percent of 12 degrees up/down and left/right (UDLR) and 88.35 percent of 24 degrees UDLR.

  • The Extraction of Circles from Arcs Represented by Extended Digital Lines

    Euijin KIM  Miki HASEYAMA  Hideo KITAJIMA  

     
    PAPER-Image Processing and Video Processing

      Vol:
    E88-D No:2
      Page(s):
    252-267

    This paper presents a new fast and robust circle extraction method that is capable of extracting circles from images with complicated backgrounds. It is not based on the Hough transform (HT) that requires a time-consuming voting process. The proposed method uses a least-squares circle fitting algorithm for extracting circles. The arcs are fitted by extended digital lines that are extracted by a fast line extraction method. The proposed method calculates accurate circle parameters using the fitted arcs instead of evidence histograms in the parameter space. Tests performed on various real-world images show that the proposed method quickly and accurately extracts circles from complicated and heavily corrupted images.

  • Proposal of a Transformation Method for Iris Codes in Iris Scanning Verification

    Haruki OTA  Shinsaku KIYOMOTO  Toshiaki TANAKA  

     
    PAPER-Biometrics

      Vol:
    E88-A No:1
      Page(s):
    287-295

    In this paper, we propose a transformation function for a user's raw iris data, an "iris code" in iris scanning verification on the server, since the iris code requires to be hidden from even a server administrator. We then show that the user can be properly authenticated on the server, even though the iris code is transformed by the proposed function. The reason is that the function has a characteristic, "The (normalized) Hamming distances between the enrolled iris codes and the verified iris codes are conserved before and after the computation of the function," that is, the normalized Hamming distance in this scheme is equal to that in the existing scheme. We also show that the transformed iris code is sufficiently secure to hide the original iris code, even if a stronger attack model is supposed than the previously described model. That can be explained from the following two reasons. One reason is that nonlinear function, which consists of the three-dimensional rotation about the x-axis and the y-axis with the iris code lengthened bit by bit, and the cyclic shift, does not enable an attacker to conjecture the iris code. The other reason is that the success probabilities for the exhaustive search attack concerning the iris code in the supposed attack models are lower than those of the previously proposed methods and are negligible.

  • Fast Cell Search Algorithm for Overlay System with Cellular and Isolated Cells in Forward Link for OFCDM Broadband Wireless Access

    Motohiro TANNO  Hiroyuki ATARASHI  Kenichi HIGUCHI  Mamoru SAWAHASHI  

     
    PAPER-Cell Selection

      Vol:
    E88-B No:1
      Page(s):
    159-169

    This paper proposes a new cell-specific scrambling code (CSSC) assignment method and a fast cell search algorithm in the forward link for Orthogonal Frequency and Code Division Multiplexing (OFCDM) wireless access that are suitable for a system incorporating coexisting isolated and cellular cells. In the proposed method, one or some CSSC groups and thereby the CSSCs belonging to the CSSC groups are exclusively assigned to isolated cells. By detecting the best CSSC assigned to an isolated cell with higher priority than the cellular cells, the best cell including the isolated cell obtaining the minimum path loss can be detected far faster than by using the conventional cell search method, which employs uniform CSSC assignment. Computer simulation results show that by using the proposed cell search method together with the exclusive CSSC assignment to the isolated cells, the isolated-cell detection probability of approximately 90% is achieved at the cell boundary after the cell search time of 10 msec, while corresponding detection probability using conventional CSSC assignment is approximately 80% without notifying the user equipment of the cell type and its CSSC information of the surrounding cells via the broadcast channel, at the average received signal energy per bit-to-noise power spectrum density ratio (Eb/N0) of 10 dB for the common pilot channel (CPICH) in the cellular cells, when the transmission power ratio of the CPICH to the packet data channel (PDCH) for a one-code channel is RCPICH = 9 dB in a 20-cell layout model.

  • A Low-Power Architecture for Extended Finite State Machines Using Input Gating

    Shi-Yu HUANG  Chien-Jyh LIU  

     
    PAPER-Logic Synthesis

      Vol:
    E87-A No:12
      Page(s):
    3109-3115

    In this paper, we investigate a low-power architecture for designs modeled as an Extended Finite State Machine (EFSM). It is based on the general dynamic power management concept, in which the redundant computation can be dynamically disabled to reduce the overall power dissipation. The contribution of this paper is mainly a systematic procedure to identify almost maximal amount of redundant computation in a design given as an EFSM. There are two levels of redundant computation to be exploited--one is based on the machine state information, while the other is based on the transition information. After the extraction of the redundant computation, a low-power architecture using input gating is proposed to synthesize the final circuit. We tested the technique on a design computing a number's modulo inverse. Experimental results show that 31% power reduction can be achieved at the costs of 2% timing penalty and 16% area overhead.

781-800hit(1309hit)