ChoonKi AHN SooHee HAN WookHyun KWON
This letter presents robustness bounds (RBs) for receding horizon controls (RHCs) of uncertain systems. The proposed RBs are obtained easily by solving convex problems represented by linear matrix inequalities (LMIs). We show, by numerical examples, that the RHCs can guarantee robust stabilization for a larger class of uncertain systems than conventional linear quadratic regulators (LQRs).
Yuki DENDA Takanobu NISHIURA Yoichi YAMASHITA
This paper describes a new talker direction estimation method for front-end processing to capture distant-talking speech by using a microphone array. The proposed method consists of two algorithms: One is a TDOA (Time Delay Of Arrival) estimation algorithm based on a weighted CSP (Cross-power Spectrum Phase) analysis with an average speech spectrum and CSP coefficient subtraction. The other is a talker direction estimation algorithm based on ML (Maximum Likelihood) estimation in a time sequence of the estimated TDOAs. To evaluate the effectiveness of the proposed method, talker direction estimation experiments were carried out in an actual office room. The results confirmed that the talker direction estimation performance of the proposed method is superior to that of the conventional methods in both diffused- and directional-noise environments.
Masahiro NOMURA Taku OHSAWA Koichi TAKEDA Yoetsu NAKAZAWA Yoshinori HIROTA Yasuhiko HAGIHARA Naoki NISHI
This paper describes a newly developed automatic direction control scheme for bi-directional bus repeaters that uses dynamic collaborative driving techniques. Repeater directions are rapidly determined by detecting the direction of control signal propagation through an additional control signal line that is driven by dynamic collaborative drivers. Application to an on-chip peripheral bus reduces control circuit transistor counts by about 75% and the number of control signal lines by about 50% without loss of speed. Experimental results for a 0.18-µm CMOS implementation indicate that the proposed scheme is four times faster than a conventional scheme with no bi-directional bus repeaters.
Seokho YOON Suk Chan KIM Sun Yong KIM
Recently, a novel detector was proposed by the authors for code acquisition in non-Gaussian impulsive channels [3], which dramatically outperforms the conventional squared-sum detector; however, it requires exact knowledge of the non-Gaussian noise dispersion. In this paper, a robust detector is proposed, which employs the signs and ranks of the received signal samples, instead of their actual values, and so does not require knowledge of the non-Gaussian noise dispersion. The acquisition performance of the proposed detector is compared with that of the detector of [3] in terms of the mean acquisition time. The simulation results show that the proposed scheme is not only robust to deviations from the true value of the non-Gaussian noise dispersion, but also has comparable performance to that of the scheme of [3] using exact knowledge of the non-Gaussian noise dispersion.
Yoichi YUYAMA Akira TSUCHIYA Kazutoshi KOBAYASHI Hidetoshi ONODERA
In this paper, we propose alternate self shielding to remove critical transitions of on-chip global interconnect. Our proposed method alternates shield and signal wires cycle by cycle. The conventional self-shielding methods need additional wires to remove critical transition by encoding. The proposed alternate self-shielding, however, requires no additional wires. We evaluate our method by simulating signal transimission with a circuit simulator. As a result, our proposed method is superior in bit rate compared to others from 10% to 75%.
Jyh Perng FANG Yang-Shan TONG Sao Jie CHEN
In the floorplan design of System-on-Chip (SOC), Buffer Site Approach (BSA) has been used to relax the buffer congestion problem. However, for a floorplan with dominant wide bus, BSA may instead worsen the congestion. Our proposed Enhanced Buffer Site Approach (EBSA) extends existing BSA in a way that buffers of dominant wide bus can be distributed more evenly while reserving the same fast operation speed as BSA does. Experiments have been performed to integrate our model into an iterative floorplanning algorithm, and the results reveal that buffer congestion in a floorplan with dominant wide bus can be much abated.
Chao-Tung YANG Po-Chi SHIH Sung-Yi CHEN
Grid computing technologies enable large-scale aggregation and sharing of resources via wide-area networks. Grid technologies include elements such as security, job description, information gathering, scheduling, and resource dispatching, among others. In this paper, we address information gathering and focus on providing a domain-based model for network information measurement using Network Weather Service (NWS) on Grid computing environments.
In this letter, a new asynchronous Re-Order Buffer (ROB) with fully distributed control is proposed for an asynchronous on-chip bus. Due to the fully distributed control by each dedicated controller, the proposed ROB has high modularity and scalability. Simulation results show that the proposed asynchronous ROB can operate on an asynchronous on-chip bus of 2.01 Gbit/s throughput and 0.232 nJ power consumption per bus transaction.
Tetsuo KOSAKA Masaharu KATOH Masaki KOHDA
This paper introduces new methods of robust speech recognition using discrete-mixture HMMs (DMHMMs). The aim of this work is to develop robust speech recognition for adverse conditions that contain both stationary and non-stationary noise. In particular, we focus on the issue of impulsive noise, which is a major problem in practical speech recognition system. In this paper, two strategies were utilized to solve the problem. In the first strategy, adverse conditions are represented by an acoustic model. In this case, a large amount of training data and accurate acoustic models are required to present a variety of acoustic environments. This strategy is suitable for recognition in stationary or slow-varying noise conditions. The second is based on the idea that the corrupted frames are treated to reduce the adverse effect by compensation method. Since impulsive noise has a wide variety of features and its modeling is difficult, the second strategy is employed. In order to achieve those strategies, we propose two methods. Those methods are based on DMHMM framework which is one type of discrete HMM (DHMM). First, an estimation method of DMHMM parameters based on MAP is proposed aiming to improve trainability. The second is a method of compensating the observation probabilities of DMHMMs by threshold to reduce adverse effect of outlier values. Observation probabilities of impulsive noise tend to be much smaller than those of normal speech. The motivation in this approach is that flooring the observation probability reduces the adverse effect caused by impulsive noise. Experimental evaluations on Japanese LVCSR for read newspaper speech showed that the proposed method achieved the average error rate reduction of 48.5% in impulsive noise conditions. Also the experimental results in adverse conditions that contain both stationary and impulsive noises showed that the proposed method achieved the average error rate reduction of 28.1%.
Yuan-Long JEANG Jer-Min JOU Win-Hsien HUANG
In this paper, a methodology based on a mix-mode interconnection architecture is proposed for constructing an application specific network on chip to minimize the total communication time. The proposed architecture uses a globally asynchronous communication network and a locally synchronous bus (or cross-bar or multistage interconnection network MIN). First, a local bus is given for a group of IP cores so that the communications within this local bus can be arranged to be exclusive in time. If the communications of some IP cores should be required to be completed within a given amount of time, then a non-blocking MIN or a crossbar switch should be made for those IP cores instead of a bus. Then, a communication ratio (CR) for each pair of local buses is provided by users, and based on the Huffman coding philosophy, a process is applied to construct a binary tree (BT) with switches on the internal nodes and buses on the leaves. Since the binary tree system is deadlock free (no cycle exists in any path), the router is just a relatively simple and cheap switch. Simulation results show that the proposed methodology and architecture of NOC is better on switching circuit cost and performance than the SPIN and the mesh architecture using our developed deadlock-free router.
Eun-Gu JUNG Jeong-Gun LEE Sang-Hoon KWAK Kyoung-Son JHANG Jeong-A LEE Dong-Soo HAR
A multiple-issue on-chip bus of a layered architecture in a Globally Asynchronous Locally Synchronous (GALS) design style, supporting in-order/out-of-order completion, is proposed in this letter. The throughput of the proposed on-chip bus is increased by 31.3% and 34.3%, while power consumption overhead is only 6.76% and 3.98%, respectively, as compared to an asynchronous single-issue on-chip bus.
Satoshi KOMATSU Masahiro FUJITA
Energy consumption is one of the most critical constraints in the current VLSI system designs. In addition, fault tolerance of VLSI systems will be also one of the most important requirements in the future shrunk VLSIs. This paper proposes practical low power and fault tolerant bus encoding methods in on-chip data transfer. The proposed encoding methods use the combination of simple low power code and fault tolerant code. Experimental results show that the proposed methods can reduce signal transitions by 23% on the bus with fault tolerance. In addition, circuit implementation results with bus signal swing optimization show the effectiveness of the proposed encoding methods. We show also the selection methodology of the optimum encoding method under the given requirements.
Md. Ifte Khairul HASAN Saburo TAKAHASHI Jun-ichi HAKODA Hideyuki UEHARA Mitsuo YOKOYAMA
In this study, we present a way to choose route selection metric while discovering a new route in ad hoc mobile networks. We have used link expiration time and busy rate to calculate the route cost. The route cost is compared to a threshold value to decide whether the traffic of the route is high or low. If it is high then the system chooses busy rate as a route selection metric to avoid traffic congestion and if it is low the link expiration time is used to select the longlasting route. We have examined the characteristics of the routing protocol by computer simulation and found that it over performs the conventional protocols.
Zhipeng ZHANG Toshiaki SUGIMURA Sadaoki FURUI
This paper proposes the application of tree-structured clustering to the processing of noisy speech collected under various SNR conditions in the framework of piecewise-linear transformation (PLT)-based HMM adaptation for noisy speech. Three kinds of clustering methods are described: a one-step clustering method that integrates noise and SNR conditions and two two-step clustering methods that construct trees for each SNR condition. According to the clustering results, a noisy speech HMM is made for each node of the tree structure. Based on the likelihood maximization criterion, the HMM that best matches the input speech is selected by tracing the tree from top to bottom, and the selected HMM is further adapted by linear transformation. The proposed methods are evaluated by applying them to a Japanese dialogue recognition system. The results confirm that the proposed methods are effective in recognizing digitally noise-added speech and actual noisy speech issued by a wide range of speakers under various noise conditions. The results also indicate that the one-step clustering method gives better performance than the two-step clustering methods.
Robust path following is an issue with practical importance to the ship industry. This paper studies the robust tracking problem for an underactuated navigator. The global robust controller is proposed to force the navigator to follow any smooth time-varying trajectory, despite the existence of the environmental disturbances. It is verified that the tracking errors are ultimately confined to an arbitrarily small ball of the origin.
Zhi Liang WANG Osami WADA Takashi HARADA Takahiro YAGUCHI Yoshitaka TOYOTA Ryuji KOGA
Power bus noise problem has become a major concern for both EMC engineers and board designers. A fast algorithm, based on the cavity-mode model, was employed for analyzing resonance characteristics of multilayer power bus stacks interconnected by vias. The via is modeled as an inductance and its value is given by a simple expression. Good agreement between the simulated results and measurements demonstrates the effectiveness of the cavity-mode model, together with the via model.
Jan ANGUITA Javier HERNANDO Alberto ABAD
Jacobian Adaptation (JA) has been successfully used in Automatic Speech Recognition (ASR) systems to adapt the acoustic models from the training to the testing noise conditions. In this work we present an improvement of JA for speaker verification, where a specific training noise reference is estimated for each speaker model. The new proposal, which will be referred to as Model-dependent Noise Reference Jacobian Adaptation (MNRJA), has consistently outperformed JA in our speaker verification experiments.
Chi-Ho KIM Bum-Jae YOU Hagbae KIM
In this paper, we propose a technique for detection and real-time tracking of moving targets. This uses a color segmentation algorithm robust to irregular illumination variation and a line-based tracker. The former is based on statistical representation of a color. And, we can obtain a real-time property for detection and tracking of moving targets from the latter.
Takahiro SEKI Satoshi AKUI Katsunori SENO Masakatsu NAKAI Tetsumasa MEGURO Tetsuo KONDO Akihiko HASHIGUCHI Hirokazu KAWAHARA Kazuo KUMANO Masayuki SHIMURA
In this paper, a Dynamic Voltage and Frequency Management (DVFM) scheme introduced in a microprocessor for handheld devices with wideband embedded DRAM is reported. Our DVFM scheme reduces the power consumption effectively by cooperation of the autonomous clock frequency control and the adaptive supply voltage control. The clock frequency is controlled using hardware activity information to determine the minimum value required by the current processor load. This clock frequency control is realized without special power management software. The supply voltage is controlled according to the delay information provided from a delay synthesizer circuit, which consists of three programmable delay components, gate delay, RC delay and a rise/fall delay. The delay synthesizer circuit emulates the critical-path delay within 4% voltage accuracy over the full range of process deviation and voltage. This accurate tracking ability realizes the supply voltage scaling according to the fluctuation of the LSI's characteristic caused by the temperature and process deviation. The DVFM contributes not only the dynamic power reduction, but also the leakage power reduction. This microprocessor, fabricated in 0.18 µm CMOS embedded DRAM technology achieves 82% power reduction in a Personal Information Management scheduler (PIM) application and 40% power reduction in a MPEG4 movie playback application. As process technology shrinks, the DVFM scheme with leakage power compensation effect will become more important realizing in high-performance and low-power mobile consumer applications.
This study proposes a novel adaptive fuzzy control methodology to remove disadvantages of traditional fuzzy approximation based control. Meanwhile, the highly uncertain robot manipulator is taken as an application with either guaranteed robust tracking performances or asymptotic stability in a global sense. First, the design concept, namely, feedforward fuzzy approximation based control, is introduced for a simple uncertain system. Here the desired commands are utilized as the inputs of the Takagi-Sugeno (T-S) fuzzy system to closely compensate the unknown feedforward term required during steady state. Different to traditional works, the assumption on bounded fuzzy approximation error is not needed, while this scheme allows easier implementation architecture. Next, the concept is extended to controlling manipulators and achieves global robust tracking performances. Note that a linear matrix inequality (LMI) technique is applied and provides an easier gain design. Finally, numerical simulations are carried out on a two-link robot to illustrate the expected performances.