This paper proposes multi-gate reconfigurable (RECON) cells and a technology remapping approach using them as spare cells for post-mask functional engineering change orders (ECOs). With the rapid increase in circuit complexity, ECOs often occur in the post-mask stage of LSI designs. To deal with post-mask ECOs at a low cost, only the metal layers are redesigned by making functional changes using spare cells. For this purpose, 2T/4T/6T-RECON cells were proposed as reconfigurable spare cells. However, conventional RECON cells are used to implement single functions, which may result in unused transistors in the cells. In addition, the number of 2T/4T/6T-RECON spare cells used for post-mask ECOs varies greatly depending on the circuit to be implemented and the type of ECO that occurs. Therefore, functional ECOs may fail due to a lack of certain types of RECON cells, even if other types of RECON cells remain. To solve this problem, we propose multi-gate RECON cells that implement multiple functions in a single RECON cell while retaining the layouts of conventional 4T/6T-RECON base cells, and a technology remapping approach using them. The proposed approach not only reduces the number of used spare cells for modifications but also allows the flexible use of spare cells to fix them with less increase in wire length and delay. Experimental results have confirmed that the functional ECO success ratio is increased by 4.8pt on average and the total number of used spare cells is reduced by 5.6% on average. It has also been confirmed that the increase in wire length is reduced by 17.4% on average and the decrease in slack is suppressed by 21.6% on average.

This paper focuses on a pseudorandom number generator called an NTU sequence for use in cryptography. The generator is defined with an m-sequence and Legendre symbol over an odd characteristic field. Since the previous researches have shown that the generator has maximum complexity; however, its bit distribution property is not balanced. To address this drawback, the author introduces dynamic mapping for the generation process and evaluates the period and some distribution properties in this paper.

Most quantum circuits require SWAP gate insertion to run on quantum hardware with limited qubit connectivity. A promising SWAP gate insertion method for blocks of commuting two-qubit gates is a predetermined swap strategy which applies layers of SWAP gates simultaneously executable on the coupling map. A good initial mapping for the swap strategy reduces the number of required swap gates. However, even when a circuit consists of commuting gates, e.g., as in the Quantum Approximate Optimization Algorithm (QAOA) or trotterized simulations of Ising Hamiltonians, finding a good initial mapping is a hard problem. We present a SAT-based approach to find good initial mappings for circuits with commuting gates transpiled to the hardware with swap strategies. Our method achieves a 65% reduction in gate count for random three-regular graphs with 500 nodes. In addition, we present a heuristic approach that combines the SAT formulation with a clustering algorithm to reduce large problems to a manageable size. This approach reduces the number of swap layers by 25% compared to both a trivial and random initial mapping for a random three-regular graph with 1000 nodes. Good initial mappings will therefore enable the study of quantum algorithms, such as QAOA and Ising Hamiltonian simulation applied to sparse problems, on noisy quantum hardware with several hundreds of qubits.

Aiming at the problem of non-line of sight (NLOS) signal recognition for Ultra Wide Band (UWB) positioning, we utilize the concepts of Neural Network Clustering and Neural Network Pattern Recognition. We propose a classification algorithm based on self-organizing feature mapping (SOM) neural network batch processing, and a recognition algorithm based on convolutional neural network (CNN). By assigning different weights to learning, training and testing parts in the data set of UWB location signals with given known patterns, a strong NLOS signal recognizer is trained to minimize the recognition error rate. Finally, the proposed NLOS signal recognition algorithm is verified using data sets from real scenarios. The test results show that the proposed algorithm can solve the problem of UWB NLOS signal recognition under strong signal interference. The simulation results illustrate that the proposed algorithm is significantly more effective compared with other algorithms.

Permutation polynomials over finite fields have been widely studied due to their important applications in mathematics and cryptography. In recent years, 2-to-1 mappings over finite fields were proposed to build almost perfect nonlinear functions, bent functions, and the semi-bent functions. In this paper, we generalize the 2-to-1 mappings to m-to-1 mappings, including their construction methods. Some applications of m-to-1 mappings are also discussed.

The need for real-time use of human dynamics data is increasing. The technical requirements for this include improved databases for handling a large amount of data as well as highly accurate sensing of people's movements. A bitmap index format has been proposed for high-speed processing of data that spreads in a two-dimensional space. Using the same format is expected to provide a service that searches queries, reads out desired data, visualizes it, and analyzes it. In this study, we propose a coding format that enables human dynamics data to compress it in the target data size, in order to save data storage for successive increase of real-time human dynamics data. In the proposed method, the spatial population distribution, which is expressed by a probability distribution, is approximated and compressed using the one-pixel one-byte data format normally used for image coding. We utilize two kinds of approximation, which are accuracy of probability and precision of spatial location, in order to control the data size and the amount of information. For accuracy of probability, we propose a non-linear mapping method for the spatial distribution, and for precision of spatial location, we propose spatial scalable layered coding to refine the mesh level of the spatial distribution. Also, in order to enable additional detailed analysis, we propose another scalable layered coding that improves the accuracy of the distribution. We demonstrate through experiments that the proposed data approximation and coding format achieve sufficient approximation of spatial population distribution in the given condition of target data size.

This paper proposes out-of-bound signal demapping for lattice reduction-aided iterative linear receivers in overloaded MIMO channels. While lattice reduction aided linear receivers sometimes output hard-decision signals that are not contained in the modulation constellation, the proposed demapping converts those hard-decision signals into binary digits that can be mapped onto the modulation constellation. Even though the proposed demapping can be implemented with almost no additional complexity, the proposed demapping achieves more gain as the linear reception is iterated. Furthermore, we show that the transmission performance depends on bit mapping in modulations such as the Gray mapping and the natural mapping. The transmission performance is confirmed by computer simulation in a 6 × 2 MIMO system, i.e., the overloading ratio of 3. One of the proposed demapping called “modulo demapping” attains a gain of about 2 dB at the packet error rate (PER) of 10-1 when the 64QAM is applied.

A series of Binarized Neural Networks (BNNs) show the accepted accuracy in image classification tasks and achieve the excellent performance on field programmable gate array (FPGA). Nevertheless, we observe existing designs of BNNs are quite time-consuming in change of the target BNN and acceleration of a new BNN. Therefore, this paper presents FCA-BNN, a flexible and configurable accelerator, which employs the layer-level configurable technique to execute seamlessly each layer of target BNN. Initially, to save resource and improve energy efficiency, the hardware-oriented optimal formulas are introduced to design energy-efficient computing array for different sizes of padded-convolution and fully-connected layers. Moreover, to accelerate the target BNNs efficiently, we exploit the analytical model to explore the optimal design parameters for FCA-BNN. Finally, our proposed mapping flow changes the target network by entering order, and accelerates a new network by compiling and loading corresponding instructions, while without loading and generating bitstream. The evaluations on three major structures of BNNs show the differences between inference accuracy of FCA-BNN and that of GPU are just 0.07%, 0.31% and 0.4% for LFC, VGG-like and Cifar-10 AlexNet. Furthermore, our energy-efficiency results achieve the results of existing customized FPGA accelerators by 0.8× for LFC and 2.6× for VGG-like. For Cifar-10 AlexNet, FCA-BNN achieves 188.2× and 60.6× better than CPU and GPU in energy efficiency, respectively. To the best of our knowledge, FCA-BNN is the most efficient design for change of the target BNN and acceleration of a new BNN, while keeps the competitive performance.

An efficient hardware implementation for Simultaneous Localization and Mapping (SLAM) methods is of necessity for mobile autonomous robots with limited computational resources. In this paper, we propose a resource-efficient FPGA implementation for accelerating scan matching computations, which typically cause a major bottleneck in 2D LiDAR SLAM methods. Scan matching is a process of correcting a robot pose by aligning the latest LiDAR measurements with an occupancy grid map, which encodes the information about the surrounding environment. We exploit an inherent parallelism in the Rao-Blackwellized Particle Filter (RBPF) based algorithm to perform scan matching computations for multiple particles in parallel. In the proposed design, several techniques are employed to reduce the resource utilization and to achieve the maximum throughput. Experimental results using the benchmark datasets show that the scan matching is accelerated by 5.31-8.75× and the overall throughput is improved by 3.72-5.10× without seriously degrading the quality of the final outputs. Furthermore, our proposed IP core requires only 44% of the total resources available in the TUL Pynq-Z2 FPGA board, thus facilitating the realization of SLAM applications on indoor mobile robots.

As NAND flash-based storage has been settled, a flash translation layer (FTL) has been in charge of mapping data addresses on NAND flash memory. Many FTLs implemented various mapping schemes, but the amount of mapping data depends on the mapping level. However, the FTL should contemplate mapping consistency irrespective of how much mapping data dwell in the storage. Furthermore, the recovery cost by the inconsistency needs to be considered for a faster storage reboot time. This letter proposes a novel method that enhances the consistency for a page-mapping level FTL running a legacy logging policy. Moreover, the recovery cost of page mappings also decreases. The novel method is to adopt a virtually-shrunk segment and deactivate page-mapping logs by assembling and storing the segments. This segment scheme already gave embedded NAND flash-based storage enhance its response time in our previous study. In addition to that improved result, this novel plan maximizes the page-mapping consistency, therefore improves the recovery cost compared with the legacy page-mapping FTL.

Offset quadrature amplitude modulation based orthogonal frequency division multiplexing (OFDM/OQAM) is a promising multi-carrier modulation technique to achieve a low-sidelobe spectrum while maintaining orthogonality among subcarriers. However, a major shortcoming of OFDM/OQAM systems is the high peak-to-average power ratio (PAPR) of the transmit signal. To resolve the high-PAPR issue of traditional OFDM, a self-synchronized-scrambler-based selected-mapping has been investigated, where the transmit sequence is scrambled to reduce PAPR. In this method, the receiver must use a descrambler to recover the original data. However, the descrambling process leads to error propagation, which degrades the bit error rate (BER). As described herein, a partial scrambling overlapped selected mapping (PS-OSLM) scheme is proposed for PAPR reduction of OFDM/OQAM signals, where candidate sequences are generated using partial scrambling of original data. The best candidate, the one that minimizes the peak amplitude within multiple OFDM/OQAM symbols, is selected. In the proposed method, an overlap search algorithm for SLM is applied to reduce the PAPR of OFDM/OQAM signals. Numerical results demonstrate that our PS-OSLM proposal achieves better BER than full-scrambling overlapped SLM (FS-OSLM) in OFDM/OQAM systems while maintaining almost equivalent PAPR reduction capability as FS-OSLM and better PAPR than SLM without overlap search. Additionally, we derive a theoretical lower bound expression for OFDM/OQAM with PS-OSLM, and clarify the effectiveness of the proposed scheme.

This study compared two extended concept mapping approaches and investigated the distribution of students' understanding and knowledge structure. The students in the experimental group used Extended Kit-Build (EKB), where a learner extends a concept map built by kit-building, and those in the control group utilized the Extended Scratch-Build (ESB), where a learner extends a concept map made by scratch-building. The results suggested that the experimental group had better achievements in both the original material and the additional material.

This paper discusses a static analysis problem, called absolute consistency problem, for relational schema mappings. A given schema mapping is said to be absolutely consistent if every source instance has a corresponding target instance. Absolute consistency is an important property because it guarantees that data exchange never fails for any source instance. Originally, for XML schema mappings, the absolute consistency problem was defined and its complexity was investigated by Amano et al. However, as far as the authors know, there are no known results for relational schema mappings. In this paper, we focus on relational schema mappings such that both the source and the target schemas have functional dependencies, under the assumption that mapping rules are defined by constant-free tuple-generating dependencies. In this setting, we show that the absolute consistency problem is in coNP. We also show that it is solvable in polynomial time if the tuple-generating dependencies are full and the size of the left-hand side of each functional dependency is bounded by some constant. Finally, we show that the absolute consistency problem is coNP-hard even if the source schema has no functional dependency and the target schema has only one; or each of the source and the target schemas has only one functional dependency such that the size of the left-hand side of the functional dependency is at most two.

The conventional linear or tiled address maps can degrade performance and memory utilization when traffic patterns are not matched with an underlying address map. The address map is usually fixed at design time. Accordingly, it is difficult to adapt to given applications. Modern embedded system usually accommodates memory management units (MMUs). As a result, depending on virtual address patterns, the system can suffer from performance overheads due to page table walks. To alleviate this performance overhead, we propose to cluster and rearrange tiles to construct an MMU-aware configurable address map. To construct the clustered tiled map, the generic tile number remapping algorithm is presented. In the presented scheme, an address map is configured based on the adaptive dimensioning algorithm. Considering image processing applications, a design, an analysis, an implementation, and simulations are conducted. The results indicate the proposed method can improve the performance and the memory utilization with moderate hardware costs.

Inter-node communication is essential in parallel computation. The performance of parallel processing depends on the efficiencies in both computation and communication, thus, the communication cost is not negligible. A parallel application program involves a logical communication structure that is determined by the interchange of data between computation nodes. Sometimes the logical communication structure mismatches to that in a real parallel machine. This mismatch results in large communication costs. This paper addresses the node-mapping problem that rearranges logical position of node so that the degree of mismatch is decreased. This paper assumes that parallel programs execute one or more collective communications that follow specific traffic patterns. An appropriate node-mapping achieves high communication performance. This paper proposes a strong heuristic method for solving the node-mapping problem and adapts the method to a genetic algorithm. Evaluation results reveal that the proposed method achieves considerably high performance; it achieves 8.9 (4.9) times speed-up on average in single-(two-)traffic-pattern cases in 32×32 torus networks. Specifically, for some traffic patterns in small-scale networks, the proposed method finds theoretically optimized solutions. Furthermore, this paper discusses in deep about various issues in the proposed method that employs genetic algorithm, such as population of genes, number of generations, and traffic patterns. This paper also discusses applicability to large-scale systems for future practical use.

We propose a novel hue-preserving tone mapping scheme. Various tone mapping operations have been studied so far, but there are very few works on color distortion caused in image tone mapping. First, LDR images produced from HDR ones by using conventional tone mapping operators (TMOs) are pointed out to have some distortion in hue values due to clipping and rounding quantization processing. Next,we propose a novel method which allows LDR images to have the same maximally saturated color values as those of HDR ones. Generated LDR images by the proposed method have smaller hue degradation than LDR ones generated by conventional TMOs. Moreover, the proposed method is applicable to any TMOs. In an experiment, the proposed method is demonstrated not only to produce images with small hue degradation but also to maintain well-mapped luminance, in terms of three objective metrics: TMQI, hue value in CIEDE2000, and the maximally saturated color on the constant-hue plane in the RGB color space.

Multiple patterning lithography allows fine patterns beyond lithography limit, but it suffers from a large process cost. In this paper, we address a method to reduce the number of V0 masks; it consists of two sub-problems. First, stitch-induced via (SIV) is introduced to reduce the number of V0 masks. It involves the redesign of standard cells to replace some vias in V0 layer with SIVs, such that the remaining vias can be assigned to the reduced masks. Since SIV formation requires metal stitches in different masks, SIV replacement and metal mask assignment should be solved simultaneously. This sub-problem is formulated as integer linear programming (ILP). In the second sub-problem, inter-row via conflict aware detailed placement is addressed. Single row placement optimization is performed for each row to remove metal and inter-row via conflicts, while minimizing cell displacements. Since it is time consuming to consider many cell operations at once, we apply a few operations iteratively, where different operations are applied to each iteration and to each cell depending on whether the cell has a conflict in the previous iteration. Remaining conflicts are then removed by mapping conflict cells to white spaces. To this end, we minimize the number of cells to move and maximize the number of large white spaces before mapping. Experimental results demonstrate that the cell placement with two V0 masks is completed by proposed methods, with 7 times speedup and 21% reduction in total cell displacement, compared to conventional detailed placement.

In this paper, we propose an enhanced selected mapping (e-SLM) technique to improve the performance of OFDM-PLC systems under impulsive noise. At the transmitter, the best transmit sequence is selected from among possible candidates so as to minimize the weighted sum of transmit signal peak power and the estimated receive one, where the received signal peak power is estimated at the transmitter using channel state information (CSI). At the receiver, a nonlinear blanking is applied to hold the impulsive noise under a given threshold, where impulsive noise detection accuracy is improved by the proposed e-SLM. We evaluate the probability of false alarms raised by impulsive noise detection and bit error rate (BER) of OFDM-PLC system using the proposed e-SLM. The results show the effectiveness of the proposed method in OFDM-PLC system compared with the conventional blanking technique.

An HDR (High Dynamic Range) image synthesis is a method which is to photograph scenes with wide luminance range and to reproduce images close to real visual scenes on an LDR (Low Dynamic Range) display. In general, HDR images are reproduced by taking images with various camera exposures and using the tone synthesis of several images. In this paper, we propose an HDR image tone mapping method based on a visual brightness function using dual exposed images and a synthesis algorithm based on local surround. The proposed algorithm has improved boundary errors and color balance compared with existing methods. Also, it improves blurring and noise amplification due to image mixing.

Flash storage suffers from severe performance degradation due to its inherent internal synchronization overhead. Especially, flushing an L2P (logical address to physical address) mapping table significantly contributes to the performance degradation. To relieve the problem, we propose an efficient L2P mapping table management scheme on the flash storage, which works along with a small-sized NVRAM. It flushes L2P mapping table from DRAM to NVRAM or flash memory selectively. In our experiments, the proposed scheme shows up to 9.37× better performance than conventional schemes.