Reed-Solomon (RS) codes are widely used in digital communication and storage systems. Unlike usual VLSI approaches, this paper presents a high throughput fully programmable Reed-Solomon decoder on a multi-core processor. The multi-core processor platform is a 2-Dimension mesh array of Single Instruction Multiple Data (SIMD) cores, and it is well suited for digital communication applications. By fully extracting the parallelizable operations of the RS decoding process, we propose multiple optimization techniques to improve system throughput, including: task level parallelism on different cores, data level parallelism on each SIMD core, minimizing memory access, and route length minimized task mapping techniques. For RS(255, 239, 8), experimental results show that our 12-core implementation achieve a throughput of 4.35 Gbps, which is much better than several other published implementations. From the results, it is predictable that the throughput is linear with the number of cores by our approach.

In this paper, we introduce a construction of 16-QAM sequences based on known binary sequences using multiple sequences, interleaved sequences and Gray mappings. Five kinds of binary sequences of period N are put into the construction to get five kinds of new 16-QAM sequences of period 4N. These resultant sequences have 5-level autocorrelation {0, ±8, ±8N}, where ±8N happens only once each. The distributions of the periodic autocorrelation are also given. These will provide more choices for many applications.

The proper allocation of network resources from a common physical substrate to a set of virtual networks (VNs) is one of the key technical challenges of network virtualization. While a variety of state-of-the-art algorithms have been proposed in an attempt to address this issue from different facets, the challenge still remains in the context of large-scale networks as the existing solutions mainly perform in a centralized manner which requires maintaining the overall and up-to-date information of the underlying substrate network. This implies the restricted scalability and computational efficiency when the network scale becomes large. This paper tackles the virtual network mapping problem and proposes a novel hierarchical algorithm in conjunction with a substrate network decomposition approach. By appropriately transforming the underlying substrate network into a collection of sub-networks, the hierarchical virtual network mapping algorithm can be carried out through a global virtual network mapping algorithm (GVNMA) and a local virtual network mapping algorithm (LVNMA) operated in the network central server and within individual sub-networks respectively with their cooperation and coordination as necessary. The proposed algorithm is assessed against the centralized approaches through a set of numerical simulation experiments for a range of network scenarios. The results show that the proposed hierarchical approach can be about 5-20 times faster for VN mapping tasks than conventional centralized approaches with acceptable communication overhead between GVNCA and LVNCA for all examined networks, whilst performs almost as well as the centralized solutions.

In this paper, to reduce the memory size requirements of IFFT for OFDM-based applications, we propose a new IFFT design technique based on a combined integer mapping of three IFFT input signals: modulated data, pilot and null signals. The proposed method focuses on reducing the size of memory cells in the first two stages of the single-path delay feedback (SDF) IFFT architectures since the first two stages require 75% of the total memory cells. By simulations of 2048-point IFFT design for cognitive radio systems, it is shown that the proposed IFFT design method achieves more than 13% reduction in gate count and 11% reduction in power consumption compared with conventional IFFT design.

Scalable Video Coding (SVC) was standardized as an extension of H.264/AVC with the intention to provide flexible adaptation to heterogeneous networks and different end-user requirements, which provides great scalability in multi-point applications such as video conferencing. However, due to the existence of H.264/AVC-based systems, transcoding between AVC and SVC becomes necessary. Most existing works focus on temporal transcoding, quality transcoding or SVC-to-AVC spatial transcoding while the straightforward re-encoding method requires high computational cost. This paper proposes a low-complexity AVC-to-SVC spatial transcoder based on coarse-level mode mapping for video conferencing scenes. First, to omit unnecessary motion estimations (ME) for layers with reduced resolution, an ME skipping scheme based on AVC mode distribution is proposed with an adaptive search range. Then a probability-profile based scheme is proposed for further mode skipping. After that 3 coarse-level mode-mapping methods are presented for fast mode decision and the adaptive usage of the 3 methods is discussed. Finally, motion vector (MV) refinement is introduced for further lower-layer time reduction. As for the top layer, direct encapsulation is proposed to preserve better quality and another scheme involving inter-layer predictions is also provided for bandwidth-crucial applications. Simulation results show that proposed transcoder achieves up to 92.6% time reduction without significant coding efficiency loss compared to re-encoding method.

A new codebook mapping algorithm for artificial bandwidth extension (ABE) is introduced in this paper. We design a wideband line spectrum pair (LSP) codebook which is coupled with the same index as the LSP codebook of a narrowband speech codec. The received narrowband LSP codebook indices are used to directly induce wideband LSP codewords. Thus, the proposed scheme eliminates codebook search processing to estimate the wideband spectrum envelope. We apply the proposed scheme to bandwidth extension in adaptive multi-rate (AMR) compressed domain. Its performance is assessed via the perceptual evaluation of speech quality (PESQ), informal listening tests, and weighted million operations per second (WMOPS) calculations.

This paper proposes a low power artificial bandwidth extension (ABE) technique that reduces computational complexity by introducing a fast codebook mapping method. We also introduce a weighted classified codebook mapping method for constructing the spectral envelope of the wideband speech signal. Classified codebooks are used to reduce spectrum mapping errors caused by characteristic difference among voiced, unvoiced and onset sound. The weighted distortion measure is also used to handle the spectral sensibility. The performance of the proposed ABE system is evaluated by a spectral distortion (SD), a perceptual evaluation of speech quality (PESQ), informal listening tests and weighted million operations per second (WMOPS) calculations. With the use of fast codebook mapping, the WMOPS complexity of the codebook mapping module is reduced by 45.17%.

Numerical analysis of the photoinductive (PI) field mapping technique for characterizing the eddy-current (EC) probes with tilted coils above a thin metal film was investigated using a two-dimensional transient finite element method (FEM). We apply the FEM model of PI method to observe the influence of metal film materials on the field-mapping images used to characterize EC probes. The effects of film thickness on the PI mapping signal are also shown and discussed. The simulation results using the proposed model showed that the PI signals largely depend on the thermal conductivity and the thickness of the thin metal film. The field-mapping signals using the appropriate actual metal film material for EC probe coil with 0°, 5°, 10°, 15°, and 20° tilt angle are also examined. We demonstrate that the higher resolution in field-mapping images of commercial EC probes can be obtained by given higher thermal conductivity and thinner thickness of metal film. The fundamental understanding of distinct field distribution will aid in the selection of the higher-quality EC probe for accurate inspection with EC testing.

A combination of single-carrier frequency-division mult-iple-access (SC-FDMA) and relay transmission is effective for performance improvement in uplink transmission. In SC-FDMA, a mapping strategy of user's spectrum has an enormous impact on system performance. In the relay communication, the optimum mapping strategy may differentiate from that in direct communication because of the independently distributed channels among nodes. In this letter, how each link should be considered in subcarrier mapping is studied and the impact of mapping strategies on the average bit error rate (BER) performance of single-user SC-FDMA relay communications will be given.

High Dynamic Range (HDR) images have been widely applied in daily applications. However, HDR image is a special format, which needs to be pre-processed known as tone mapping operators for display. Since the visual quality of HDR images is very sensitive to luminance value variations, conventional watermarking methods for low dynamic range (LDR) images are not suitable and may even cause catastrophic visible distortion. Currently, few methods for HDR image watermarking are proposed. In this paper, two watermarking schemes targeting HDR images are proposed, which are based on µ-Law and bilateral filtering, respectively. Both of the subjective and objective qualities of watermarked images are greatly improved by the two methods. What's more, these proposed methods also show higher robustness against tone mapping operations.

The approximately synchronized code-division multiple-access (CDMA) communication system, using the QAM sequences with zero correlation zone (ZCZ) as its spreading sequences, not only can remove the multiple access interference (MAI) and multi-path interference (MPI) synchronously, but also has a higher transmission data rate than the one using traditional ZCZ sequences with the same sequence length. Based on Gray mapping and the known binary ZCZ sequences, in this letter, six families of 16-QAM sequences with ZCZ are presented. When the binary ZCZ sequences employed by this letter arrive at the theoretical bound on the binary ZCZ sequences, and their family size is a multiple of 4 or 2, two of the resultant six 16-QAM sequence sets satisfy the bound referred to above as well.

In this correspondence, a new method to extend the number of quaternary low correlation zone (LCZ) sequence sets is presented. Based on the inverse Gray mapping and a binary sequence with ideal two-level auto-correlation function, numbers of quaternary LCZ sequence sets can be generated by choosing different parameters. There is at most one sequence cyclically equivalent in different LCZ sequence sets. The parameters of LCZ sequence sets are flexible.

In this paper, a new construction method of quaternary sequences of even period 2N having the ideal autocorrelation and balance properties is proposed. These quaternary sequences are constructed by applying the inverse Gray mapping to binary sequences of odd period N with the ideal autocorrelation. Autocorrelation distribution of the proposed quaternary sequences is derived. These sequences can be used to construct quaternary sequence families of even period 2N. Family size and the maximum absolute value of correlation spectrum of the proposed quaternary sequence families are also derived.

Post-silicon debugging is getting even more critical to shorten the time-to-market than ever, as many more bugs escape pre-silicon verification according to the increasing design scale and complexity. Post-silicon debugging is generally harder than pre-silicon debugging due to the limited observability and controllability of internal signal values. Conventionally, simulation of corresponding low-level designs such as RTL or gate-level has been used to get observability and controllability, which is inefficient for contemporary large designs. In this paper, we introduce a post-silicon debugging approach using simulation of high-level designs, instead of low-level designs. To realize such a debugging approach, we propose an I/O sequence mapping method that converts I/O sequences of chip executions to those of the corresponding high-level design. First, we provide a formal definition of I/O sequence mapping and relevant notions. Then, based on the definition, we propose an I/O sequence mapping method by executing FSMs representing the interface specifications of the target design. Also, we propose an implementation of the proposed method to get further efficiency. We demonstrate that the proposed method can be effectively applied to several practical design examples with various interfaces.

Network on Chip (NoC) is proposed as a new intra-chip communication infrastructure. In current NoC design, one related problem is mapping IP cores onto NoC architectures. In this paper, we propose a performance-aware hybrid algorithm (PHA) for mesh-based NoC to optimize performance indexes such as latency, energy consumption and maximal link bandwidth. The PHA is a hybrid algorithm, which integrates the advantages of Greedy Algorithm, Genetic Algorithm and Simulated Annealing Algorithm. In the PHA, there are three features. First, it generates a fine initial population efficiently in a greedy swap way. Second, effective global parallel search is implemented by genetic operations such as crossover and mutation, which are implemented with adaptive probabilities according to the diversity of population. Third, probabilistic acceptance of a worse solution using simulated annealing method greatly improves the performance of local search. Compared with several previous mapping algorithms such as MOGA and TGA, simulation results show that our algorithm enhances the performance by 30.7%, 23.1% and 25.2% in energy consumption, latency and maximal link bandwidth respectively. Moreover, simulation results demonstrate that our PHA approach has the highest convergence speed among the three algorithms. These results show that our proposed mapping algorithm is more effective and efficient.

On uniformly convex real Banach spaces, a fixed point theorem in weak topology for successively recurrent system of fuzzy-set-valued nonlinear mapping equations and its application to ring nonlinear network systems are theoretically discussed in detail. An arbitrarily-level likelihood signal estimation is then established.

In this paper, we propose a coding algorithm for High Dynamic Range Images (HDRI). Our encoder applies a tone mapping model based on scaled µ-Law encoding, followed by a conventional Low Dynamic Range Image (LDRI) encoder. The tone mapping model is designed to minimize the difference between the tone-mapped HDRI and its LDR version. By virtue of the nature of the µ-Law model, not only the quality of the HDRI but also the one of the LDRI is improved, compared with a state of the art in conventional HDRI coding methods. Furthermore the error limit caused by our encoding is theoretically analyzed.

In this paper we propose a new tone mapping method for HDR video. Two types of gamma tone mapping are blended to preserve local contrast in the entire range of luminance. Our method achieves high quality tone mapping especially for the HDR video that has a nonlinear response to scene radiance. Additionally, we apply it to an object-aware tone mapping method for camera surveillance. This method achieves high visibility of target objects in the tone mapped HDR video. We examine the validity of our methods through simulation and comparison with conventional work.

Recently, we have proposed using a Linear Array Pipeline Processor (LAPP) to improve energy efficiency for various workloads such as image processing and to maintain programmability by working on VLIW codes. In this paper, we proposed an instruction mapping scheme for LAPP to fully exploit the array execution of functional units (FUs) and bypass networks by a mapper to fit the VLIW codes onto the FUs. The mapping can be finished within multi-cycles during a data prefetch before the array execution of FUs. According to an HDL based implementation, the hardware required for mapping scheme is 84% of the cost introduced by a baseline method. In addition, the proposed mapper can further help to shrink the size of array stage, as our results show that their combination becomes 88% of the baseline model in area.

Broadcasting information to users about new resource assignments generates a substantial mapping overhead. The mapping overhead influences the system throughput and, in particular, seriously affects the performance of voice-over-Internet protocol (VoIP) services. Persistent scheduling was introduced to reduce the mapping overhead. However, up to now no studies have mathematically analyzed the performance of the persistent scheduling. This paper develops analytical and simulation models and evaluates the performance of the persistent scheduling for VoIP services in mobile WiMAX systems.