A large-scale modular multicast ATM switch based on a three-stage Clos network architecture is proposed and its performance is studied in this paper. The complexity of our proposed switch is NN if the switch size is NN. The first stage of the proposed multicast switch consists of n sorting modules, where n=N. Each sorting module has n inputs and n outputs and is responsible for traffic distribution. The second and third stages consist of modified Knockout switches which are responsible for packet replication and switching. Although it is a multipath network, cell sequence is preserved because only output buffers are used in this architecture. The proposed multicast switch has the following advantages: 1) it is modular and suitable for large scale deployment; 2) no dedicated copy network is required since copying and switching are performed simultaneously; 3) two-stage packet replication is used which gives a maximum fan-out of n2; 4) translation tables are distributed which gives manageable table sizes; 5) high throughput performance for both uniform and nonuniform input traffic; 6) self-routing scheme is used. The performance of the switch under uniform and non-uniform input traffic is studied and numerical examples demonstrate that the cell loss probability is significantly improved when the distribution network is used. In a particular example, it is shown that for the largest cell loss probability in the second stage to be less then 10-11, the knockout expander, with the use of the distribution network, needs only be larger than 6. On the other hand, without the distribution network, the knockout expander must be larger than 13.

Multicasting is an important feature for any switching network being intended to support broadband integrated services digital networks (B-ISDN). This paper proposes an improved multicast packet switch based on Lee's nonblocking copy network. The improved design retains the desirable features of Lee's network including its nonblocking property while adopting techniques to overcome the various limitations mentioned in various literature. The proposed network architecture utilizes d-dilated banyan networks to increase the amount of cells that can be replicated within the copy network. Cell splitting is used to optimize the utilization of the network's available bandwidth. Furthermore, the proposed architecture allows for the modular expansion in capacity to accomodate changing traffic patterns. The modular design of the proposed switch likewise offers easy handling and replacement of faulty modules.

This paper describes the design and evaluation of a high-performance multicast ATM switch and its feasibility study, including its 40 Gbit/s LSI packaging. The multicast switch is constructed using a serial combination of rerouting networks and employs an adapted Boolean interval-splitting scheme for a generalized self-routing algorithm. Analysis and computer simulation results show that the cell loss probability is easily controlled by increasing the number of switching stages. It is shown that the switch configuration can be transformed into other patterns to be built from banyan-based subnetworks of arbitrary size for LSI packaging. It is also shown that an LSI chip integrating an 88 banyan-based subnetwork using 0. 25-µm CMOS/SIMOX technology can attain a 40-Gbit/s switching capability.

The address-based queues are widely used in shared buffer ATM switches to guarantee the order of the cell delivery. In this paper, we propose an address-based queue mechanism to achieve an efficient use of the shared memory under a multicast service. In the switch, both cells and the address queues share the common memory. Each queue length changes flexibly according to the number of the stored cells. Our approach significantly reduces the cell loss probability as compared with the previously proposed approaches.

Though causal order of message delivery simplifies the design and development of distributed applications, the overhead of enforcing it is not negligible. We claim that a causal order algorithm which does not send any redundant information is efficient in the sense of communication overhead. We characterize and classify the redundant information into four categories: information regarding just delivered, already delivered, just replaced, and already replaced messages. We propose an efficient causal multicast algorithm which prevents propagation of these redundant information. Our algorithm sends less amount of control information needed to ensure causal order than other existing algorithms and can also be applied to systems whose communication channels are not FIFO. Since our algorithm's communication overhead increases relatively slowly as the number of processes increases, it shows good scalability feature. The potential of our algorithm is shown by simulation study.

In this paper, we propose a new multicast routing algorithm for constructing the delay-constrained minimal spanning tree in the VP-based ATM networks, in which we consider the efficiency even in the case where the destination dynamically joins/departs the multicast connection. For constructing the delay-constrained spanning tree, we first generate a reduced network consisting of only VCX nodes from a given ATM network, originally consisting of VPX/VCX nodes. Then, we obtain the delay-constrained spanning tree with a minimal tree cost on the reduced network by using our proposed heuristic algorithm. Through numerical examples, we show that our dynamic multicast routing algorithm can provide an efficient usage of network resources when the membership nodes frequently changes during the lifetime of a multicast connection, while the existing multicast routing algorithm may be useful for constructing the multicast tree with a static nature of destination nodes. We also demonstrate that more cost-saving can be expected in dense networks when applying our proposed algorithm.

This paper proposes a general expansion architecture for constructing large-scale multicast ATM switches with any type of small multicast switch, called the multicast Universal Multistage Interconnection Network (multicast UniMIN). The proposed architecture consists of a buffered distribution network that can perform cell routing and replication simultaneously, and a column of output switch modules (OSMs). The adoption of channel grouping and virtual first-in-first-out (FIFO) buffers results in high delay/throughput performance, and the distributed lookup table scheme for multicast addressing greatly reduces the size of a single lookup table. Analytical and simulation results show that high delay/throughput performance is obtained for both unicast and multicast traffic, and the proposed architecture yields an even better performance for multicast traffic than for unicast traffic. In addition, the multicast UniMIN switch has such good features as modular expandability, simple hardware, and no internal speed-up operation.

We have developed a network architecture that achieves ATM multicast communication services with receiver-specified quality of service (QoS) guarantee which depends on the dynamic resource environment of the receivers (e.g. CPU capability, memory capability, and network capability). We propose two receiver-initiated QoS guarantee methods and concentrate on the functions required to achieve them. Moreover, on our ATM testbed, we also evaluate the performance of an experimental implementation of the proposed methods.

A multicast (point-to-multipoint) protocol of a satellite broadcast channel by a source and many destinations is presented and its performance characteristics are analyzed. We propose a new time-domain multicast scheme for packet satellite channels, retransmission via collisions protocol (called RVCP). RVCP is classified to the automatic repeat request (ARQ) of the multi-selective-repeat scheme and does not require individual channels for each receiving station to request for broadcast packets that have been received incorrectly. Our analytical models show that RVCP performs considerably better than the other protocols, particularly in the situation that packet error rate is less than 10-4 or there are a large number of destinations. It is an excellent characteristic of RVCP that the equipment of the source station need not increase in proportion to the number of destinations, too. And since RVCP is a relatively simple protocol, it is easy to be implemented.

A neural network approach called the "Gradual Neural Network (GNN)" for the time slot assignment problem in the TDM multicast switching system is presented in this paper. The goal of this NP-complete problem is to find an assignment of packet transmission requests into a minimum number of time slots. A packet can be transmitted from one source to several destinations simultaneously by its replication. A time slot represents a switching configuration of the system with unit time for each packet transmission through an I/O line. The GNN consists of the binary neural network and the gradual expansion scheme. The binary neural network satisfies the constraints imposed on the system by solving the motion equation, whereas the gradual expansion scheme minimizes the number of required time slots by gradually expanding activated neurons. The performance is evaluated through simulations in practical size systems, where the GNN finds far better solutions than the best existing altorithm.

In this paper, an efficient one-way point-to-multipoint communication protocol (PTMP) is proposed. The PTM protocol is helpful to distribute information to many workstations simultaneously and correctly. The PTM protocol is designed for network channels with low error possibility. The PTM protocol utilizes broadcast for data distributing. Re-transmission request for lost packet is returned to the server, and acknowledgment for correctly received packets is not returned to the server. We have applied the protocol to the network presentation system. The network presentation system is intended to display same graphical images to multiple workstations simultaneously on an X window system. This presentation system is able to provide services for at least forty X servers simultaneously, the capacity is limited to X server performance, except for pixmap drawing. For the case of pixmap drawing, the system capacity is limited to the network bandwidth. To solve network bandwidth problem, we combined PTM protocol with the network presentation system. With PTM protocol, system performance is improved and the use of network bandwidth is lowered.

This paper investigates the problem of constructing a logical multicasting tree which dispatches data to multiple destinations according to their bandwidth requirements. An optimization problem is formulated to minimize the maximum delay between a sender and multiple receivers. An algorithm of finding the optimum branching locations is presented. Performance analysis from the closed queueing network theory is given to evaluate a multicasting tree network based on this proposed algorithm.

One of the functions that should be provided in ATM LANs is multicast communication. For multicast communication on ATM LANs, the architecture of switch fabric and protocols for signaling have been studied. However, when data communication using a multicast connection such as LAN emulation service is provided, ABR service on a multicast connection (Multicast ABR) is also required. ABR service has been actively discussed in the ATM forum. Unfortunately, the study on flow control mechanism for Multicast ABR is not enough. This paper discusses the suitable flow control mechanism for Multicast ABR and shows its performance.

Asynchronous Transfer Mode (ATM) is considered to bo the key technology for realizing B-ISDN. This paper discusses current research on ATM switching nodes for high-speed communication networks. Although some ATM switching nodes have been deployed, much work continues for resolving problems as regards operations and maintainability, such as ATM layer performance evaluation including layered management scheme upon detection of line failure, function test methods regarding channel connectivity for multicasting, and real-time ATM traffic-monitoring mechanism with QoS control. To achieve sufficient ATM node maintainability, the ATM cell transfer quality on the VP and VC levels should be ensured both within the ATM nodes and between adjacent ATM nodes. Since ATM switching nods handle many kinds of virtual paths and virtual channels, each channel's connectivity must be confirmed. This paper proposes ATM layer performance evaluation concept, layered management scheme upon detection of line failure, function test methods for a multicast switch using test cells that periodically pass through pre-determined switching path routes. It also proposes the concept of test cell generation for simulating multiplexed ATM test cells taking ATM truffic characteristics into account. Furthermore, this paper describes a fault diagnosis scheme using test cells that can continually observe the entire ATM connection length in the system. A real-time traffic monitoring hardware configuration and an interface with software control are also discussed and it is clarified that the required functions can be realized by using commercially available DSPs.

A new ATM switch architecture, named shared multibuffering, features great advantages on memory access speed for a large switch, and overall size of buffer memories to achieve excellent cell-loss performance. We have developed a 622-Mb/s 88 shared multibuffer ATM switch with multicast functions and hierarchical queueing functions to accommodate 156-Mb/s, 622-Mb/s and 2.4-Gb/s interfaces. Implementation of the shared multibuffer ATM switch is described with respect to the four sorts of 0.8-µm BiCMOS LSIs and ATM switch boards. The switch board/type-1, with C1-LSI, allows to accommodate effectively 156-Mb/s and 622-Mb/s interfaces, which is suitable for an ATM access system. The switch board/type-2, with C2-LSI, can provide multicast functions and accommodate a 2.4-Gb/s interface. By using four switch boards, it is possible to apply them to a 2.4-Gb/s ATM loop system.

A multicast ATM switch with a new external copy module is proposed. The copy module, called copy-trunk, has two new functions to guarantee the QoS of P-MP cells: The delay priority control function and the output-cell-spacing control function. By using the delay priority control function, copied cells with high-priority are always released earlier than those with low-priority so as to avoid increasing the delay time of real-time traffic. The output-cell-spacing control function is used to reduce the burstiness of the output traffic. The output pattern is adaptively controlled by measuring the input load. The effects of these two controls are quantitatively described. The copy-trunk allows the multicast capability of a switch to be efficiently and economically increased to satisfy future traffic volume and services.

Asynchronous Transfer Mode (ATM) is a promised bearer transmission service for high speed multimedia LAN. Recently, high speed multimedia ATM LAN products have been available. Therefore, in order to interconnect them, the multimedia backbone LAN, which has the expandable high throughput over 10Gbps, supporting multicast, multi-QoS, and many interfaces including 622 Mbps, will be widely required. In this paper, the VLSI oriented input and output buffered switch architecture is proposed as the hardware architecture for multimedia backbone switch node. This paper describes that the chip set consisting of four VLSIs, that is, the switch element, the switch access, the distributor/arbiter, and the multiplexer/demultiplexer, can realize the backbone switch core, and the main specifications required to each VLSI are derived.

A goal of a broadband ISDN network is to provide integrated transport for a wide range of applications such as teleconferencing, entertainment video, and file distribution. These require multipoint communications in addition to conventional point-to-point connections. The essential component to provide multipoint communications is a multicast packet switch. In this paper, we propose and analyze a new parallel multicast packet switch which easily approaches a maximum throughput of 100% as the number of fanout and multicast rate are increased. The proposed switch consists of a simple ring network and a point-to-point switch network in parallel. The ring network provides both replication and routing of multicast packets. The point-to-point switch network is responsible for delivering only unicast packets. The ring network provided in this switch overcomes the problems of clock synchronization and unfairness of access in the slotted ring by synchronizing the ring to the time slot used in the point-to-point switch and providing small amount of speed-up. Moreover, the significant drawbacks of the basic cascaded multicast fabric design are removed in this parallel switch which can separate the unicast and multicast packets before entering the switch fabric. The performance analysis shows that this switch with the small size of input/output buffers achieves good performance in delay and throughput, and the packet loss probability less than 10-9.

This paper discusses and evaluates an effect of cell level FEC (Forward Error Correction) capability on error-free (i.e. reliable) IP multicast service over ATM networks. In the error-free IP multicast service, every receiver is delivered IP packet from the sender synchronously. Without applying the FEC policy, the expected IP packet error/loss probability becomes large, when the number of multicast receivers is large. For example, when the cell error/loss probability of each ATM data-link segment is 10-6 and the number of receivers is 103, the IP packet error/loss probability observed at the sender is about 0.5, which means that about 50% of IP packet sent from the sender will be subject to retransmission. One possible solution would be using the intermediate multicast-TCP entities, that terminate TCP protocol, among the sender and the receivers. However, this approach requires the additional entities within the network and can not provide the ordered message delivery for a multipoint-to-multipoint communication. On the contrary, with applying the FEC policy, the expected IP packet error/loss probability is dramatically reduced. Therefore, an error-free IP multicast service can be provided with a simple architecture, even when the number of multicast receiver is large, e.g. 105. For example, when the cell error/loss probability of each ATM data-link segment is 10-6, the packet error/loss probability observed at the sender is less than 10-2 even for 106 receivers. Finally, even when the cell error/loss probability of ATM data-link segment is large, e.g. 10-3, the IP multicast service without the FEC policy can not apply even for 10 receivers. However, the IP multicast with the FEC policy can apply upto few hundred of receivers.

This paper proposes a new multistage switch architecture for large-scale multicast ATM switching. The proposed architecture uses routing schemes both at the connection level and the cell level. This results in the reduction of the memory capacity required in the trunk number translators of the copy network modules. If Connection Splitting algorithm is used, a nonblocking switch can be constructed under the same nonblocking condition as that of point-to-point Clos network. It is shown that the memory requirements in the new switching network are less than the previous architectures.