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[Keyword] system(3183hit)

2021-2040hit(3183hit)

  • Technical Trends in Optical Fiber Connectors for Telecommunication Systems

    Ryo NAGASE  

     
    PAPER-Devices

      Vol:
    E86-C No:6
      Page(s):
    968-974

    Various optical fiber connectors have been developed during the 20 years since optical fiber communications systems were first put into practical use. As the domain of optical fiber communication systems expanded from trunk lines to subscriber lines and customer premises the main focus changed from performance improvement to miniaturization and cost reduction. This paper describes the technical background, recent trends in standard optical connectors, and recent issues related to photonic connection technologies.

  • Extended Optical Fiber Line Testing System with L/U-Band Optical Coupler Employing 4-Port Circulators and Chirped Fiber Bragg Grating Filters for L-Band WDM Transmission

    Nazuki HONDA  Noriyuki ARAKI  Hisashi IZUMITA  Minoru NAKAMURA  

     
    PAPER

      Vol:
    E86-B No:5
      Page(s):
    1562-1566

    An optical fiber line testing system is essential for reducing maintenance costs and improving service reliability in optical access networks. NTT has already developed such a system called AURORA (AUtomatic optical fibeR opeRAtions support system). As we already use the 1310 and 1550nm wavelengths for communication, we use the 1650nm wavelength for maintenance testing in accordance with ITU-T recommendation L.41. Recently, a long wavelength band (L-band) that extends to 1625nm has begun to be used for WDM transmission. With a view to monitoring optical fiber cables transmitting L-band communication light, an attractive way of separating the U-band wavelength of the test lights from the L-band wavelength of the communication light is to use a chirped fiber Bragg grating (FBG) filter because of its steep optical spectrum. However, it is difficult to measure fiber characteristics with an optical time-domain reflectometer (OTDR), because multi-reflections appear in the OTDR trace when FBG filters are installed at both ends of an optical fiber line. In this paper, we consider this problem and show that the reflection loss at the port of a test access module (TAM) must be more than 36.6dB. We also describe the system design for an extended optical fiber line testing system using an L/U-band optical coupler, which has two chirped FBGs between two 4-port circulators for L-band WDM transmission. In this system, the reflection loss at a TAM port was 38.1dB, and we confirmed that there was no degradation in the OTDR trace caused by multi-reflections at the optical filters.

  • A Recursive Procedure for Designing Optimal d-Matched Digraphs

    Kiyoaki YOSHIDA  Yasumasa SUJAKU  Tohru KOHDA  

     
    PAPER-Graphs and Networks

      Vol:
    E86-A No:5
      Page(s):
    1266-1274

    We define a d-matched digraph and propose a recursive procedure for designing an optimal d-matched digraph without bidirectional edges. The digraph represents an optimal highly structured system which is a special class of self-diagnosable systems and identifies all of the faulty units independently and locally in O(|E|) time complexity. The procedure is straightforward and gives a system flexible in network connections. Hence the procedure is applicable to real systems such as the Internet or cooperative robotic systems which change their topology dynamically.

  • An Optimal Adaptive Diagnosis of Butterfly Networks

    Aya OKASHITA  Toru ARAKI  Yukio SHIBATA  

     
    PAPER

      Vol:
    E86-A No:5
      Page(s):
    1008-1018

    System-level diagnosis is a very important technique for identifying faulty processors in a system with a large number of processors. Processors can test other processors, and then output the test results. The aim of diagnosis is to determine correctly the faulty/fault-free status of all processors. The adaptive diagnosis have been studied in order to perform diagnosis more efficiently. In this paper, we present adaptive diagnosis algorithms for a system modeled by butterfly networks. Our algorithms identify all faulty nodes in butterfly networks with the optimal number of tests. Then, we design another algorithm for diagnosis with very small constant number of rounds.

  • Prototyping of a 5 GHz WLAN Reconfigurable System-on-Chip

    Spyridon BLIONAS  Konstantinos MASSELOS  Chrissavgi DRE  Christos DROSOS  Fragkiskos IEROMNIMON  Dimitris METAFAS  Thanasis PAGONIS  Aristodemos PNEVMATIKAKIS  Anna TATSAKI  Theodor TRIMIS  Adamandios VONTZALIDIS  

     
    PAPER

      Vol:
    E86-D No:5
      Page(s):
    891-900

    In this paper the development of the prototyping platform of a partly reconfigurable System-on-Chip (SoC) for wireless LANs, is described. It is designed to realize both HIPERLAN/2 and IEEE 802.11a wireless LAN systems. The current version of the system includes Mobile Terminal and AP functionality only for indoor use. Future firmware versions (configurations for its reconfigurable part) will upgrade system's functionality to allow its operation in outdoor environments and in wireless point-to-point links. The target System-on-Chip implementation platform will include instruction set processor cores, ASIC blocks and embedded reconfigurable blocks to achieve an optimal balance between implementation efficiency (area, power, performance) and flexibility. The system's prototype is developed on the ARM integrator platform and all firmware versions will be verified before ASIC prototyping.

  • B-Ternary Asynchronous Digital System under Relativity Delay

    Yasunori NAGATA  Masao MUKAIDONO  

     
    PAPER-Computer System Element

      Vol:
    E86-D No:5
      Page(s):
    910-919

    Some of the recent digital systems have a serious clock skew problem due to huge hardware implementation and high-speed operation in VLSI's. To overcome this problem, clock distribution techniques and, more notably, asynchronous system design methodologies have been investigated. Since the latest asynchronous digital systems use two-rail logic with two-phase data transfer manner, more than two-fold hardware is required in comparison with the synchronous system. In this article, we present a design of asynchronous digital system which is based on B-ternary logic that can process binary data. The system which is based on speed-independent mode consists of data-path and its controller. Then we provide B-ternary two-phase binary data processing in the data-path and its control procedure with hand-shake protocol. To implement the system some functional elements are presented, that is, a ternary-in/binary-out register with request/acknowledge circuits and a control unit. These functional elements are fabricated with ternary NOR, NAND, INV gates and ternary-in/binary-out D-FF (D-elements). The B-ternary based asynchronous circuit has less interconnections, achives race-free operations and makes use of conventional binary powerful design tools. Particularly, we extend the speed-independent delay model to relativity delays in order to reduce hardware overhead of checking memory stability in the system. As a concrete example, a carry-completion type asynchronous adder system is demonstrated under extended speed-independent mode to show the validity of the extension.

  • Detection of Summative Global Predicates

    Loon-Been CHEN  I-Chen WU  

     
    LETTER-Theory and Models of Software

      Vol:
    E86-D No:5
      Page(s):
    976-980

    In many distributed systems, tokens are fundamental tools to manage resources shared by processes. Thus, monitoring tokens has become a significant problem in developing the distributed programs. This paper formulates the problems of monitoring tokens in terms of detecting the special global predicates, called summative global predicates. In this paper, several algorithms to detect various summative global predicates are developed and their time complexities are discussed.

  • Output Feedback Passification of Nonlinear Systems Not in Normal Form

    Young I. SON  Hyungbo SHIM  Nam H. JO  Jin H. SEO  

     
    LETTER-Systems and Control

      Vol:
    E86-A No:5
      Page(s):
    1312-1315

    In this paper, the problem of output feedback passification for nonlinear systems is considered. Contrary to the conventional methodologies, our approach does not require the normal form representation of the system. Consequent advantages include that the system need not have a well-defined relative degree. In particular, we present a necessary and sufficient condition for output feedback passification without relying on the normal form. The proposed condition finally leads to an extension for a recent result when the system does have a normal form.

  • Simple Extension of a Numerical Algorithm for Feedback Linearization to Multi-Input Nonlinear Systems

    Yu Jin JANG  Sang Woo KIM  

     
    LETTER-Systems and Control

      Vol:
    E86-A No:5
      Page(s):
    1302-1308

    Obtaining a linearizing feedback and a coordinate transformation map is very difficult, even though the system is feedback linearizable. It is known that finding a desired transformation map and feedback is equivalent to finding an integrating factor for an annihilating one-form for single input nonlinear systems. It is also known that such an integrating factor can be approximated using the simple C.I.R method and tensor product splines. In this paper, it is shown that m integrating factors can always be approximated whenever a nonlinear system with m inputs is feedback linearizable. Next, m zero-forms can be constructed by utilizing these m integrating factors and the same methodology in the single input case. Hence, the coordinate transformation map is obtained.

  • A Simple Power Attack on a Randomized Addition-Subtraction Chains Method for Elliptic Curve Cryptosystems

    Katsuyuki OKEYA  Kouichi SAKURAI  

     
    PAPER

      Vol:
    E86-A No:5
      Page(s):
    1171-1180

    We show that a randomized addition-sub-traction chains countermeasure against side channel attacks is vulnerable to an SPA attack, which is a kind of side channel attack, under distinguishability between addition and doubling. The side channel attack takes advantage of information leaked during execution of a cryptographic procedure. The randomized addition-subtraction chains countermeasure was proposed by Oswald-Aigner, and is based on a random decision inserted into computations. However, the question of its immunity to side channel attacks is still controversial. The randomized addition-subtraction chains countermeasure has security flaw in timing attacks, another kind of side channel attack. We have implemented the proposed attack algorithm, whose input is a set of AD sequences, which consist of the characters "A" and "D" to indicate addition and doubling, respectively. Our program has clarified the effectiveness of the attack. The attack algorithm could actually detect secret scalars for given AD sequences. The average time to detect a 160-bit scalar was about 6 milliseconds, and only 30 AD sequences were enough to detect such a scalar. Compared with other countermeasures against side channel attacks, the randomized addition-subtraction chains countermeasure is much slower.

  • An Efficient Representation of Scalars for Simultaneous Elliptic Scalar Multiplication

    Yasuyuki SAKAI  Kouichi SAKURAI  

     
    PAPER

      Vol:
    E86-A No:5
      Page(s):
    1135-1146

    The computational performance of cryptographic protocols using an elliptic curve strongly depends on the efficiency of the scalar multiplication. Some elliptic curve based cryptographic protocols, such as signature verification, require computation of multi scalar multiplications of kP+lQ, where P and Q are points on an elliptic curve. An efficient way to compute kP+lQ is to compute two scalar multiplications simultaneously, rather than computing each scalar multiplication separately. We introduce new efficient algorithms for simultaneous scalar multiplication on an elliptic curve. We also give a detailed analysis of the computational efficiency of our proposed algorithms.

  • Baby Step Giant Step Algorithms in Point Counting of Hyperelliptic Curves

    Kazuto MATSUO  Jinhui CHAO  Shigeo TSUJII  

     
    PAPER

      Vol:
    E86-A No:5
      Page(s):
    1127-1134

    Counting the number of points of Jacobian varieties of hyperelliptic curves over finite fields is necessary for construction of hyperelliptic curve cryptosystems. Recently Gaudry and Harley proposed a practical scheme for point counting of hyperelliptic curves. Their scheme consists of two parts: firstly to compute the residue modulo a positive integer m of the order of a given Jacobian variety, and then search for the order by a square-root algorithm. In particular, the parallelized Pollard's lambda-method was used as the square-root algorithm, which took 50CPU days to compute an order of 127 bits. This paper shows a new variation of the baby step giant step algorithm to improve the square-root algorithm part in the Gaudry-Harley scheme. With knowledge of the residue modulo m of the characteristic polynomial of the Frobenius endomorphism of a Jacobian variety, the proposed algorithm provides a speed up by a factor m, instead of in square-root algorithms. Moreover, implementation results of the proposed algorithm is presented including a 135-bit prime order computed about 15 hours on Alpha 21264/667 MHz and a 160-bit order.

  • Design and Implementation of RHiNET-2/NI0: A Reconfigurable Network Interface for Cluster Computing

    Tomonori YOKOYAMA  Naoyuki IZU  Jun-ichiro TSUCHIYA  Konosuke WATANABE  Hideharu AMANO  Tomohiro KUDOH  

     
    PAPER

      Vol:
    E86-D No:5
      Page(s):
    789-795

    A reconfigurable network interface called RHiNET-2/NI0 is developed for parallel processing of PCs distributed within one or more floors of a building. Two configurations: the HS (High Speed) configuration with only a high-speed primitive and the DSM (Distributed Shared Memory) configuration which supports sophisticated primitives can be selected by the network requirement. From the empirical evaluation, it appears that the HS configuration markedly improves the latency of data transfer compared with traditional network interfaces. On the other hand, the DSM configuration executes sophisticated primitives for distributed shared memory more than twice as fast as that of software implementation.

  • Cancellation of Narrowband Interference in GPS Receivers Using NDEKF-Based Recurrent Neural Network Predictors

    Wei-Lung MAO  Hen-Wai TSAO  Fan-Ren CHANG  

     
    LETTER-Spread Spectrum Technologies and Applications

      Vol:
    E86-A No:4
      Page(s):
    954-960

    GPS receivers are susceptible to jamming by interference. This paper proposes a recurrent neural network (RNN) predictor for new application in GPS anti-jamming systems. Five types of narrowband jammers, i. e. AR process, continuous wave interference (CWI), multi-tone CWI, swept CWI, and pulsed CWI, are considered in order to emulate realistic conditions. As the observation noise of received signals is highly non-Gaussian, an RNN estimator with a nonlinear structure is employed to accurately predict the narrowband signals based on a real-time learning method. The node decoupled extended Kalman filter (NDEKF) algorithm is adopted to achieve better performance in terms of convergence rate and quality of solution while requiring less computation time and memory. We analyze the computational complexity and memory requirements of the NDEKF approach and compare them to the global extended Kalman filter (GEKF) training paradigm. Simulation results show that our proposed scheme achieves a superior performance to conventional linear/nonlinear predictors in terms of SNR improvement and mean squared prediction error (MSPE) while providing inherent protection against a broad class of interference environments.

  • Design of Broadcast Delivery Schedules for Multiple Channels

    Yiu-Wing LEUNG  

     
    PAPER-Broadcast Systems

      Vol:
    E86-B No:4
      Page(s):
    1391-1398

    Datacycle is an information delivery system designed in Bellcore . It uses broadcast delivery and multiple channels of an optical fiber to provide a large volume of information to many users. In this system, the mean access time depends on the broadcast delivery schedule because different information items (called pages) may have different popularity and there are multiple channels for concurrent broadcast delivery. In this paper, we design broadcast delivery schedules for M channels where M 2 and our objective is to minimize the mean access time. We show that this design problem can be divided into two subproblems: (1) divide the pages into M partitions such that the pages of each partition are broadcast in a distinct channel and (2) determine a broadcast schedule for the pages of each partition. We analyze and solve these subproblems, and we demonstrate that the schedules found can nearly reach a lower bound on the minimal mean access time.

  • Map Label Placement for Points and Curves

    Takayuki KAMEDA  Keiko IMAI  

     
    PAPER

      Vol:
    E86-A No:4
      Page(s):
    835-840

    The label placement problem is one of the most important problems in geographic information systems, cartography, graph drawing and graphical interface design. In this paper, we consider the problem of labeling points and curves in maps drawn from digital data. In digital maps, a curve is represented as a set of points and consists of many small segments. The label for each curve must be placed alongside the corresponding curve. We define a continuous labeling space for points and curves, and present an algorithm using this space for positioning labels. Computational results for subway and JR train maps in Tokyo are presented.

  • Instruction Encoding for Reducing Power Consumption of I-ROMs Based on Execution Locality

    Koji INOUE  Vasily G. MOSHNYAGA  Kazuaki MURAKAMI  

     
    PAPER

      Vol:
    E86-A No:4
      Page(s):
    799-805

    In this paper, we propose an instruction encoding scheme to reduce power consumption of instruction ROMs. The power consumption of the instruction ROM strongly depends on the switching activity of bit-lines due to their large load capacitance. In our approach, the binary-patterns to be assigned as op-codes are determined based on the frequency of instructions in order to reduce the number of bit-line dis-charging. Simulation results show that our approach can reduce 40% of bit-line switchings from a conventional organization.

  • Performance Analysis of Channel Allocation Schemes for Supporting Multimedia Traffic in Hierarchical Cellular Systems

    Sang-Hee LEE  Jae-Sung LIM  

     
    PAPER-Wireless Communication Technology

      Vol:
    E86-B No:4
      Page(s):
    1274-1285

    In this paper, we propose two channel allocation schemes for supporting voice and multimedia traffic in hierarchical cellular systems. They are guaranteed to satisfy the required quality of service for multimedia traffic in accordance with their characteristics such as a mobile velocity for voice calls and a delay tolerance for multimedia calls. In the first, only slow-speed voice calls are allowed to overflow from macrocell to microcell and only adaptive multimedia calls can overflow from microcell to macrocell after reducing their bandwidth to the minimum channel bandwidth. In the second, in addition to the first scheme, non-adaptive multimedia calls can occupy the required channel bandwidth through reducing the channel bandwidth of adaptive multimedia calls. The proposed schemes are analyzed using the 2-dimensional Markov model. Through computer simulations, it is shown that the proposed schemes yield a significant improvement in terms of the forced termination probability of handoff calls. In particular, the second decreases the blocking probability of new calls as well as the forced termination probability of handoff calls.

  • A Multi-Agent Based Manufacturing Resource Planning and Task Allocation System

    Toshiyuki MIYAMOTO  Daijiroh ICHIMURA  Sadatoshi KUMAGAI  

     
    PAPER

      Vol:
    E86-A No:4
      Page(s):
    806-812

    The present paper addresses the design of manufacturing systems. A resource planning and task allocation problem is proposed, and a multi-agent system for this problem is discussed. In the multi-agent system, an agent exists for each resource and for each operation. The proposed multi-agent system improves the quality of resulting plans by the learning of these agents.

  • Automatic LSI Package Lead Inspection System with CCD Camera for Backside Lead Specification

    Wataru TAMAMURA  Koji NAKAMAE  Hiromu FUJIOKA  

     
    PAPER-Integrated Electronics

      Vol:
    E86-C No:4
      Page(s):
    661-667

    An automatic LSI package lead inspection system for backside lead specification is proposed. The proposed system inspects not only lead backside contamination but also the mechanical lead specification such as lead pitch, lead offset and lead overhangs (variations in lead lengths). The total inspection time of a UQFP package with a lead count of 256 is less than the required time of 1 second. Our proposed method is superior to the threshold method used usually, especially for the defect between leads.

2021-2040hit(3183hit)