In order to realize a future seamless high-speed road-vehicle communication system, we have proposed using code division multiplexing (CDM) radio transmission scheme by using cyclic shifted-and-extended (CSE) codes as spread codes. As the CSE codes are generated by cyclically shifting and extending a conventionally used code, the number of codes generated from a code is limited to the length of the shift interval and the tolerable period of delayed waves also depends on the length. In this paper, based on CSE codes, we propose a method to minimize the length of the shift interval and a cancellation technique with a simple calculation in order to eliminate the interference from delayed waves caused by the reduction of the length of shift interval. The concept and the BER performances in AWGN, two-paths, and multi-path fading environments are described in this paper. As a result, the maximum transmission rate of CSE-based-CDM transmission per one-code using the newly proposed transmission scheme is 3 times as large as that using conventional CSE codes and DQPSK-CDM transmission scheme.

This paper describes a rhythm pattern accuracy diagnosis system based on the rhythm pattern matching algorithm and a diagnosis feedback method by employing the SVM technique. A beat rhythm pattern is recorded by a PC and analyzed with an algorithm including cluster-analysis-based pattern matching. Rhythm performance is represented by a performance feature vector, which features note length deviation, note length instability, and tempo instability. The performance feature vector is effective for objectively evaluating the accuracy of rhythm patterns objectively. In addition, this system has the music experts' knowledge base, which is calculated from the performance feature vectors associated with the experts' subjective evaluation by listening to the performance. The system generates both an objective measuring report, and experts' comments for learners. Reproductivity of experts' comments is statistically indicated to be excellent for eight rhythm patterns, two tempo levels, and eight users. Reliability of experts' comments are also described considering the threshold of the decision function of SVM. Subjective evaluation of the system is carried out by fifteen users by a questionnaire using the SD method. As a result of factor analysis for the sixteen questions, four factors named "Audio-visual representation," "User-friendliness," "Reliability," and "Window representation," are extracted. Users' four factor scores indicate that the system is reliable and easy to use.

Interference Cancellation (IC) receivers can be used in CDMA cellular systems to improve the capacity. The IC receivers can be divided into two main categories, Single-User Detectors (SUD) and Multi-User Detectors (MUD). They have different characteristics in terms of intra-cell and inter-cell interference cancellation ability. In this paper we propose two new IC receivers that combines the properties of SUD and MUD receivers. The first one is a Serial IC receiver followed by the Normalized Griffiths' algorithm (SING). The second one is an Integrated Serial IC and Normalized Griffiths' algorithm (iSING). We first compare their basic single-cell performance with the conventional RAKE receiver, the Serial IC and the Normalized Griffiths' Algorithm. Next, we examine their multi-cell performance by doing multi-cell link-level simulations. The results show that even though the Serial IC receiver has good single-cell performance, the proposed receivers have as much as 35-40% higher capacity than the Serial IC receiver in the multi-cell case under the ideal conditions assumed in this paper.

G. Huet (1980) showed that a left-linear term-rewriting system (TRS) is Church-Rosser (CR) if P Q for every critical pair < P, Q > where P Q is a parallel reduction from P to Q. This paper shows that Huet's result can be generalized under the assumption that a subsystem K of TRS R (i.e., KR) is CR. That is, we show that R is CR if P K Q for every < P, Q > CP(K,R-K) and P R-K *K*K Q for every < P, Q > CP(R-K,R). Here, CP(R1,R2) is the set of critical pairs obtained from some rule of R1 and one of R2.

This paper discusses two types of polyphase sequence sets, which will successfully provide CDMA systems without co-channel interference. One is a type of ZCZ sets, whose periodic auto-correlation functions take zero at continuous shifts on both side of the zero-shift, and periodic cross-ones also take zero at the continuous shifts and the zero-shift. The other is a new type of sets consisting of some subsets of polyphase sequences with zero cross-correlation zone, called ZCCZ sets, whose periodic cross-correlation functions among different subsets have take zero at continuous shifts on both side of the zero-shift including the zero-shift. The former can achieve a mathematical bound, and the latter can have large size.

The purpose of this paper is to derive a novel fractionally spaced Bayesian decision feedback equalizer (FS-BDFE). The oversampling technique changes single input single output (SISO) linear channel to single input multiple output (SIMO) linear channel. The Bayesian decision variable in the FS-BDFE is defined as the product of Bayesian decision variables in the Bayesian decision feedback equalizers (BDFE) corresponding to each channels of the SIMO. It can be shown that the FS-BDFE has less decision error probability than the conventional BDFE. The effectiveness of the proposed equalizer is also demonstrated by the computer simulation.

We developed a conversation system which can participate in a group conversation. Group conversation is a form of conversation in which three or more participants talk to each other about a topic on an equal footing. Conventional conversation systems have been designed under the assumption that each system merely talked with only one person. Group conversation is different from these conventional systems in the following points. It is necessary for the system to understand the conversational situation such as who is speaking, to whom he is speaking, and also to whom the other participants pay attention. It is also necessary for the system itself to try to affect the situation appropriately. In this study, we realized the function of recognizing the conversational situation, by combining image processing and acoustic processing, and the function of working on the conversational situation utilizing facial and body actions of the robot. Thus, a robot that can join in the group conversation was realized.

There is a strong demand to expand captioned broadcasting for TV news programs in Japan. However, keyboard entry of captioned manuscripts for news program cannot keep pace with the speed of speech, because in the case of Japanese it takes time to select the correct characters from among homonyms. In order to implement simultaneous subtitled broadcasting for Japanese news programs, a simultaneous subtitling system by speech recognition has been developed. This system consists of a real-time speech recognition system to handle broadcast news transcription and a recognition-error correction system that manually corrects mistakes in the recognition result with short delay time. NHK started simultaneous subtitled broadcasting for the news program "News 7" on the evening of March 27, 2000.

This paper proposes a new algorithm to achieve about two-times speedup of modular exponentiation which is implemented by Montgomery multiplication based on Residue Number Systems (RNS). In RNS Montgomery multiplication, its performance is determined by two base transformations dominantly. For the purpose of realizing parallel processing of these base transformations, i. e. "duplicate processing," we present two procedures of RNS Montgomery multiplication, in which RNS bases a and b are interchanged, and perform them alternately in modular exponentiation iteration. In an investigation of implementation, 1.87-times speedup has been obtained for 1024-bit modular multiplication. The proposed RNS Montgomery multiplication algorithm has an advantage in achieving the performance corresponding to that the upper limit of the number of parallel processing units is doubled.

This paper proposes a symbol-by-symbol-based multilevel transmit power control (MTPC) scheme for orthogonal frequency division multiplexing (OFDM) based adaptive modulation system (AMS) to achieve high quality broadband wireless transmission for high mobility terminals. In the proposed system, delay profile for each OFDM symbol is estimated by linearly extrapolating previously received delay profile information (DPI) sequence to improve tracking ability of OFDM based AMS with MTPC to the fast fading variation. Moreover, 2-branch reception diversity is applied to reduce dynamic range and variation speed of the multipath fading. Computer simulation confirms that the proposed system is effective in supporting higher mobility terminals with keeping high transmission quality.

This paper presents a new sliding window algorithm that is well-suited to an elliptic curve defined over an extension field for which the Frobenius map can be computed quickly, e.g., optimal extension field. The algorithm reduces elliptic curve group operations by approximately 15% for scalar multiplications for a practically used curve in compared to Lim-Hwang's results presented at PKC2000, which was the fastest previously reported. The algorithm was implemented on computers. Scalar multiplication can be accomplished in 573 µs, 595 µs, and 254 µs on Pentium II (450 MHz), 21164A (500 MHz), and 21264 (500 MHz) computers, respectively.

This paper proposes a flexible tree-based key management framework for a terminal to connect with multiple content distribution systems (called as CDSs in this paper). In an existing tree-based key management scheme, a terminal keeps previously distributed node keys which are used for decrypting contents from a CDS. According to our proposal, the terminal can calculate its node keys of a selected CDS as the need arises, using the "public bulletin board" of the CDS. The public bulletin board is generated by a management center of the individual CDS, depending on a tree structure which it determines in its convenience. After the terminal calculates its node keys, it can get a content of the CDS using the calculated node keys.

Approximately synchronized CDMA (AS-CDMA) can reduce the inter-channel interference in a cell to zero. This property of AS-CDMA is an advantage over the conventional DS-CDMA. However, the inter-cell interference of the AS-CDMA cellular system has not been sufficiently examined previously. Therefore, the synthetic performance of AS-CDMA cellular system also has not been sufficiently clarified previously. Some factors that affect the inter-cell interference of the AS-CDMA cellular system were theoretically examined, and evaluated by using computer simulation. As the result, we found that transmission power control is effective for reducing the inter-cell interference of the AS-CDMA cellular system. In addition, the synthetic performance of AS-CDMA cellular system was clarified for the first time. Consequently, it was also found that the synthetic performance of the AS-CDMA cellular system is higher than that of the conventional DS-CDMA cellular system.

This paper describes fully integrated active guard band filters for suppressing the substrate coupling noise and their noise suppression effect measured by test chip experiments. The noise cancellation circuit of the active guard band filters simply consists of an inverter and a source follower. The substrate noise suppression effect was measured by using a test chip fabricated in a 0.18 µm CMOS triple-well process for system-on-a-chip. The noise with the filter was less than 5% of that without the filter and the noise suppression effect was observed from 1 MHz to 200 MHz by the statistical measurement of the voltage comparator. The noise suppression effect was also observed for actual digital switching noise produced by digital inverters. Configuration of the active guard band filter was investigated by simulation and it is shown that high and uniform noise suppression effect is achieved by placing the guard bands in the L-shape around the target triple-well area on the p-substrate.

A new approach to build up a real-time multiprocessing system that is configuration flexible for evaluating space-time (ST) equalizers is described. The core of the system consists of fully programmable devices such as digital signal processors (DSPs), field-programmable gate arrays (FPGAs), and reduced instruction set computers (RISCs) with a real-time operating system (RTOS). The RTOS facilitates flexibility in the multi-processor configuration for the system conforming with ST processing algorithms. Timing jitter synchronization caused by use of the RTOS-embedded system is shown, and an adjustable frame format for a transmission system is described as a measure to avoid the jitter problem. Bit error rate (BER) performances measured in uncorrelated frequency-selective fading channels show that an ST equalizer provides a significantly lower BER than an array processor does.

In this paper, a new approach is proposed to improve the channel estimation accuracy with channel tracking capability for adaptive multicarrier equalization systems under time-variant multipath fading channel. The improvement is carried out based on the assumption that the channel is static over a transmitted block period, and slowly linearly changing over several block periods. By applying IFFT to the concatenated channel transfer function derived from different blocks, the noise-averaging improvement is achieved, and a better estimation of the channel coefficients with some delay can be obtained. A multi-step channel predictor and a smoothing filter is utilized to compensate for the delay and make the system more robust in terms of channel tracking performance. Adaptive time domain equalization is jointly performed with this approach to avoid the channel invertibility problem found in the frequency domain approach. A short period of training sequences is utilized resulting in more efficient use of available communication capacity. The effectiveness of the proposed approach is evaluated through simulation for multicarrier systems in time-variant multipath fading channels. Results show improvement over previous channel estimation schemes.

We suggest a new probe message structure and an efficient probe-based deadlock detection and recovery algorithm that can be used in distributed database systems. We determine the characteristics of the probe messages and suggest an algorithm that can reduce the communication cost required for deadlock detection and recovery.

This paper describes special-purpose hardware for large-scale logic simulation, called SP2, which executes an event driven algorithm and can simulate up to sixteen million gates. SP2 was developed, in 1992, for system verification of large-scale computer designs as a successor to SP1, which was developed in 1987. SP2 provides enhanced performance, throughput, and delay accuracy over SP1. Since 1992, SP2 has been widely used for system-level simulation of mainframes, super computers, UNIX servers and microprocessors. It is used as a powerful simulator, in all stages of design verification, or in early stages, before regression testing, by using emulators.

This paper describes an automatic interface insertion scheme for in-system verification of algorithm models. To insert the interface, an algorithm model described in C is translated into another source code that includes the communication with hardware components in the target system to be validated with the algorithm model. The communication between the algorithm model and hardware components is achieved using transactors that perform transformation between access operations and bus cycle transactions. I/O terminal is introduced as an interface model to relate the transactions to access operations during the execution of the algorithm model, i.e., accesses to I/O terminals invoke bus cycle transactions in hardware and vice versa. An automatic interface insertion tool is developed using the source-to-source translation to identify the I/O terminals and insert interface function calls in the source code. The proposed automatic interface insertion scheme is validated by emulating several multimedia algorithms written in C on real target systems.

This paper devises a sophisticated approach to the performance estimation of an embedded hardware-software codesign system at the architecture level, which intends to optimize the hardware-software configuration in terms of processing time, power dissipation, and hardware cost. A distinctive feature of this approach consists in constructing a performance estimation model proper to each component of an embedded system, such as CPU core, RAM/ROM, cache memory, and application-specific hardware, by taking account of not only the functional performance but also the data transfer. The proposed estimation schemes are incorporated into an existing instruction set simulator, so that the actual performance can be estimated accurately at the architecture level. The experimental results demonstrate that the performance estimation approach enables the precise design decision at the architecture level, which greatly contributes toward enhancing the design ability dedicatedly for mobile appliances.