A constraint resolution scheme in the Hopfield-type neural network named "Neuron Filter" is presented for efficiently solving combinatorial optimization problems. The neuron filter produces an output that satisfies the constraints of the problem as best as possible according to both neuron inputs and outputs. This paper defines the neuron filter and shows its introduction into existing neural networks for N-queens problems and FPGA board-level routing problems. The performance is evaluated through simulations where the results show that our neuron filter improves the searching capability of the neural network with the shorter computation time.

Several packaging methods for athermalization of Fiber Bragg Grating (FBG), which is equipped with negative expansion substrates, have been proposed. However, those methods have some deficiency resulted from the substrates such as complex structure or poor thermal expansion characteristics. In order to provide a suitable substrate for the athermalization of FBG, the authors have developed a Negative Expansion Ceramic Substrate (NECS) which has simple structure and suitable thermal expansion characteristics. NECS consists of polycrystalline β-quartz solid solution (Li2O-Al2O3-nSiO2, n>2), and has thermal expansion coefficient of about -65 to -85 10-7/C, which is sufficient large enough for total compensation of the Bragg wavelength shift. No difference in the thermal expansion was observed between the specimen as prepared and the one on which an epoxy adhesive was applied. NECS is produced by means of a sintering method, which enables flexible design of the chemical composition. It was found that the hysteresis in thermal expansion of the NECS depends upon the chemical composition and crystalline structure. We decreased thermal expansion hysteresis by controlling the SiO2 ratio in the composition and the crystal grain size. We confirmed that the temperature dependence of the FBG mounted on the NECS with an epoxy adhesive was decreased to -2.3 10-3 nm/C from 10.0 10-3 nm/C, in good agreement with the calculated value of -2.6 10-3 nm/C. The hysteresis in Bragg wavelength shift was less than 0.03 nm, that is sufficiently small enough for practical use. It was confirmed that NECS has suitable thermal expansion characteristics for the athermalization of FBG.

This paper describes how to generate, analyze and design a novel current-mode filter model using tunable multiple-output operational transconductance amplifiers and grounded capacitors (MO-OTA-Cs) for synthesizing both transmission poles and zeros. Transfer functions of low-order, high-order, general type, and special type are realized based on the filter model. The theory focuses mainly on establishing a relationship between the cascaded MO-OTA-Cs and the multiple-loop feedback matrix, which makes the structural generation and design formulas. Adopting the theory allows us to systematically generate many interesting new configurations along with some known structures. All the filter architectures contain only grounded capacitors, which can absorb parasitic capacitances and require smaller chip areas than floating ones. The paper also presents numerical design examples and simulation results to confirm the theoretical analysis.

An ultra low-noise and highly selective, experimental 2-GHz band cryogenic receiver front end (CRFE) has been newly developed for cellular base stations. It utilizes a high-Q superconducting filter, a very low noise cryogenic amplifier, and a highly reliable cooler that is very compact. Fundamental design of the CRFE is investigated. First, the equivalent noise temperature of the CRFE and the effect of improving CRFE sensitivity on base station reception are discussed. Next, essential technologies and fundamental characteristics of each component are described. Finally, influence of antenna noise, such as ground noise and man-made noise, is estimated through field tests both in urban and suburban areas.

In this paper we develop a CORDIC-based floating-point vectoring algorithm which reduces significantly the amount of microrotation steps as compared to the conventional algorithm. The overhead required to accomplish this is minimized by the introduction of an angle selection function which considers only a few of the total amount of bits used to represent the vector being rotated. At the same time, the cost of individual microrotations is kept low by the utilization of a fast rotations angle base.

Patterns exist in many contexts and can be considered the useful information for decision making. However, many patterns are not directly visible without careful presentation. Here, we describe an interactive visualization approach for browsing patterns in a history of interacting with a computer system. While a user is carrying out his/her business using computers, activities with respect to time and location are captured to determine the situational interactions. We first integrate the timeline and geographical map to create a structure to visualize spatiotemporal events in the interaction history. The spiral-based interactive visualization technique, presented in this paper, is then used to derive patterns according to the user-specified different spatial viewpoints on the map. In this study, we demonstrate how patterns can be used as visual statements for the analysis of a spatiotemporal data set in the information visualization.

This work presents two novel algorithms to prevent rollback propagation for independent checkpointing: an efficient adaptive independent checkpointing algorithm and an optimized adaptive independent checkpointing algorithm. The last opportunity strategy that yields a better performance than the conservation strategy is also employed to prevent useless checkpoints for both causal rewinding paths and non-causal rewinding paths. The two methods proposed herein are domino effect-free and require only a limited amount of control information. They also take less unnecessary adaptive checkpoints than other algorithms. Furthermore, experimental results indicate that the checkpoint overhead of our techniques is lower than that of the coordinated checkpointing and domino effect-free algorithms for service-providing applications.

This paper proposes a method for extracting subimages from a huge reference image by learning lifting wavelet filters. Lifting wavelet filters are biorthogonal wavelet filters containing free parameters developed by Sweldens. Our method is to learn such free parameters using some training subimages so as to vanish their high frequency components in the y- and x-directions. The learnt wavelet filters have the feature of training subimages. Applying such wavelet filters to the reference image, we can detect the locations where the high frequency components are almost the same as those of the target subimage.

In this paper, we propose an effective SOI yield engineering methodology by practical usage of 2D simulations. Process design for systematic yield of Fully-Depleted SOI MOSFET requires specific consideration of floating-body effects and parasitic channel leakage currents. The influence of varied SOI layer thickness to such phenomena is also complicated and substantial. Instead of time-consuming 3D simulators, 2D simulators are used to optimize the process considering these effects in acceptable turn around time. Our methodology is more effective in future scaled-down process with decreased SOI layer thickness.

This paper analyses the performance of a joint receiving structure for DS-CDMA communications systems. To reduce undesirable performance degradation due to the multiple access interferences and the near-far problem in multipath fading channel environment, this paper exploits the receiving structure for the multiuser communication composed of a beamformer-RAKE receiver and a decorrelating multiuser detector. The proposed DS-CDMA receiving structure mitigates the performance impairment invoked from the noise enhancement and reveals less computational complexity by utilizing the multipath temporal combiner prior to accessing the decorrelating detection. Also an efficient block Toeplitz inversion technique using the matrix Levinson polynomials is introduced to further diminish the computational burden encountered from applying the decorrelating multiuser detection process as in usual. Simulation results are conducted to demonstrate the superior performance of the proposed multiuser detection structure in multipath fading CDMA channel.

We present several challenging gridding problems for multi-dimensional device and process simulation and discuss how new strategies might contribute to their solution. Formulating grid quality requirements for the standard Scharfetter-Gummel box method discretization in device simulation, we demonstrate how the offsetting techniques compares with quadtree grid generation methods and how they apply to modern device designs. Further we present a grid adaptation approach which respects the grid quality criteria and touch upon the main adaptation difficulties within device simulation. For the 3D moving boundary grids in process simulation we present a new algorithm.

Learning process is essential for good performance when a neural network is applied to a practical application. The backpropagation algorithm is a well-known learning method widely used in most neural networks. However, since the backpropagation algorithm is time-consuming, much research have been done to speed up the process. The block backpropagation algorithm, which seems to be more efficient than the backpropagation, is recently proposed by Coetzee in [2]. In this paper, we propose an efficient parallel algorithm for the block backpropagation method and its performance model in mesh-connected parallel computer systems. The proposed algorithm adopts master-slave model for weight broadcasting and data parallelism for computation of weights. In order to validate our performance model, a neural network is implemented for printed character recognition application in the TiME which is a prototype parallel machine consisting of 32 transputers connected in mesh topology. It is shown that speedup by our performance model is very close to that by experiments.

In this paper, we present our work on the design of a new FPGA architecture targeted for high-performance bit-serial pipeline datapath. Bit-parallel systems require large amount of routing resource which is especially critical in using FPGAs. Their device utilization and operation frequency become low because of large routing penalty. Whereas bit-serial circuits are very efficient in routing, therefore are able to achieve a very high logic utilization. Our proposed FPGA architecture is designed taking into account the structure of bit-serial circuits to optimize the logic and routing architecture. Our FPGA guarantees near 100% logic utilization with a straightforward place and route tool due to high routability of bit-serial circuits and simple routing interconnect architecture. The FPGA chip core which we designed consists of around 200k transistors on 3.5 mm square substrate using 0.5 µm 2-metal CMOS process technology.

It is known that cycle slip due to frequency selective fading causes a burst error by symbol deletion or insertion, and has a serious effect on mobile radio communication systems. In this paper, first, we show that phase rotating modulation is suitable for code synchronization error detection. Next, we consider a code synchronization controller using correlation estimator of received sequence, and the controller combines the estimator with 2π/3-shifted modulation to construct a new code synchronization error control scheme as a cycle slip cancelling system. Furthermore, we apply the scheme to the multilevel trellis coded modulation (TCM). Finally, computer simulation results confirm that proposed scheme is capable of code synchronization error correction.

Given a set of still images taken from a hand-held camera, we present a fast method for mosaicing them into a single blended picture. We design time- and memory- efficient still image mosaicing algorithms based on geometric point feature matchings that can handle both arbitrary rotations and large zoom factors. We discuss extensions of the methodology to related problems like the recovering of the epipolar geometry for 3d reconstruction and object recognition tasks.

Optically patternable light-emitting devices based on conducting polymers were fabricated and were characterized. The cathode of the devices is made with a semitransparent-Al film, which enables to photoinduced degradation of the polymers in air. The optically patternable devices were successfully made with poly (2-methoxy-5-dodecyloxy-p-phenylene vinylene) (MDOPPV), as well as with poly (3-dodecylthiophene) (PAT12). However, optical absorption study indicated that the patterning mechanism of the MDOPPV device is considerably different from that of the PAT12 device.

A new technique is proposed to generate the executable and synchronizable (i. e. , e-synchronizable) test sequence for the protocol implementation to be conformable to its data portion specification. The protocol's control portion is specified as a finite state machine (FSM), and its data portion is specified as a set of rules. The technique involves converting the FSM and the rules into the DuplexSelect digraph, from which we can generate test sequences which are both synchronizable (i. e. , encounter no synchronization problems) and executable (i. e. , associated with parameter values which do not violate the rules). The Selecting Chinese Postman Algorithm is then used for minimizing the cost of the e-synchronizable test sequence that verifies each rule at least once.

In this paper we deal with the problem of calibrating a rotating and zooming camera, without 3D pattern, whose internal calibration parameters change frame by frame. First, we theoretically show the existence of the calibration parameters up to an orthogonal transformation under the assumption that the skew of the camera is zero. Auto-calibration becomes possible by analyzing inter-image homographies which can be obtained from the matches in images of the same scene, or through direct nonlinear iteration. In general, at least four homographies are needed for auto-calibration. When we further assume that the aspect ratio is known and the principal point is fixed during the sequence then one homography yields camera parameters, and when the aspect ratio is assumed to be unknown with fixed principal point then two homographies are enough. In the case of a fixed principal point, we suggest a method for obtaining the calibration parameters by searching the space of the principal point. If this is not the case, then nonlinear iteration is applied. The algorithm is implemented and validated on several sets of synthetic data. Also experimental results for real images are given.

We have proposed and demonstrated the circuit, which collectively recognizes header. Comparing with conventional schemes, the proposed circuit consists of simple structure. The proposed recognition circuit enables fast all-optical self-routing and contributes to reduce the buffer size for temporary data storage in each switch.

In order to realize universal service access of mobile users on the global telecommunication environment, we have to consider the scalable networking architecute based on the distributed object computing technologies. In this paper, we apply TINA to the promising networking architecture, and propose TINA-based scalable model for realizing personal mobility service, which especially focuses on making access to telecommunication services from any legacy systems that do not support such the new environment, using a downloadable module in an end terminal, as well as considering load balance of a whole system. Our proposed model also focuses on exchanging personal infomation of mobile users between different administrative domains, by separating the already-specified user profile information objects into two parts, which are the domain-common part and domain-specific part, and propose secure exchange procedure.