This letter proposes a power amplifier (PA) with compact matching network. This structure is a parallel dual radial microstrip line in the output matching network branch. The input impedance expression based on the structure is deduced through theoretical analysis, and the load impedance that satisfies the class EFJ PA is obtained through the impedance expression. Compared with the traditional design method, this design method is simple and novel, and the structure is more compact. In order to further improve efficiency and expand bandwidth, the input matching network adopts a stepped impedance matching method. In order to verify the correctness of the design, a broadband high-efficiency PA was designed using GaN HEMT CGH40010F. The test results show that the drain efficiency is 61%-71% in the frequency band 1.4-3.8GHz, the saturated output power is 40.3-41.8dBm, and the size is 53×47mm2.

This review provides a current overview of the fabrication processes for superconducting digital circuits at CRAVITY (clean room for analog and digital superconductivity) at the National Institute of Advanced Industrial Science and Technology (AIST), Japan. CRAVITY routinely fabricates superconducting digital circuits using three types of fabrication processes and supplies several thousand chips to its collaborators each year. Researchers at CRAVITY have focused on improving the controllability and uniformity of device parameters and the reliability, which means reducing defects. These three aspects are important for the correct operation of large-scale digital circuits. The current technologies used at CRAVITY permit ±10% controllability over the critical current density (Jc) of Josephson junctions (JJs) with respect to the design values, while the critical current (Ic) uniformity is within 1σ=2% for JJs with areas exceeding 1.0 µm2 and the defect density is on the order of one defect for every 100,000 JJs.

The microfabrication technique based on synchrotron radiation (SR) direct etching process has recently been applied to construct PTFE microstructures. This paper proposes a PTFE substrate integrated waveguide (PTFE SIW). It is expected that the PTFE SIW contributes to the improvement of the structural strength. A rectangular through-hole is introduced taking the advantage of the SR direct etching process. First, a PTFE SIW for the Q-band is designed. Then, a cruciform 3-dB directional coupler consisting of the PTFE SIW is designed and fabricated by the SR direct etching process. The validity of the PTFE SIW coupler is confirmed by measuring the frequency characteristics of the S-parameters. The mechanical strength of the PTFE SIW and the peeling strength of its Au film are also additionally investigated.

Autonomous vehicles and advanced driver assistant systems (ADAS) are receiving notable attention as research fields in both academia and private industry. Some decision-making systems use sets of logical rules to map knowledge of the ego-vehicle and its environment into actions the ego-vehicle should take. However, such rulesets can be difficult to create — for example by manually writing them — due to the complexity of traffic as an operating environment. Furthermore, the building blocks of the rules must be defined. One common solution to this is using an ontology specifically aimed at describing traffic concepts and their hierarchy. These ontologies must have a certain expressive power to enable construction of useful rules. We propose a process of generating sets of explanatory rules for ADAS applications from data using ontology as a base vocabulary and present a ruleset generated as a result of our experiments that is correct for the scope of the experiment.

Feature detection and matching procedure require most of processing time in image matching where the time dramatically increases according to the number of feature points. The number of features is needed to be controlled for specific applications because of their processing time. This paper proposes a feature detection method based on significancy of local features. The feature significancy is computed for all pixels and higher significant features are chosen considering spatial distribution. The method contributes to reduce the number of features in order to match two images with maintaining high matching accuracy. It was shown that this approach was faster about two times in average processing time than FAST detector for natural scene images in the experiments.

This paper presents the physical-layer cell identity (PCID) detection probability using the narrowband primary synchronization signal (NPSS) and narrowband secondary synchronization signal (NSSS) based on the narrowband Internet-of-Things (NB-IoT) radio interface considering frequency offset and the maximum Doppler frequency in the 28-GHz band. Simulation results show that the autocorrelation based NPSS detection method is more effective than the cross-correlation based NPSS detection using frequency offset estimation and compensation before the NPSS received timing detection from the viewpoints of PCID detection probability and computational complexity. We also show that when using autocorrelation based NPSS detection, the loss in the PCID detection probability at the carrier frequency of fc =28GHz compared to that for fc =3.5GHz is only approximately 5% at the average received signal-to-noise ratio (SNR) of 0dB when the frequency stability of a local oscillator of a user equipment (UE) set is 20ppm. Therefore, we conclude that the multiplexing schemes and sequences of NPSS and NSSS based on the NB-IoT radio interface associated with autocorrelation based NPSS detection will support the 28-GHz frequency spectra.

Most aggregate signature schemes are relying on pairings, but high computational and storage costs of pairings limit the feasibility of those schemes in practice. Zhao proposed the first pairing-free aggregate signature scheme (AsiaCCS 2019). However, the security of Zhao's scheme is based on the hardness of a newly introduced non-standard computational problem. The recent impossibility results of Drijvers et al. (IEEE S&P 2019) on two-round pairing-free multi-signature schemes whose security based on the standard discrete logarithm (DL) problem have strengthened the view that constructing a pairing-free aggregate signature scheme which is proven secure based on standard problems such as DL problem is indeed a challenging open problem. In this paper, we offer a novel solution to this open problem. We introduce a new paradigm of aggregate signatures, i.e., aggregate signatures with an additional pre-communication stage. In the pre-communication stage, each signer interacts with the aggregator to agree on a specific random value before deciding messages to be signed. We also discover that the impossibility results of Drijvers et al. take effect if the adversary can decide the whole randomness part of any individual signature. Based on the new paradigm and our discovery of the applicability of the impossibility result, we propose a pairing-free aggregate signature scheme such that any individual signature includes a random nonce which can be freely generated by the signer. We prove the security of our scheme based on the hardness of the standard DL problem. As a trade-off, in contrast to the plain public-key model, which Zhao's scheme uses, we employ a more restricted key setup model, i.e., the knowledge of secret-key model.

A universal interconnection network implements arbitrary interconnections among n terminals. This paper considers a problem to realize such a network using contact switches. When n=2, it can be implemented with a single switch. The number of different connections among n terminals is given by the Bell number B(n). The Bell number shows the total number of methods to partition n distinct elements. For n=2, 3, 4, 5 and 6, the corresponding Bell numbers are 2, 5, 15, 52, and 203, respectively. This paper shows a method to realize an n terminal universal interconnection network with $rac {3}{8}(n^2-1)$ contact switches when n=2m+1≥5, and $rac {n}{8}(3n+2)$ contact switches, when n=2m≥6. Also, it shows that a lower bound on the number of contact switches to realize an n-terminal universal interconnection network is ⌈log 2B(n)⌉, where B(n) is the Bell number.

LIME is a method for low-light image enhancement. Though LIME significantly enhances the contrast in dark regions, the effect of contrast enhancement tends to be insufficient in bright regions. In this letter, we propose an improved method of LIME. In the proposed method, the contrast in bright regions are improved while maintaining the contrast enhancement effect in dark regions.

Coded-aperture imaging has been utilized for compressive light field acquisition; several images are captured using different aperture patterns, and from those images, an entire light field is computationally reconstructed. This method has been extended to dynamic light fields (moving scenes). However, this method assumed that the patterns were gray-valued and of arbitrary shapes. Implementation of such patterns required a special device such as a liquid crystal on silicon (LCoS) display, which made the imaging system costly and prone to noise. To address this problem, we propose the use of a binary aperture pattern rotating along time, which can be implemented with a rotating plate with a hole. We demonstrate that although using such a pattern limits the design space, our method can still achieve a high reconstruction quality comparable to the original method.

Data parallelism is the dominant method used to train deep learning (DL) models on High-Performance Computing systems such as large-scale GPU clusters. When training a DL model on a large number of nodes, inter-node communication becomes bottle-neck due to its relatively higher latency and lower link bandwidth (than intra-node communication). Although some communication techniques have been proposed to cope with this problem, all of these approaches target to deal with the large message size issue while diminishing the effect of the limitation of the inter-node network. In this study, we investigate the benefit of increasing inter-node link bandwidth by using hybrid switching systems, i.e., Electrical Packet Switching and Optical Circuit Switching. We found that the typical data-transfer of synchronous data-parallelism training is long-lived and rarely changed that can be speed-up with optical switching. Simulation results on the Simgrid simulator show that our approach speed-up the training time of deep learning applications, especially in a large-scale manner.

Recently, the controllability of complex networks has become a hot topic in the field of network science, where the driver nodes play a key and central role. Therefore, studying their structural characteristics is of great significance to understand the underlying mechanism of network controllability. In this paper, we systematically investigate the nodal centrality of driver nodes in controlling complex networks, we find that the driver nodes tend to be low in-degree but high out-degree nodes, and most of driver nodes tend to have low betweenness centrality but relatively high closeness centrality. We also find that the tendencies of driver nodes towards eigenvector centrality and Katz centrality show very similar behaviors, both high eigenvector centrality and high Katz centrality are avoided by driver nodes. Finally, we find that the driver nodes towards PageRank centrality demonstrate a polarized distribution, i.e., the vast majority of driver nodes tend to be low PageRank nodes whereas only few driver nodes tend to be high PageRank nodes.

In the context of Web 2.0, the interaction between users and resources is more and more frequent in the process of resource sharing and consumption. However, the current research on resource pricing mainly focuses on the attributes of the resource itself, and does not weigh the interests of the resource sharing participants. In order to deal with these problems, the pricing mechanism of resource-user interaction evaluation based on multi-agent game theory is established in this paper. Moreover, the user similarity, the evaluation bias based on link analysis and punishment of academic group cheating are also included in the model. Based on the data of 181 scholars and 509 articles from the Wanfang database, this paper conducts 5483 pricing experiments for 13 months, and the results show that this model is more effective than other pricing models - the pricing accuracy of resource resources is 94.2%, and the accuracy of user value evaluation is 96.4%. Besides, this model can intuitively show the relationship within users and within resources. The case study also exhibits that the user's knowledge level is not positively correlated with his or her authority. Discovering and punishing academic group cheating is conducive to objectively evaluating researchers and resources. The pricing mechanism of scientific and technological resources and the users proposed in this paper is the premise of fair trade of scientific and technological resources.

In this letter, we investigate tight analytical and asymptotic upper bounds for bit error rate (BER) of constitutional codes over exponentially correlated Nakagami-m fading channels. Specifically, we derive the BER expression depending on an exact closed-form formula for pairwise error event probabilities (PEEP). Moreover, the corresponding asymptotic analysis in high signal-to-noise ratio (SNR) regime is also explored, which is verified via numerical results. This allows us to have explicit insights on the achievable coding gain and diversity order.

Codebooks with small inner-product correlation have applied in direct spread code division multiple access communications, space-time codes and compressed sensing. In general, it is difficult to construct optimal codebooks achieving the Welch bound or the Levenstein bound. This paper focuses on constructing asymptotically optimal codebooks with characters of cyclic groups. Based on the proposed constructions, two classes of asymptotically optimal codebooks with respect to the Welch bound are presented. In addition, parameters of these codebooks are new.

Boarding is the last step of aircraft turnaround and its completion in the shortest possible time is desired. In this paper, we propose a new boarding strategy that outperforms conventional strategies such as the back-to-front strategy and the outside-in strategy. The Steffen method is known as one of the most efficient boarding strategies in literature, but it is hard to be realized in the real situation because the complete sorting of passengers in a prescribed order is required. The proposed strategy shows a performance close to that of the Steffen method and can be easily implemented by using a special gate system.

The unattended malicious nodes pose great security threats to the integrity of the IoT sensor networks. However, preventions such as cryptography and authentication are difficult to be deployed in resource constrained IoT sensor nodes with low processing capabilities and short power supply. To tackle these malicious sensor nodes, in this study, the trust computing method is applied into the IoT sensor networks as a light weight security mechanism, and based on the theory of Chebyshev Polynomials for the approximation of time series, the trust data sequence generated by each sensor node is linearized and treated as a time series for malicious node detection. The proposed method is evaluated against existing schemes using several simulations and the results demonstrate that our method can better deal with malicious nodes resulting in higher correct packet delivery rate.

A nonvolatile field-programmable gate array (NV-FPGA), where the circuit-configuration information still remains without power supply, offers a powerful solution against the standby power issue. In this paper, an NV-FPGA is proposed where the programmable logic and interconnect function blocks are described in a hardware description language and are pushed through a standard-cell-based design flow with nonvolatile flip-flops. The use of the standard-cell-based design flow makes it possible to migrate any arbitrary process technology and to perform architecture-level simulation with physical information. As a typical example, the proposed NV-FPGA is designed under 55nm CMOS/100nm magnetic tunnel junction (MTJ) technologies, and the performance of the proposed NV-FPGA is evaluated in comparison with that of a CMOS-only volatile FPGA.