Multipath routing employs multiple parallel paths between the source and destination for a connection request to improve resource utilization of a network. In this paper, we present an integrated design of multipath routing with delay constraints and failure survivability in MPLS networks. By combining the failure survivability schemes into the multipath routing algorithms, path protection or restoration policies will enable the network to accommodate link failures and at the same time achieve significant improvement on network resource utilization. We propose a number of multipath routing algorithms, working-backup path selection and bandwidth allocation schemes. We evaluate the performance of the proposed schemes in terms of call blocking probability, network resource utilization and load balancing factor. Extensive simulation results validate the effectiveness of the proposed schemes. In particular, we compare these multipath schemes to the existing failure recovery schemes that mostly focus on single path routing. The results demonstrate that the proposed integrated design framework can provide effective network failure survivability, and also achieve better load balancing and/or higher network resource utilization.

The model selection for neural networks is an essential procedure to get not only high levels of generalization but also a compact data model. Especially in terms of getting the compact model, neural networks usually outperform other kinds of machine learning methods. Generally, models are selected by trial and error testing using whole learning samples given in advance. In many cases, however, it is difficult and time consuming to prepare whole learning samples in advance. To overcome these inconveniences, we propose a hybrid on-line learning system for a radial basis function (RBF) network that repeats quick learning of novel instances by rote during on-line periods (awake phases) and repeats pseudo rehearsal for model selection during out-of-service periods (sleep phases). We call this system Incremental Learning with Sleep (ILS). During sleep phases, the system basically stops the learning of novel instances, and during awake phases, the system responds quickly. We also extended the system so as to shorten the periodic sleep periods. Experimental results showed the system selects more compact data models than those selected by other machine learning systems.

The watershed transform has been used as a powerful morphological segmentation tool in a variety of image processing applications. This is because it gives a good segmentation result if a topographical relief and markers are suitably chosen for different type of images. This paper proposes a parallel implementation of the watershed transform on the cellular neural network (CNN) universal machine, called cellular watersheds. Owing to its fine grain architecture, the watershed transform can be parallelized using local information. Our parallel implementation is based on a simulated immersion process. To evaluate our implementation, we have experimented on the CNN universal chip, ACE16k, for synthetic and real images.

In recent years, the inherent effectiveness of Peer-to-Peer (P2P) networks has been advocated to address scalability issues in large scale Internet-based on-Demand streaming services. Most of existing works adopt Cache-and-Relay (CR) scheme to exploit a cooperative paradigm among peers. In this paper, we mainly present our practical evaluation study of the scalability of the CR scheme by taking into account of more than 20,000,000 collected real traces. Based on trace-driven simulations, we conclude that the CR scheme is not as effective as previously reported in terms of saving server bandwidth.

Recently, self-reconfigurable devices which can be partially reprogrammed by other part of the same device have been proposed. However, since conventional self-reconfigurable devices are LUT-array-based fine-grained devices, their time efficiency is spoiled by overhead for reconfiguration time to load large amount of configuration data. Therefore, we have to improve architectures. At the architecture design phase, it is difficult to estimate the performance, including reconfiguration overhead, of self-reconfigurable devices by static analysis, since it depends on many architecture parameters and unpredictable run-time behavior. In this paper, we propose a simulation-based platform for design exploration of self-reconfigurable devices. As a demonstration of the proposed platform, we implement an adaptive load distribution model on the devices of various reconfiguration granularities and evaluate performance of the devices.

This paper proposes a novel signal estimation method that uses a tensor product expansion. When a bivariable function, which is expressed by two-dimensional matrix, is subjected to conventional tensor product expansion, two single variable functions are calculated by minimizing the mean square error between the input vector and its outer product. A tensor product expansion is useful for feature extraction and signal compression, however, it is difficult to separate global noise from other signals. This paper shows that global noise, which is observed in almost all input signals, can be estimated by using a tensor product expansion where absolute error is used as the error function.

This paper presents a simple and effective method to further reduce the search points in multilevel successive elimination algorithm (MSEA). Because the calculated sea values of those best matching search points are much smaller than the current minimum SAD, we can simply increase the calculated sea values to increase the elimination ratio without much affecting the coding quality. Compared with the original MSEA algorithm, the proposed strict MSEA algorithm (SMSEA) can provide average 6.52 times speedup. Compared with other lossy fast ME algorithms such as TSS and DS, the proposed SMSEA can maintain more stable image quality. In practice, the proposed technique can also be used in the fine granularity SEA (FGSEA) algorithm and the calculation process is almost the same.

A lossless data embedding method that inserts data in images in the spatial domain is proposed in this paper. Though a lossless data embedding method once distorts an original image to embed data into the image, the method restores the original image as well as extracts hidden data from the image in which the data are embedded. To guarantee the losslessness of data embedding, all pixel values after embedding must be in the dynamic range of pixels. Because the proposed method modifies some pixels to embed data and leaves other pixels as their original values in the spatial domain, it can easily keep all pixel values after embedding in the dynamic range of pixels. Thus, both the capacity and the image quality of generated images are simultaneously improved. Moreover, the proposed method uses only one parameter based on the statistics of pixel blocks to embed and extract data. By using this parameter, this method does not require any reference images to extract embedded data nor any memorization of the positions of pixels in which data are hidden to extract embedded data. In addition, the proposed method can control the capacity for hidden data and the quality of images conveying hidden data by controlling the only one parameter. Simulation results show the effectiveness of the proposed method; in particular, it offers images with superior image quality to conventional methods.

A fully integrated broadband up-conversion mixer with low power consumption is demonstrated on 90 nm CMOS technology in this paper. This mixer has a single-ended input and a multi-layer stacked Marchand balun is used for converting the differential output of the single-balanced mixer topology to a single-ended output. This balun employs inductive coupling between two metal layers and includes slotted shields to reduce substrate losses. The circuit size is 650 µm570 µm. At 22.1 GHz, the integrated mixer achieves a conversion gain of 2 dB with a maximum power dissipation of only 11.1 mW from a 1.2 V dc power supply at LO power of 5 dBm. Input referred 1-dB compression point is -14.8 dBm. The LO and RF return loss are better than 10 dB for frequencies between 20-26 GHz.

Recently, research on parallel processing systems is very active, and many complex topologies have been proposed. A burnt pancake graph is one such topology. In this paper, we prove that a faulty burnt pancake graph with degree n has a fault-free Hamiltonian cycle if the number of the faulty elements is n-2 or less, and it has a fault-free Hamiltonian path between any pair of nonfaulty nodes if the number of the faulty elements is n-3 or less.

In this paper, we discuss TCP performance in a wireless overlay network where wireless LANs and cellular networks are integrated. In the overlay network, vertical handover, where a mobile node changes its access link during a session, is one of the most important technologies. When a vertical handover occurs, throughput performance of a TCP flow is degraded due to not only packet losses during the handover, but drastic change of its bandwidth-delay product. In this paper, we propose an ACK-pacing mechanism for TCP congestion control to improve the performance degradation. The proposed system is receiver-driven, so no modification is required to the mechanism of TCP sender. In the proposed system, a TCP receiver adjusts a transmission rate of ACKs according to the relationship between bandwidth-delay products before and after a handover. Since the ACK-clocking mechanism of TCP adjusts the transmission rate of TCP segments, the TCP receiver can seamlessly adjust its congestion window size to the new bandwidth-delay product. Computer simulation results show that the proposed system can improve the TCP performance during the vertical handover.

Parallel downloading retrieves different pieces of a file from different servers simultaneously and so is expected to greatly shorten file fetch times. A key requirement is that the different servers must hold the same file. We have already proposed a proxy system that can ensure file freshness and concordance. In this paper, we combine parallel downloading with the proxy server technology in order to download a file quickly and ensure that it is the latest version. Our previous paper on parallel downloading took neither the downloading order of file fragments nor the buffer space requirements into account; this paper corrects those omissions. In order to provide the user with the required file in correct order as a byte stream, the proxy server must reorder the pieces fetched from multiple servers and shuffle in the delayed blocks as soon as possible. Thus, "substitution download" is newly introduced, which requests delayed blocks from other servers to complete downloading earlier. Experiments on substitution download across the Internet clarify the tradeoff between the buffering time and the redundant traffic generated by duplicate requests to multiple servers. As a result, the pseudo-optimum balance is discovered and our method is shown both not to increase downloading time and to limit the buffer space. This network software can be applied to download files smoothly absorbing the difference in performance characteristics among heterogeneous networks.

Data grid consists of scattered computing and storage resources located dispersedly in the grid network. These large sized data sets are replicated in more than one site for the better availability to the other nodes in a grid. Downloading the dataset from these replicated locations have practical difficulties and we find interest in a co-allocated download framework, which enables parallel download of replicated data from multiple servers. In this paper, we proposed a dynamic co-allocation scheme for parallel data transfer in grid environment, which copes up with highly inconsistent network and server performance. The model comprises of co-allocator, monitor and control mechanisms. The scheme initially obtains the bandwidth parameter from the monitor module to fix the partition size and the data transfer tasks are allocated onto the servers in duplication. In this way, the process of data transfer can neither be interrupted nor paralyzed, even when the network link is broken or server crash. We used Globus toolkit for our framework by making use of grid information and GridFTP services. We compared our scheme with the existing schemes and the results show notable improvement in overall completion time of data transfer.

This paper proposes a maximum likelihood sequence estimation (MLSE) for the differential space-time block code (DSTBC) in cooperation with blind linear prediction (BLP) of fast frequency-flat fading channels. This method that linearly predicts the fading complex envelope derives its linear prediction coefficients by the method of Lagrange multipliers, and does not require data of decision-feedback or information on the channel parameters such as the maximum Doppler frequency in contrast to conventional ones. Computer simulations under fast fading conditions demonstrate that the proposed method with an appropriate degree of polynomial approximation is superior in BER performance to the conventional method that estimates the coefficients by the RLS algorithm using a training sequence.

For more efficient data transmissions, a new MLP/BP-based channel equalizer is proposed to compensate for multi-path fading in wireless applications. In this work, for better system performance, we apply the soft output and the soft feedback structure as well as the soft decision channel decoding. Moreover, to improve packet error rate (PER) and bit error rate (BER), we search for the optimal scaling factor of the transfer function in the output layer of the MLP/BP neural networks and add small random disturbances to the training data. As compared with the conventional MLP/BP-based DFEs and the soft output MLP/BP-based DFEs, the proposed MLP/BP-based soft DFEs under multi-path fading channels can improve over 3-0.6 dB at PER=10-1 and over 3.3-0.8 dB at BER=10-3.

Accurate estimating or measuring the intake manifold absolute pressure plays an important role in automobile engine control. In order to achieve the real-time estimation of the absolute pressure, the high accuracy and high speed processing ability are required for automobile engine control systems. Therefore, in this paper, an analog method is discussed and a fully integrated analog circuit is proposed to simulate automobile intake systems. Furthermore, a novel behavioral macromodeling is proposed for the analog circuit design. With the analog circuit, the intake manifold absolute pressure, which plays an important role for the effective automobile engine control, can be accurately estimated or measured in real time.

Under the assumption that clock can be inputted to each register at an arbitrary timing, the minimum feasible clock period can be determined if delays between registers are given. This minimum feasible clock period might be reduced by register relocation maintaining the circuit behavior and topology. In this paper, we propose a gate-level register relocation method to reduce the minimum feasible clock period. The proposed method is a greedy local circuit modification method. We prove that the proposed method achieves the clock period achieved by retiming with delay decomposition, if the delay of each element in the circuit is unique. Experiments show that the computation time of the proposed method and the number of registers of a circuit obtained by the proposed method are smaller than those obtained by the retiming method in the conventional synchronous framework.

A Multi-Functional unit has several functions and these can be changed with a control signal. For High-Level Synthesis, using Multi-Functions units in operation chaining make it possible to obtaining the solution with the same number of control steps and less resources compared to that without them. This paper proposes an operation chaining method considering Multi-Functional units. The method formulates module selection, scheduling, and functional unit allocation with operation chaining as a 0/1 integer linear problem and obtains optimal solution with minimum number of control steps under area and clock-cycle type constraints. The first contribution of this paper is to propose the global search for operation chaining with Multi-Functional units having multiple outputs as well as with single output. The second contribution is to condier the area constraint as a resource constraint instead of the type and number of functional units. Experimental results show that chaining with Multi-Functional units is effective and the proposed method is useful to evaluate heuristic algorithms.

We propose a new tableau construction which builds an FSM, instead of a Kripke structure, from a formula in a class of temporal logic named ASTL. This FSM is a maximal model of the formula under the preorder derived from simulation relations. Additionally, we propose a method using the tableaus to build controllers in a certain topology of interconnected FSMs. We can use ASTL to describe the desired behaviors of the control system. This method is applicable to generating digital circuits. Moreover, this method accepts a wider range of specifications than conventional methods.

We have successfully applied Generalized Multiprotocol Label Switching (GMPLS) architecture to the Wavelength Assignment Photonic Switching System (WAPS) to create an internet access system that can provide, between terminals, not only conventional best-effort type of IP packet forwarding, but also high-speed and Quality of Service (QoS)-guaranteed IP forwarding. In this paper the system architecture, system specifications, and system hardware/software implementations are described.