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[Keyword] Al(20498hit)

16301-16320hit(20498hit)

  • VLSI Architecture of Switching Control for AAL Type2 Switch

    Masahide HATANAKA  Toshihiro MASAKI  Takao ONOYE  Koso MURAKAMI  

     
    PAPER

      Vol:
    E83-A No:3
      Page(s):
    435-441

    This paper presents the switching control and VLSI architecture for the AAL2 switch. The ATM network with the AAL2 switch can efficiently transmit low-bit-rate data, even if the network has many endpoints. The switch is capable of not only switching AAL2 cells but also converting the header of other types of ATMs. The AAL2 switch is integrated into a single chip. The proposed ATM network is constructed by AAL2 switches attached to the ATM switches.

  • Computing the Invariant Polynomials of Graphs, Networks and Matroids

    Hiroshi IMAI  

     
    INVITED SURVEY PAPER-Algorithms for Matroids and Related Discrete Systems

      Vol:
    E83-D No:3
      Page(s):
    330-343

    The invariant polynomials of discrete systems such as graphs, matroids, hyperplane arrangements, and simplicial complexes, have been theoretically investigated actively in recent years. These invariants include the Tutte polynomial of a graph and a matroid, the chromatic polynomial of a graph, the network reliability of a network, the Jones polynomial of a link, the percolation function of a grid, etc. The computational complexity issues of computing these invariants have been studied and most of them are shown to be #P-complete. But, these complexity results do not imply that we cannot compute the invariants of a given instance of moderate size in practice. To meet large demand of computing these invariants in practice, there have been proposed a framework of computing the invariants by using the binary decision diagrams (BDD for short). This provides mildly exponential algorithms which are useful to solve moderate-size practical problems. This paper surveys the BDD-based approach to computing the invariants, together with some computational results showing the usefulness of the framework.

  • Matter-Conserved Replication Causes Computational Universality

    Kosaku INAGAKI  

     
    LETTER-General Fundamentals and Boundaries

      Vol:
    E83-A No:3
      Page(s):
    579-580

    Signal conservation logic (SCL) is a model of logic for the physical world subject to the matter conservation law. This letter proves that replication, complementary replication, and computational universality called elemental universality are equivalent in SCL. Since intelligence has a close relation to computational universality, the presented theorem may mean that life under the matter conservation law eventually acquires some kind of intelligence.

  • Graph Coloring Algorithms

    Xiao ZHOU  Takao NISHIZEKI  

     
    INVITED SURVEY PAPER-Graph Algorithms

      Vol:
    E83-D No:3
      Page(s):
    407-417

    Graph coloring is a fundamental problem, which often appears in various scheduling problems like the file transfer problem on computer networks. In this paper, we survey recent advances and results on the edge-coloring, the f-coloring, the [g,f]-coloring, and the total coloring problem for various classes of graphs such as bipartite graphs, series-parallel graphs, planar graphs, and graphs having fixed degeneracy, tree-width, genus, arboricity, unicyclic index or thickness. In particular, we review various upper bounds on the minimum numbers of colors required to color these classes of graphs, and present efficient sequential and parallel algorithms to find colorings of graphs with these numbers of colors.

  • Approximation Algorithms for Multiprocessor Scheduling Problem

    Satoshi FUJITA  Masafumi YAMASHITA  

     
    INVITED SURVEY PAPER-Approximate Algorithms for Combinatorial Problems

      Vol:
    E83-D No:3
      Page(s):
    503-509

    In this paper, we consider the static multiprocessor scheduling problem for a class of multiprocessor systems consisting of m ( 1) identical processors connected by a complete network. The objective of this survey is to give a panoramic view of theoretical and/or practical approaches for solving the problem, that have been extensively conducted during the past three decades.

  • Quality of Service Guarantee in a Combined Input Output Queued Switch

    Tsern-Huei LEE  Yaw-Wen KUO  Jyh-Chiun HUANG  

     
    PAPER-ATM Switch and System Development

      Vol:
    E83-B No:2
      Page(s):
    190-195

    Combined input output queued (CIOQ) architecture such as crossbar with speedup has recently been proposed to build a large capacity switch for broadband integrated services networks. It was shown that, for a speedup factor of 2, a CIOQ switch can achieve 100% throughput with a simple maximal matching algorithm. Achieving 100% throughput, however, is not sufficient for per-connection quality of service (QoS) guarantee. In [2],[3], it is proved that a CIOQ switch with a speedup factor of 2 can exactly emulate an output queued (OQ) switch if stable matching is adopted. Unfortunately, the complexity of currently known algorithms makes stable matching impractical for high-speed switches. In this paper, we propose a new matching algorithm called the least cushion first/most urgent first (LCF/MUF) algorithm and formally prove that a CIOQ switch with a speedup factor of 2 can exactly emulate an OQ switch which adopts any service discipline for cell transmission. A potential implementation of our proposed matching algorithm for strict priority service discipline is also presented.

  • A Phasor Model with Resting States

    Teruyuki MIYAJIMA  Fumihito BAISHO  Kazuo YAMANAKA  Kazuhiko NAKAMURA  Masahiro AGU  

     
    LETTER-Biocybernetics, Neurocomputing

      Vol:
    E83-D No:2
      Page(s):
    299-301

    A new phasor model of neural networks is proposed in which the state of each neuron possibly takes the value at the origin as well as on the unit circle. A stability property of equilibria is studied in association with the energy landscape. It is shown that a simple condition guarantees an equilibrium to be asymptotically stable.

  • Designing Efficient Hough Transform by Noise-Level Shaping

    Hideaki GOTO  Hirotomo ASO  

     
    PAPER-Image Processing, Image Pattern Recognition

      Vol:
    E83-D No:2
      Page(s):
    242-250

    A large number of techniques have been proposed for acceleration of the Hough Transform, because the transformation is computationally very expensive in general. It is known that the sampling interval in parameter space is strongly related to the computation cost. The precision of the transformation and the processing speed are in a trade-off relationship. No fair comparison of the processing speed between various methods was performed in all previous works, because no criterion had been given for the sampling interval of parameter, and because the precision of parameter was not equal between methods. At the beginning of our research, we derive the relationship between the sampling interval and the precision of parameter. Then we derive a framework for comparing computation cost under equal condition for precision of parameter, regarding the total number of sampling points of a parameter as the computation cost. We define the transformation error in the Hough Transform, and the error is regarded as transformation noise. In this paper we also propose a design method called "Noise-level Shaping," by which we can set the transformation noise to an arbitrarily level. The level of the noise is varied according to the value of a parameter. Noise-level Shaping makes it possible for us to find the efficient parameterization and to find the efficient sampling interval in a specific application of the Hough Transform.

  • Synthesizing Sectored Antennas by the Genetic Algorithm to Mitigate the Multipath of Indoor Millimeter Wave Channel

    Chien-Hung CHEN  Chien-Ching CHIU  

     
    PAPER

      Vol:
    E83-A No:2
      Page(s):
    350-356

    The genetic algorithm is used to synthesize the directional circular arc array as a sectored antenna. Then, the performance of this sectored antenna in indoor wireless millimeter wave channel is investigated. Based on the desired pattern and the topography of the antennas, the synthesis problem can be reformulated into an optimization problem and solved by the genetic algorithm. The genetic algorithm will always converge to global extreme instead of local extreme and achieves a good approximation to the desired pattern. Next, the impulse responses of the indoor channel for any transmitter-receiver location are computed by shooting and bouncing ray/image techniques. By using the impulse response of multipath channel, the performance of the sectored antenna on BPSK (binary phase shift keying) system with phase and timing recovery circuits is presented. Numerical results show that the synthesized sectored antenna is effective to combat the multipath fading and can increase the transmission rate of indoor millimeter wave system.

  • Nonlinear Inverse Filter Using ε -Filter and Its Application to Image Restoration

    Hiroaki WATABE  Kaoru ARAKAWA  Yasuhiko ARAKAWA  

     
    PAPER

      Vol:
    E83-A No:2
      Page(s):
    283-290

    A nonlinear inverse filter is proposed for restoring signals degraded by a linear system and additive Gaussian noise. The proposed filter consists of combination of a linear high pass filter and an ε-filter, which is modified from the cascaded linear filter. The nonlinear property of the ε-filter is utilized to suppress pre-enhanced additive random noise and to restore sharp edges. It is demonstrated that the filter can be reduced to a multi-layered neural network model, and the optimal design is described by using the back propagation algorithm. The nonlinear function is approximated by a piecewise linear function, which results in simple and robust training algorithm. An application to image restoration is also presented, illustrating the effectiveness over the linear filter, especially when the amplitude of additive noise is small.

  • A Contention-Free Tbit/sec Packet-Switching Architecture for ATM over WDM Networks

    Itamar ELHANANY  Dan SADOT  

     
    PAPER-ATM Switch and System Development

      Vol:
    E83-B No:2
      Page(s):
    225-230

    Future high-speed switches and routers will be expected to support a large number of ports at high line rates carrying traffic with diverse statistical properties. Accordingly, scheduling mechanisms will be required to handle Tbit/sec aggregated capacity while providing quality of service (QoS) guarantees. In this paper a novel high-capacity switching scheme for ATM/WDM networks is presented. The proposed architecture is contention-free, scalable, easy to implement and requires no internal "speedup. " Non-uniform destination distribution and bursty cell arrivals are examined when studying the switching performance. Simulation results show that at an aggregated throughput of 1 Tbit/sec, low latency is achieved, yielding a powerful solution for high-performance packet-switch networks.

  • A Single-Chip Stereo Audio Delta-Sigma A/D Converter with 117 dB Dynamic Range

    Ichiro FUJIMORI  

     
    PAPER

      Vol:
    E83-A No:2
      Page(s):
    243-251

    A 24-bit, 96 kHz stereo A/D converter (ADC) for DVD-audio has been developed. The single-chip integrates stereo delta-sigma modulators (Δ ΣM's), a voltage reference, and a decimation filter. A fourth-order cascaded Δ ΣM using a local feedback technique was employed to avoid overload without sacrificing noise performance. Low power switched-capacitor techniques were used for implementation. A two-stage decimation filter architecture that reduces digital switching noise was also developed. A merged multi-stage comb filter was used for the first stage, and a bit-serial finite-impulse-response (FIR) filter was used for the second stage. The 18.0 mm2 chip was fabricated in 0.6-µm CMOS with low threshold devices. Measured results show 117 dB A-weighted dynamic range in the 20 kHz passband, with 470 mW power dissipation at 5 V operation.

  • Preplanned Restoration and Optimal Capacity Placement on ATM Multicast Tree

    Yih-Fuh WANG  Jen-Fa HUANG  

     
    PAPER-Traffic Control and Network Management

      Vol:
    E83-B No:2
      Page(s):
    281-292

    The ATM multicast Tree (AMT) is the Mbone of video/audio conferencing and other multicasting applications in ATM (Asynchronous Transfer Mode) networks. However, real problems such as temporarily moving switches, changing optic fiber connections and/or tangible/intangible failures of ATM networks will cause many service disruptions. Thus we must carefully consider the system's SQOS (Survivable QOS) when we construct the system. A point-to-point self-healing scheme utilizing a conventional pre-planned backup mechanism is proposed to protect the AMT from failure. This scheme uses point-to-point pre-planned backup Root-to-Leaf Routes (RLR) as the root-to-leaf structure of an AMT. Though AMT protection via preplanned backup RLR requires no search time, duplicate paths may cause redundant bandwidth consumption. This paper also proposes a closest-node method, which can locate the minimum-length route structure during the initial design and also rebuild the AMT in the event of a network failure. To enhance the survivability of the system, we introduce two near optimal re-routing algorithms, a most-decent search algorithm, and also a predictive-decent search algorithm in order to find the minimum lost flow requirement. These near optimal schemes use search technique to guide the local optimal lost flow to the most-decent lost flow direction. The predictive way is an especially economical technique to reduce the calculation complexity of lost flow function. For the evaluation of the feasibility and performance of the new schemes, we simulate AMT restoration and the simulation results show the closest-node scheme provides superior AMT restoration compared to a system with a preplanned point-to-point backup scheme. In addition, the predictive-decent search algorithm is faster than the most-decent search one.

  • A Phase Compensation Technique without Capacitors for the CMOS Circuit with a Very Low Impedance Terminal

    Eitake IBARAGI  Akira HYOGO  Keitaro SEKINE  

     
    PAPER

      Vol:
    E83-A No:2
      Page(s):
    236-242

    A lower impedance terminal is necessary for an input terminal of current-mode circuits and an output terminal of voltage-mode circuits to reduce an error and distortion in analog signal processing. Thus, the CMOS circuit with a very low impedance terminal (VLIT circuit) is a useful analog building block to achieve the above purpose. The very low impedance terminal in the VLIT circuit is performed by a shunt-series feedback configuration. However, the feedback generates a problem of instability and/or oscillation at the same time. The problem can be removed by a phase compensation capacitor as known well, but the capacitor is not desirable for integrated circuits due to its large area. This paper proposes a new phase compensation technique for the VLIT circuit. The proposed technique does not need any capacitors to obtain a sufficient phase margin, and instead gives us the appropriate transistor sizes (Width and length of the gate). As a result, the VLIT circuit has an enough phase margin and operates stably.

  • PNNI Internetworking Architecture over ATM Public Networks

    Mitsuaki KAKEMIZU  Kazunori MURATA  Masaaki WAKAMOTO  

     
    PAPER-Traffic Control and Network Management

      Vol:
    E83-B No:2
      Page(s):
    307-312

    An increase in high quality of service (QoS) applications such as video conferencing and distribution, and the evolution of the Internet have popularized ATM-LAN use based on the private network node interface (PNNI). Also in public networks, which serve as backbone networks for LANs, ATM technology is being introduced for high-speed and broadband communication. These situations lead to a great demand for economically and seamlessly interconnecting remote ATM-LANs via ATM public networks, which are based on broadband ISDN user part (BISUP). This paper discusses a method of peer group configuration method for such internetworking architecture that can avoid an overload of the PNNI routing processing in each peer group. The paper also proposes a method for seamless interconnection of remote ATM-LANs. In this method, complete PNNI signaling and routing is executed between a local switch (LS) in a public network and each ATM-LAN. It also can reduce the PNNI routing processing load on each public network by emulating PNNI routing and signaling between LSs.

  • Fuzzy Rule-Based Edge Detection Using Multiscale Edge Images

    Kaoru ARAKAWA  

     
    PAPER

      Vol:
    E83-A No:2
      Page(s):
    291-300

    Fuzzy rule-based edge detection using multiscale edge images is proposed. In this method, the edge image is obtained by fuzzy approximate reasoning from multiscale edge images which are obtained by derivative operators with various window sizes. The effect of utilizing multiscale edge images for edge detection is already known, but how to design the rules for deciding edges from multiscale edge images is not clarified yet. In this paper, the rules are represented in a fuzzy style, since edges are usually defined ambiguously, and the fuzzy rules are designed optimally by a training method. Here, the fuzzy approximate reasoning is expressed as a nonlinear function of the multiscale edge image data, and the nonlinear function is optimized so that the mean square error of the edge detection be the minimum. Computer simulations verify its high performance for actual images.

  • On the Impossibility of Non-blocking Consistent Causal Recovery

    Byoungjoo LEE  Taesoon PARK  Heon Y. YEOM  Yookun CHO  

     
    LETTER-Fault Tolerance

      Vol:
    E83-D No:2
      Page(s):
    291-294

    Causal message logging has many benefits such as nonblocking message logging and no rollback propagation. In this paper, we consider the problem of the recovery in causally-logged distributed system and give a condition for consistent recovery. We then show that, based on the impossibility of the consensus, the consistent causal recovery cannot be solved in asynchronous systems.

  • Approaches for Reducing Power Consumption in VLSI Bus Circuits

    Kunihiro ASADA  Makoto IKEDA  Satoshi KOMATSU  

     
    INVITED PAPER

      Vol:
    E83-C No:2
      Page(s):
    153-160

    This paper summarizes power reduction methods applicable for VLSI bus systems in terms of reduction of signal swing, effective capacitance reduction and reduction of signal transition, which have been studied in authors' research group. In each method the basic concept is reviewed quickly along with some examples of its application. A future perspective is also described in conclusion.

  • An Architecture Supporting Quality-of-Service in Virtual-Output-Queued Switches

    Rainer SCHOENEN  

     
    PAPER-ATM Switch and System Development

      Vol:
    E83-B No:2
      Page(s):
    171-181

    Input buffered switches most efficiently use memory and switch bandwidth. With Virtual Output Queueing (VOQ), head-of-line blocking can be avoided, thus breaking the throughput barrier of 58.6%. In this paper a switch architecture based on VOQ is proposed, which offers deterministic and stochastic delay bounds for prioritized traffic. This is achieved by a hybrid static and dynamic arbitration scheme, which matches ports both by a precalculated schedule and realtime calculations. By using weighted dynamic arbitration algorithms 100% throughput with lowest delays under all admissible traffic can be achieved. An integrated global priority scheme allows the multiplexing of realtime and data traffic. Following the arbitration decision, a cell scheduler decides locally in the input ports upon the next connection from which a cell is forwarded. Cell scheduling based on earliest-deadline-first (EDF) is shown to perform similar to its behaviour in an output-queued switch.

  • 3D Face Expression Estimation and Generation from 2D Image Based on a Physically Constraint Model

    Takahiro ISHIKAWA  Shigeo MORISHIMA  Demetri TERZOPOULOS  

     
    PAPER-Image Processing, Image Pattern Recognition

      Vol:
    E83-D No:2
      Page(s):
    251-258

    Muscle based face image synthesis is one of the most realistic approaches to the realization of a life-like agent in computers. A facial muscle model is composed of facial tissue elements and simulated muscles. In this model, forces are calculated effecting a facial tissue element by contraction of each muscle string, so the combination of each muscle contracting force decides a specific facial expression. This muscle parameter is determined on a trial and error basis by comparing the sample photograph and a generated image using our Muscle-Editor to generate a specific face image. In this paper, we propose the strategy of automatic estimation of facial muscle parameters from 2D markers'movements located on a face using a neural network. This corresponds to the non-realtime 3D facial motion capturing from 2D camera image under the physics based condition.

16301-16320hit(20498hit)