The genetic algorithm is used to synthesize the directional circular arc array as a sectored antenna. Then, the performance of this sectored antenna in indoor wireless millimeter wave channel is investigated. Based on the desired pattern and the topography of the antennas, the synthesis problem can be reformulated into an optimization problem and solved by the genetic algorithm. The genetic algorithm will always converge to global extreme instead of local extreme and achieves a good approximation to the desired pattern. Next, the impulse responses of the indoor channel for any transmitter-receiver location are computed by shooting and bouncing ray/image techniques. By using the impulse response of multipath channel, the performance of the sectored antenna on BPSK (binary phase shift keying) system with phase and timing recovery circuits is presented. Numerical results show that the synthesized sectored antenna is effective to combat the multipath fading and can increase the transmission rate of indoor millimeter wave system.

Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; (iv) basic LV building blocks; (v) multi-stage frequency compensation topologies; and (vi) fully-differential and fully-balanced systems.

It is proposed a novel method that optimizes nonlinear filters by unsupervised learning using a novel definition of morphological pattern spectrum, called "morphological opening/closing spectrum (MOCS)." The MOCS can separate smaller portions of image objects from approximate shapes even if the shapes are degraded by noisy pixels. Our optimization method analogizes the linear low-pass filtering and Fourier spectrum: filter parameters are adjusted to reduce the portions of smaller sizes in MOCS, since they are regarded as the contributions of noises like high-frequency components. This method has an advantage that it uses only target noisy images and requires no example of ideal outputs. Experimental results of applications of this method to optimization of morphological open-closing filter for binary images are presented.

A new phasor model of neural networks is proposed in which the state of each neuron possibly takes the value at the origin as well as on the unit circle. A stability property of equilibria is studied in association with the energy landscape. It is shown that a simple condition guarantees an equilibrium to be asymptotically stable.

The Communications Research Laboratory (CRL), the National Astronomical Observatory (NAO), the Institute of Space and Astronoutical Science (ISAS), and the Telecommunication Network Laboratory Group of Nippon Telegraph and Telephone Corporation (NTT) have developed a very-long-baseline-connected-interferometry array, maximum baseline-length was 208 km, using a high-speed asynchronous transfer mode (ATM) network with an AAL1 that corresponds to the constant bit-rate protocol. The very long baseline interferometry (VLBI) observed data is transmitted through a 2.488-Gbps [STM-16/OC-48] ATM network instead of being recorded onto magnetic tape. By combining antennas via a high-speed ATM network, a highly-sensitive virtual (radio) telescope system was realized. The system was composed of two real-time VLBI networks: the Key-Stone-Project (KSP) network of CRL (which is used for measuring crustal deformation in the Tokyo metropolitan area), and the OLIVE (optically linked VLBI experiment) network of NAO and ISAS which is used for astronomy (space-VLBI). These networks operated in cooperation with NTT. In order to realize a virtual telescope, the acquired VLBI data were corrected via the ATM networks and were synthesized using the VLBI technique. The cross-correlation processing and data observation were done simultaneously in this system and radio flares on the weak radio source (HR1099) were detected.

Two different examples have been respectively given by Aggarwal and Viswanathan to establish the necessity of (n + 2)/5 edge guards for spiral polygons. However, the former example is incorrect. To show why it is wrong, we give an alternate proof of sufficiency of (n + 2)/5 edge guards for spiral polygons. Our proof is simpler than the sufficiency proof given by Viswanathan.

To provide QoS guarantees for each connection, efficient scheduling algorithms, such as WFQ, have been proposed. These algorithms assume a certain amount of buffer is allocated for each connection to provide loss free transmission of packets. This buffer allocation policy, however, requires much buffer space especially when many connections are sharing a link. In this paper we propose the use of partial buffer sharing (PBS) policy combined with usage parameter control (UPC) for efficient buffer management and flexible QoS control in ATM switches. We evaluate the feasibility of the proposed method by solving a Markov model. We also show that using the proposed method, we can control the cell loss ratio (CLR) independently of the delay. Numerical evaluations are presented, which indicates the PBS combined with UPC significantly reduces the buffer size required to satisfy given cell loss ratios.

This paper describes the effect of lowering the supply voltage and threshold voltages on the energy reduction of an ultralow-voltage multi-threshold CMOS/SIMOX (MTCMOS/SIMOX) circuit. The energy dissipation is evaluated using a graph with equispeed and equienergy lines on a supply voltage and a threshold voltage plane. In order to draw equispeed and equienergy lines for ultralow-voltage circuits, we propose a modified energy-evaluation model taking into account a input-waveform transition-time of the circuits. The validity of the proposed energy-evaluation model is confirmed by the evaluation of a gate-chain TEG and a 16-bit CLA adder fabricated with 0.25-µm MTCMOS/SIMOX technology. Using the modified model, the energy-reduction effect in lowering the supply voltage is evaluated for a single-Vth fully-depleted CMOS/SOI circuit, a dual-Vth CMOS circuit consisting of fully-depleted low- and medium-Vth MOSFETs, and a triple-Vth MTCMOS/SIMOX circuit. The evaluation reveals that lowering the supply voltage of the MTCMOS/SIMOX circuit to 0.5 V is advantageous for the energy reduction at a constant operating speed.

This paper presents a robust and nonblocking group membership protocol for large-scale distributed systems. This protocol uses the causal relation between membership-updating messages (i. e. , those specifying the adding and deleting of members) and allows the messages to be executed in a nonblocking manner. It differs from conventional group membership protocols in the following points: (1) neither global locking nor global synchronization is required; (2) membership-updating messages can be issued without being synchronized with each other, and they can be executed immediately after their arrival. The proposed protocol therefore is highly scalable, and is more tolerant to node and network failures and to network partitions than are the conventional protocols. This paper proves that the proposed protocol works properly as long as messages can eventually be received by their destinations. This paper also discusses some design issues, such as multicast communication of the regular messages, fault tolerance and application to reliable communication protocols (e. g. , TCP/IP).

An analog standard cell layout configuration is proposed for simplifying the design and reducing the man-hours for designing mixed analog-digital LSIs, and analog standard cells are fabricated for A-D and D-A converters with Δ-Σ modulators. This works seeks to implement 2-D cell placement with up-down and left-right mirror rotation and shorter high-impedance analog wiring than conventional 1-D placement in order to obtain high-performance analog characteristics. By considering sensitivity to noise, routing channels have been classified into 4 types: high-impedance analog, low-impedance analog, analog-digital, and digital, and efforts have been made to prevent analog wires from crossing over digital wires. In addition to power and analog ground wires, analog standard cells have built-in analog ground wires with attached wells optimized for shielding. These wires are interconnected to a new isolation cell that separates analog circuits from digital circuits and routing channels. Based on the above layout structure, 46 different types of analog standard cells have been designed. Also, the analog part of Δ-Σ type A-D and D-A converters can be automatically designed in conjunction with interactive processing and chips fabricated by using these cells. It was found that, compared to manual design, one could easily obtain a chip occupying less than 1.5-times the area with about 2/3 the man-days using this approach. In comparison with manual design, it was also found that the S/N ratio could be reduced from about 6 to 7 dB.

This paper describes a distributed traffic control scheme for large multi-stage ATM switching systems. When a new virtual circuit is to be added from some source line-interface unit (LU) to a destination LU, the system must find an optimal path through the system to accommodate the new circuit. Conventional systems have a central control processor and control lines to manage the bandwidth of all the links in the systems. The central control processor handles all the virtual circuits, but have trouble doing this when the switching system becomes large because of the limited ability of the central processor to handle the number of virtual circuits. A large switching system with Tbit/s-class throughput requires a distributed traffic control scheme. In our proposed switching system, each port of the basic switches has its own traffic monitor. Operation, administration, and maintenance (OAM) cells that are defined inside the system carry the path-congestion information to the LUs, enabling each LU to route new virtual circuits independently. A central control processor and control lines are not required. The performance of the proposed system depends on the interval between OAM cells. This paper shows how an optimal interval can be determined in order to maximize the bandwidth for user cells. This traffic control scheme will suit future Tbit/s ATM switching systems.

Causal message logging has many benefits such as nonblocking message logging and no rollback propagation. In this paper, we consider the problem of the recovery in causally-logged distributed system and give a condition for consistent recovery. We then show that, based on the impossibility of the consensus, the consistent causal recovery cannot be solved in asynchronous systems.

This paper presents a new data hiding scheme via steganographic image transformation, which is different from conventional data hiding techniques. The transformation is achieved in the frequency domain and the concept of Fourier filtering method is used. An input image is transformed into a fractal image, which can be used in Computer Graphic (CG) applications. One of the main advantages of this scheme is the amount of data to be hidden (embedded) is equal to that of the host signal (generated fractal image) while it is in general limited in the conventional data hiding schemes. Also both the opened fractal image and the hidden original one can be properly used depending on the situation. Unauthorized users will not notice the "secret" original image behind the fractal image, but even if they know that there is a hidden image it will be difficult for them to estimate the original image from the transformed image. Only authorized users who know the proper keys can regenerate the original image. The proposed method is applicable not only as a security tool for multimedia contents on web pages but also as a steganographic secret communication method through fractal images.

This paper proposes an Iterated Function System (IFS) which can reduce effects of quantization errors of the IFS parameters. The proposed method skips conventional analog-parameter search and directly selects optimum IFS parameters from pools of discrete IFS parameters. In conventional IFS-based image coding the IFS parameters are quantized after their analog optimum values are determined. The image reconstructed from the quantized parameters is degraded with errors that are traced back to quantization errors amplified in the iterated mappings. The effectiveness of this new realistic approach is demonstrated by simulation results over the conventional method.

In this paper, we present two parallel algorithms for computing the all nearest neighbors of an n n binary image on the Bulk-Synchronous Parallel(BSP) model. The BSP model is an asynchronous parallel computing model, where its communication features are abstracted by two parameters L and g: L denotes synchronization periodicity and g denotes a reciprocal of communication bandwidth. We propose two parallel algorithms for the all nearest neighbor problems based on two distance metrics. The first algorithm is for Lp distance, and the second algorithm is for weighted distance. Both two algorithms run in O(n2/p + L) computation time and in O(g(n/p) + L) communication time using p (1 p n) processors and in O(n2/p + (d+L)(log(p/n)/log(d+1))) computation time and in O(g(n/p) + (gd+L)(log(p/n)/log(d+1))) communication time using p (n< p n2) processors on the BSP model, for any integer d(1 dp/n).

This paper investigates some fundamental properties of 2-way alternating multi-counter automata (2amca's) with only existential (universal) states which have sublinear space and 1 inkdot. It is shown that for any function s(n) log n such that log s(n)=o(log n), s(n) space-bounded 1-inkdot 2amca's with only existential states are incomparable with the ones with only universal states, and the ones with only existential (universal) states are not closed under complementation.

An ATMS (Assumption-based Truth Maintenance System) has been widely used for maintaining the truth of an information by detecting and solving the contradictions in rule-based systems. However, the ATMS cannot correctly maintain the truth of the information in case that the generated information is satisfied within a time interval or includes data about temporal relations of events in time varying situations, because it has no mechanism manipulating temporal data. In this paper, we propose the extended ATMS that can maintain the truth of the information in the knowledge-based system using information changing over time or temporal relations of events. To maintain the contexts generated by relations of events, we modify the label representation method, the disjunction and conjunction simplification method in the label-propagation procedure and the nogood handling method of the conventional ATMS.

Prefetching is a promising approach to tackle the memory latency problem. Two basic variants of hardware data prefetching methods are sequential prefetching and stride prefetching. The latter based on stride calculation of future references has the potential to out-perform the former which is based on the data locality. In this paper, a typical stride prefetching and its improved version, adaptive stride prefetching, are compared in quantitative way using simulation for some parallel benchmark programs in the context of uniform memory access and non-uniform memory access architectures. The simulation results show that adaptability of stride is essential since the proposed adaptive scheme can reduce pending stall time which is large in the typical scheme.

The purpose of this paper is to deal with the problem of recovering a signal from its noisy version. One example is to restore old images degraded by noise. The recovery solution is given within the framework of series expansion and we shall show that for the general case the recovery functions have to be elements of an extended pseudo biorthogonal basis (EPBOB) in order to suppress efficiently the corruption noise. After we discuss the different situations of noise, we provide some methods to construct the optimal EPBOB in order to deal with these situations.

We have developed a parameter optimization tool, Monte Carlo Josephson simulator (MJSIM), for rapid single flux quantum (RSFQ) digital circuits based on a Monte Carlo yield analysis. MJSIM can generate a number of net lists for the JSIM, where all parameter values are varied randomly according to the Gaussian distribution function, and calculate the circuit yields automatically. MJSIM can also produce an improved parameter set using the algorithm of the center-of-gravity method. In this algorithm, an improved parameter vector is derived by calculating the average of parameter vectors inside and outside the operating region. As a case study, we have optimized the circuit parameters of an RS flip-flop, and investigated the validity and efficiency of this optimization method by considering the convergency and initial condition dependence of the final results. We also proposed a method for accelerating the optimization speed by increasing 3σ spreads of the parameter distribution during the optimization.