This paper presents a computationally efficient subspace-based method for partially adaptive beamforming which is based on the structure of the generalized sidelobe canceller (GSC). Its auxiliary beamformer operates in an estimated interference subspace which is obtained through simple computation. The computational burden of the proposed method in terms of complex multiplication is just on O(η2M) where η and M are the numbers of interferences and the array elements, respectively. Though the subspace obtained is different from the exact interference subspace due to the presence of noise, theoretical analysis shows that the proposed beamfomer virtually attains the optimal performance for strong or sidelobe interference. Simulation results validate its effectiveness including fast convergence, even in the presence of errors in the detected number of directional signals.

As semiconductor manufacturing technology advances, power dissipation and noise in scan testing have become critical problems. Our studies on practical LSI manufacturing show that power supply voltage drop causes testing problems during shift operations in scan testing. In this paper, we present a new testing method named MD-SCAN (Multi-Duty SCAN) which solves power supply voltage drop problems, as well as its experimental results applied to practical LSI chips.

The partially rotational scan (PRS) technique greatly reduces the amount of data needed for n-detection testing. It also enables at-speed testing using low-speed testers. We designed tester intellectual properties (tester IP) with PRS for Viper and COMET II processors. When PRS was applied to a Viper processor, we obtained test data that provided the same fault coverage as with a set of automatic test pattern generation (ATPG) test vectors, although the amount of test data was 16% that of the ATPG. When the PRS technique was applied to a COMET II processor with full-scan design, we obtained test data that provided the same fault coverage as with a set of ATPG test vectors, although the amount of test data was 10% that of the ATPG. We also estimated hardware overhead and test time.

A mechanical phase shifter is designed for beam scanning in co-phase fed single-layer slotted waveguide arrays. The multiple-way power divider in this array consists of a series of π-junctions with one guide wavelength spacing in a feed waveguide. The movable narrow walls placed between the π-junctions perturb the guide wavelength as well as the phase of output ports. Method of Moment (MoM) analysis for one unit consisting of one movable plate and two junctions is conducted to estimate the available phase shift as well as the degradation of reflection. A phase shift of 86 degrees is predicted between two π-junctions under the condition of reflection below -20 dB; experiments at 4 GHz confirmed the design. The beam scanning capability of the arrays is also surveyed and the beam-scanning of about 10 degrees is predicted.

In this paper, an interference cancellation (IC) scheme for a multirate VPG DS/CDMA system is evaluated in a multipath fading mobile channel and is designed to accommodate the multimedia sources of varying data-rate requirements. In the this scheme, the strongest user with high-rate transmission will benefit from the multiple access interference (MAI) reduction of the weaker users, which yields more clean estimates in the next cancellation stage. From the numerical results, the proposed scheme outperforms the conventional SIC scheme under the condition of the approximately identical decoding delay at the cost of the hardware burden.

This letter introduces a novel multi-user detection method, successive interference cancellation based on the order of log-likelihood-ratio(LLR-SIC), for code division multiple access (CDMA) systems. Unlike the conventional successive interference cancellation (SIC) based on the order of correlation, LLR-SIC operates on the fact that the user with the largest absolute value of log-likelihood ratio (LLR) should be first detected and cancelled from received signal. Simulation results show that LLR-SIC significantly outperforms the conventional SIC and partial parallel interference cancellation (P-PIC) over Rayleigh fading channels, and that LLR-SIC performance is not sensitive to channel estimation error at medium Eb/N0.

This paper discusses far-end crosstalk (FEXT) cancellation methods for multicarrier transmission system. A system arrangement and its tap update method are proposed when FEXT cancelers and a frequency-domain equalizer (FEQ) are jointly adapted to combat channel intersymbol interference, FEXT, and other additive noise. We present mathematical formulation of minimum mean-square error (MSE) and the optimum tap coefficients for the FEXT cancelers and the FEQ when FEXT cancellation techniques are introduced for multiuser discrete multitone (DMT) based very high-speed digital subscriber line (VDSL) transmission. It is shown that FEXT cancellation enhances the achievable bit rate in FEXT-limited systems. Computer simulation and analytical results show that the performance of jointly adapted FEXT cancelers and an FEQ is better than that of separately adapted FEXT cancelers and an FEQ.

A new bipolar scan waveform is proposed to increase the light emission duty factor by achieving the fast address in AC plasma display panel (AC-PDP). The new bipolar scan waveform consists of two-step scan pulse, which can separate the address discharge mode into two different discharge modes: a space charge generation mode and a wall charge accumulation mode. By adopting the new bipolar scan waveform, the light emission duty factor is increased considerably under the single scan ADS driving scheme due to the reduction of address time per single subfield.

In the past decade, significant effort has been made toward increasing the accuracy and robustness of three-dimensional scanning methods. In this paper, we present a new prototype vision system named 3D Model Studio, which has been built to reconstruct a complete 3D model in as less as a few minutes. New schemes for a probe calibration and a 3D data merging (axis consolidation) are employed. We also propose a new semi-automatic contour registration method to generate accurate contour model from 3D data points, along with a contour triangulation based surface reconstruction. Experimental result shows that our system works well for reconstructing a complete 3D surface model of a human body.

We propose a technique of selecting seeds for the LFSR-based test pattern generators that are used in VLSI BISTs. By setting the computed seed as an initial value, target fault coverage, for example 100%, can be accomplished with minimum test length. We can also maximize fault coverage for a given test length. Our method can be used for both test-per-clock and test-per-scan BISTs. The procedure is based on vector representations over GF(2m), where m is the number of LFSR stages. The results indicate that test lengths derived through selected seeds are about sixty percent shorter than those derived by simple seeds, i.e. 0001, for a given fault coverage. We also show that seeds obtained through this technique accomplish higher fault coverage than the conventional selection procedure. In terms of the c7552 benchmark, taking a test-per-scan architecture with a 20-bit LFSR as an example, the number of undetected faults can be decreased from 304 to 227 for 10,000 LFSR patterns using our proposed technique.

A test generation method with time-expansion model can achieve high fault efficiency for acyclic sequential circuits, which can be obtained by partial scan design. This method, however, requires combinational test pattern generation algorithm that can deal with multiple stuck-at faults, even if the target faults are single stuck-at faults. In this paper, we propose a test generation method for acyclic sequential circuits with a circuit model, called MS-model, which can express multiple stuck-at faults in time-expansion model as single stuck-at faults. Our procedure can generate test sequences for acyclic sequential circuits with just combinational test pattern generation algorithm for single stuck-at faults. Experimental results show that test sequences for acyclic sequential circuits with high fault efficiency are generated in small computational effort.

This paper proposes a new algorithm to control an adaptive duplexer for multiband software radio. It uses a wideband low isolation device combined with a two-tap/two-loop adjustable canceller to eliminate the need for multiple switched high isolation duplexers. The taps are adjusted to provide isolation peaks in the transmit and receive bands. The algorithm is based on the superposition of squared errors and achieved 66 dB isolation of the transmit signal and a 37 dB cancellation of the transmitter noise in the receiver band.

OFDM is a good scheme to transmit high rate data under a multi-path environment. With a sufficiently long guard interval (GI), it is possible to totally eliminate interference between symbols or carriers with OFDM. However, long guard intervals reduce the spectrum efficiency of OFDM. Thus, shortening the guard interval as much as possible is highly desirable. As short guard intervals will usually result in interference in an OFDM system, an interference canceller would be necessary to enable the use of short guard intervals without unduly degrading system performance. This paper presents a possible adaptive interference cancellation scheme for OFDM to help attain this objective.

The adaptive cross-spectral (ACS) technique recently introduced by Okuno et al. provides an attractive solution to acoustic echo cancellation (AEC) as it does not require double-talk (DT) detection. In this paper, we first introduce a generalized ACS (GACS) technique where a step-size parameter is used to control the magnitude of the incremental correction applied to the coefficient vector of the adaptive filter. Based on the study of the effects of the step-size on the GACS convergence behaviour, a new variable step-size ACS (VSS-ACS) algorithm is proposed, where the value of the step-size is commanded dynamically by a special finite state machine. Furthermore, the proposed algorithm has a new adaptation scheme to improve the initial convergence rate when the network connection is created. Experimental results show that the new VSS-ACS algorithm outperforms the original ACS in terms of a higher acoustic echo attenuation during DT periods and faster convergence rate.

A two stage non-scan design for testability method is proposed. The first stage selects test points based on an earlier testability measure conflict. A new design for testability algorithm is proposed to select test points by a fault-oriented testability measure conflict+ in the second stage. Test points are selected in the second stage based on the hard faults after the initial ATPG run of the design for testability circuit in the preliminary stage. The new testability measure conflict+ based on conflict analysis of hard-faults in the process of test generation is introduced, which emulates most general features of sequential ATPG. The new testability measure reduces testability of a fault to the minimum D or controllability of the primary outputs, and therefore, does not need observability measure any more. Effective approximate schemes are adopted to get reasonable estimation of the testability measure. A couple of effective techniques are also adopted to accelerate the process of the proposed design for testability algorithm. Experimental results show that the proposed method gets even better results than two of the recent non-scan design for testability methods nscan and lcdft.

Interference Cancellation (IC) receivers can be used in CDMA cellular systems to improve the capacity. The IC receivers can be divided into two main categories, Single-User Detectors (SUD) and Multi-User Detectors (MUD). They have different characteristics in terms of intra-cell and inter-cell interference cancellation ratios. In this paper we first introduce the Normalized Griffiths' algorithm, a SUD receiver, and compare its basic performance with the well-known Serial IC. Next we examine the multi-cell performance of SUD and MUD receivers by using multi-cell link-level simulations. The results show that even though MUD receiver has clearly better single-cell performance, the SUD receiver will gain in performance in the multi-cell cases. In the three-sector multi-cell case, their performance even becomes very similar. These results are obtained using ideal conditions to be able to study the receivers' basic properties related to intra-cell and inter-cell interference.

We propose an interference-canceller-aided (ICA) code timing acquisition scheme, code acquisition in short subsequently, for initial synchronization of direct sequence-code division multiple access (DS-CDMA) systems with interference cancellation (IC). The scheme removes completely or partially multiple access interference (MAI) due to the already-synchronized users from the received signal prior to code acquisition of a desired user. Code acquisition is then performed using the MAI-reduced signal. We compare the ICA code acquisition scheme with the conventional non-ICA scheme in terms of the probability of correct acquisition and the code timing accuracy. Simulation results shows that the proposed scheme can accommodate many more users than the conventional one and provide reliable code timing estimates even under many more interfering users.

A low complexity multi-user receiver with blind channel estimation and multiple access interference (MAI) suppression is proposed for a CDMA system under multipath fading and frequency offset. The design of the receiver involves the following procedure. First, a method of joint MAI suppression and channel estimation is developed based on the generalized sidelobe canceller (GSC) technique. In particular, channel estimates are obtained blindly in the form of the effective composite signature vectors (CSV) of the users. Second, a low-complexity partially adaptive (PA) realization of the receiver is proposed which incorporates reduced-rank processing based on the information of multi-user CSV's. By a judiciously designed decorrelating procedure, a new PA receiver is obtained with a much lower complexity. Finally, pilot symbols assisted frequency offset estimation and channel gain compensation give the estimate of users' symbols. Further performance enhancement is achieved by a decision aided scheme in which the signal is reconstructed and subtracted from the receiver input data, leading to significantly faster convergence. The proposed receiver is shown to be robust to multipath fading and frequency offset, and achieves nearly the same performance of the optimal maximum SINR and MMSE receivers with a much lower overhead for pilot symbols.

A reduced complexity multiple-input multiple-output (MIMO) equalizer with ordered successive interference cancellation (OSIC) is proposed for combating intersymbol interference (ISI) and cochannel interference (CCI) over frequency-selective multipath channels. It is developed as a reduced-rank realization of the conventional MMSE decision feedback equalizer (DFE). In particular, the MMSE weight vectors at each stage of OSIC are computed based on the generalized sidelobe canceller (GSC) technique and reduced-rank processing is incorporated by using the conjugate gradient (CG) algorithm for reduced complexity implementation. The CG algorithm leads to a best low-rank representation of the GSC blocking matrix via an iterative procedure, which in turn gives a reduced-rank equalizer weight vector achieving the best compromise between ISI and CCI suppression. With the dominating interference successfully cancelled at each stage of OSIC, the number of iterations required for the convergence of the CG algorithm decreases accordingly for the desired signal. Computer simulations demonstrate that the proposed reduced-rank MIMO DFE can achieve nearly the same performance as the full-rank MIMO MMSE DFE with an effective rank much lower than the dimension of the signal-plus-interference subspace.

In this letter, we present a practical method of implementing the parallel interference cancellation (PIC) algorithm in an asynchronous CDMA system. A novel pipelined structure is employed in this method in order to reduce the processing delay and the memory space comparing to the conventional PIC processing scheme.