An even-harmonic mixer using a bipolar differential pair (bipolar harmonic mixer;BHMIX) is theoretically analyzed from the direct conversion point of view; i.e, conversion gain, third-order input intercept point (IIP3), self-mixing induced dc offset level, and second-order input intercept point (IIP2). Also, noise are analyzed based on nonlinear large-signal model, and numerical results are given. Noises are treated as cyclostationary noises, thus all the folding effects are taken into account. Factors determining IIP3, IIP2, dc offset, and noise are identified and estimation procedures for these characteristics are obtained. For example, design guidelines for the optimal noise performance are given. Measured results support all the analysis results, and they are very useful in the practical BHMIX design.

We design and demonstrate a high repetition-rate similariton generation system using normal dispersion fiber amplifiers (NDFA's). We numerically calculate the pulse evolution in NDFA's and clarify the condition to generate similariton pulses in a finite-length NDFA. Then we design the similariton generation system in consideration of the use of Erbium-doped fibers (EDF's) and show that a km-long fiber amplifier with low normal dispersion can generate a high repetition-rate similariton train from practical pico-second pulse sources. In the experiment, we demonstrate a 10-GHz similariton source using a 1.2-km-long EDF. For application to multi-wavelength light sources, we measure the bit-error rate of the spectrally sliced similariton, and show that it exhibits low-noise performance, which is attributed to the spectral flatness.

Self-stabilization is a theoretical framework of non-masking fault-tolerant distributed algorithms. In this paper, we investigate a self-stabilizing distributed approximation for the minimum k-dominating set (KDS) problem in general networks. The minimum KDS problem is a generalization of the well-known dominating set problem in graph theory. For a graph G = (V,E), a set Dk V is a KDS of G if and only if each vertex not in Dk is adjacent to at least k vertices in Dk. The approximation ratio of our algorithm is , where Δ is the maximum degree of G, in the networks of which the minimum degree is more than or equal to k.

Japanese terrestrial digital broadcasting (ISDB-T) began in 2003. To spread its signals throughout the country, optical fibers will be used to complement radio-wave networks. This paper describes recent applications of optical transmission of ISDB-T. It also describes our research on re-transmission with 40-GHz Radio On Fiber technology.

Most of the proposed self-similar traffic models are asymptotic in nature. Hence, they are less effective in queueing-based performance evaluation when the buffer sizes are small. In this paper, we propose a short range dependent (SRD) process modelling by a generalized variance-based Markovian fitting to provide effective queueing-based performance measures when buffer sizes are small. The proposed method is to match the variance of the exact second-order self-similar processes. The fitting procedure determines the related parameters in an exact and straightforward way. The resultant traffic model essentially consists of a superposition of several two-state Markov-modulated Poisson processes (MMPPs) with distinct modulating parameters. We present how well the resultant MMPP could emulate the variance of original self-similar traffic in the range of the specified time scale, and could provide more accurate bounds for the queueing-based performance measures, namely tail probability, mean waiting time and loss probability. Numerical results show that both the second-order statistics and queueing-based performance measures when buffer capacity is small are more accurate than that of the variance-based fitting where the modulating parameters of each superposed two-state MMPP are equal. We then investigate the relationship between time scale and the number of superposed two-state MMPPs. We found that when the performance measures pertaining to larger time scales are not better than that of smaller ones, we need to increase the number of superposed two-state MMPPs to maintain the accurate and reliable queueing-based performance measures. We then conclude from the extensive numerical examples that an exact second-order self-similar traffic can be well represented by the proposed model.

This paper describes a sub-1-V power-supply, which is useful for self-powered short-range wireless systems with ambient energy sources. A variable-stage DC-DC converter, which consists of multi-stage switched capacitor circuits and has intermittent operation with an external capacitor, makes it possible to extend the time for self-powered operation. We fabricated a variable-stage DC-DC converter and an intermittent operation circuit with a 0.8-µm CMOS/SOI process. We also applied the sub-1-V power-supply system to a self-powered short-range wireless system and verified its effectiveness.

For a kernel-based topographic map formation, kMER (kernel-based maximum entropy learning rule) was proposed by Van Hulle, and some effective learning rules related to kMER have been proposed so far with many applications. However, no discusions have been made concerning the determination of the number of units in kMER. This letter describes a unit-pruning rule, which permits automatic contruction of an appropriate-sized map to acquire the global topographic features underlying the input data. The effectiveness and the validity of the present rule have been confirmed by some preliminary computer simulations.

This paper proposes an efficient methodology of delay fault testing of processor cores using their instruction sets. These test vectors can be applied in the functional mode of operation, hence, self-testing of processor core becomes possible for path delay fault testing. The proposed approach uses a graph theoretic model (represented as an Instruction Execution Graph) of the datapath and a finite state machine model of the controller for the elimination of functionally untestable paths at the early stage without looking into the circuit details and extraction of constraints for the paths that can potentially be tested. Parwan and DLX processors are used to demonstrate the effectiveness of our method.

Energy-efficient operations are essential to prolonging the lifetime of wireless sensor networks. Clustering sensor nodes is one approach that can reduce energy consumption by aggregating data, controlling transmission power levels, and putting redundant sensor nodes to sleep. To distribute the role of a cluster head, clustering approaches should be based on efficient cluster configuration schemes. Therefore, low overhead in the cluster configuration process is one of the key constraints for energy-efficient clustering. In this paper, we present an autonomous clustering approach using a coverage estimation-based self-pruning algorithm. Our strategy for clustering is to allow the best candidate node within its own cluster range to declare itself as a cluster head and to dominate the other nodes in the range. This same self-declaration strategy is also used in the active sensor election process. As a result, the proposed scheme can minimize clustering overheads by obviating both the requirements of collecting neighbor information beforehand and the iterative negotiating steps of electing cluster heads. The proposed scheme allows any type of sensor network application, including spatial query execution or periodic environment monitoring, to operate in an energy-efficient manner.

In this paper, we investigate packet loss and system dimensioning of feedback (FB) type wavelength division multiplexing (WDM) optical routers under asynchronous and variable packet length self-similar traffic. We first study the packet loss performance for two different types of WDM optical routers under asynchronous and variable packet length self-similar traffic. Based on simulation results, we demonstrate that a 1616 FB type WDM optical router employing more than 4 re-circulated ports without using void filling (VF) algorithm has better performance. We then present the system dimensioning issues of FB type WDM optical routers, by showing the performance of FB type WDM optical routers as a function of the number of re-circulated ports, buffer depth, re-circulation limit, basic delay unit in the fiber delay line optical buffers and traffic characteristics. The sensitivity of the mutual effects of the above parameters on packet loss is investigated in details. Based on our results, we conclude that the FB type WDM optical routers must be dimensioned with the appropriate number of re-circulated ports, re-circulation limits, buffer depth, and optimal basic delay unit in the fiber delay line optical buffers under relevant traffic characteristics to achieve high switching performance.

The ring Fp + uFp + + uk-1Fp may be of interest in coding theory, which have already been used in the construction of optimal frequency-hopping sequence. In this work, cyclic codes over Fp + uFp + + uk-1Fp which is an open problem posed in [1] are considered. Namely, the structure of cyclic code over Fp + uFp + + uk-1Fp and that of their duals are derived.

Cryptosystems for smartcard are required to provide protection from Differential Power Analysis (DPA) attack. Self-timed circuit based cryptosystems demonstrate considerable resistance against DPA attack, but they take substantial circuit area. A novel approach offering up to 30% area reduction and maintaining DPA protection level close to DIMS scheme is proposed.

Available Bit Rate (ABR) flow control is an effective measure in ATM network congestion control. In large scale and high-speed network, the simplicity of algorithm is crucial to optimize the switch performance. Although the binary flow control is very simple, the queue length and allowed cell rate (ACR) controlled by the standard EFCI algorithm oscillate with great amplitude, which has negative impact on the performance, so its applicability was doubted, and then the explicit rate feedback mechanism was introduced and explored. In this study, the model of binary flow control is built based on the fluid flow theory, and its correctness is validated by simulation experiments. The linear model describing the source end system how to regulate the cell rate is obtained through local linearization method. Then, we evaluate and analyze the standard EFCI algorithm using the describing function approach, which is well-developed in nonlinear control theory. The conclusion is that queue and ACR oscillations are caused by the inappropriate nonlinear control rule originated from intuition, but not intrinsic attribute of the binary flow control mechanism. The simulation experiments validate our analysis and conclusion. Finally, the new scheme about parameter settings is put forward to remedy the weakness existed in the standard EFCI switches without any change on the hardware architecture. The numerical results demonstrate that the new scheme is effective and fruitful.

This paper presents a novel self-excited ZVS half-bridge converter. This converter including a self-oscillating control circuit is very simply constructed. The converter achieves excellent efficiency, low voltage stress across the switches and low EMI noise by using zero-voltage-switching technique. This converter stores not only magnetic energy in the primary winding of the transformer but also electrostatic energy on the resonant capacitor during the on-periods, so that the converter realizes the miniaturization of the transformer, the reduced conduction losses and the low current stress in the switch. This paper analyzes the behavior of static characteristics by using an extending state-space-averaging method and presents design equations. Based on the analysis, two prototype converters are designed for a 120 W output and a 350 W output. Experimental results are given for two converters and they confirm the validity of the theory. The proposed converters have displayed excellent performance.

This paper introduces the problem of n mobile agents that repeatedly visit all n nodes of a given network, subject to the constraint that no two agents can simultaneously occupy a node. This paper first presents a self-stabilizing phase-based protocol for a tree network on a synchronous model. The protocol realizes agent traversal with O(Δn) time where n is the number of nodes and Δ is the maximum degree of any vertex in the communication network. The phase-based protocol can also be applied to an asynchronous model and a ring network. This paper also presents a self-stabilizing link-alternator-based protocol with agent traversal time of O(Δn) for a tree network on an asynchronous model. The protocols are proved to be asymptotically optimal with respect to the agent traversal time.

A fully integrated current-steering 10-b CMOS Digital-to-Analog Converter with on-chip terminated resistors is presented. In order to improve the device-mismatching problem of internal termination resistors, a self-calibrated current bias circuit is designed. With the self-calibrated current bias circuit, the gain error of the output voltage swing is reduced within 0.5%. For the purpose of reducing glitch noises, furthermore, a novel current switch based on a deglitching circuit is proposed. The prototype circuit has been fabricated with a 3 V 0.35 µm 2-poly 3-metal CMOS technology, and it occupies 1350 µm750 µm silicon area with 45 mW power consumption. The measured INL and DNL are within 0.5LSB, respectively. The measured SFDR is about 65 dB, when an input signal is about 8 MHz at 100 MHz clock frequency.

This paper describes a new fast learning algorithm for Self-Organizing Map employing a "rough comparison winner-take-all" and its digital hardware architecture. In rough comparison winner-take-all algorithm, the winner unit is roughly and strictly assigned in early and later learning stage, respectively. It realizes both of high accuracy and fast learning. The digital hardware of the self-organizing map with proposed WTA algorithm is implemented using FPGA. Experimental results show that the designed hardware is superior to other hardware with respect to calculation speed.

Feedforward neural networks have been successfully developed and applied in many areas because of their universal approximation capability. However, there still remains the problem of determining a suitable network structure for the given task. In this paper, we propose a novel self-organizing neural network which automatically adjusts its structure according to the task. Utilizing both the constructive and the pruning procedures, the proposed algorithm finds a near-optimal network which is compact and shows good generalization performance. One of its important features is reliability, which means the randomness of neural networks is effectively reduced. The resultant networks can have suitable numbers of hidden neurons and hidden layers according to the complexity of the given task. The simulation results for the well-known function regression problems show that our method successfully organizes near-optimal networks.

This paper presents a simple learning algorithm for network formation. The algorithm is based on self-organizing maps with growing cell structures and can adapt input data which correspond to nodes of the network. In basic numerical experiments, as a parameter is selected suitably, our algorithm can generate network having small-world-like structure. Such network structure appears in some natural networks and has advantages in practical systems.

We present a built-in self-reconfiguring system for a mesh-connected processor array where faulty processor elements are compensated for by spare processing elements located in one row and one column. It has advantages in that the number of spare processing elements is small and additional control circuits and networks for changing interconnections of processing elements is so simple that hardware overhead for reconfiguration is also small. First, to indicate the motivation to the proposed reconfiguration scheme, we briefly describe other schemes with the same number of spares as that of the proposed scheme where faulty processing elements are replaced using straight shifts toward spares, and compare their reconfiguration probabilities to each other. Then, we show that a variant of the proposed scheme has the highest probability. Next, we present a built-in self-reconfiguring system for the scheme and formally prove that it works correctly. It can automatically replace faulty processors by spare processors on detecting faults of processors.