This paper presents a view on coming photonic network in which machines are potential customer to the network. The network will be providing unlimited number of virtual free spaces in which point to point and broadcasting modes of information interchanges are taking place simultaneously. It is also pointed out that the Asynchronous Transfer Mode (ATM) should be evolved to support this type of network by using true photonic switching technology.

The paper studies a high-ranking node in a broadband integrated services digital network(B-ISDN). The input traffic is classified into two types: real-time and non-real-time. For each type of input traffic, we assume that the message arrival process is a batch Poisson process and that the message size is arbitrarily distributed so as to describe services from narrowband to wideband. We model the high-ranking node by a queueing system with multiple synchronous servers and two separate finite buffers, one for each type of traffic. We derive performance measures exactly by using a two-dimensional imbedded discrete-time Markov chain analysis, within which the transition probabilities are obtained via an application of the residue theorem in complex variables. The performance measures include the blocking probability, delay, and throughput.

To realize Broadband ISDN, which provides multi-media services, ATM (Asynchronous Transfer Mode) has been standardized by CCITT and the development of the system is accelerating towards the 21st century. The packet-oriented information transfer based on fixed size blocks called cells provides a very flexible allocation of transmission capacity to different connections. On the other hand, to ensure the QoS (Quality of Service) for all established connections it is necessary to monitor and regulate the input traffic from each user based on usage parameters which are negotiated between user and network at connection set-up, i.e., a policing function is required. In this paper some requirements for a policing function will be given. Accuracy of the policing decision for violating and well-behaving sources, tolerance with respect to cell delay variation (CDV) which is caused by multiplexing functions between the source terminal and the policing device, time to detect arriving violating cells, implementation complexity, and amount, i.e., cost effectiveness, are discussed mainly. We present simulation results for five policing mechanisms, Leaky Bucket (LB), Jumping Window (JW), and Moving Window (MW) which have been already well-known, Pseudo Jumping Window (PJW), and Pseudo Moving Window (PMW) which are proposed mechanisms. PJM and PMW mechanisms required a pseudo cell buffer with finite queueing capacity to the corresponding JW and MW mechanisms, respectively. These two mechanisms can be expected as advanced methods from view points of the accuracy of the policing for long-term fluctuated compliant source, fast reaction ability and restrictness to long burst traffic comparing with the above existing methods. We compare the five mechanisms based on the above requirements and show that the PJW and the LB are the most effective mechanisms for mean rate policing in ATM networks.

A new shared multibuffer architecture for high-speed ATM (Asynchronous Transfer Mode) switch LSIs is described. Multiple buffer memories are located between two crosspoint switches. By controlling the input-side crosspoint switch so as to equalize the utilization rate of each buffer memory, these multiple buffer memories can be recognized as a single large shared buffer memory. High utilization efficiency of buffer memory can thus be achieved, and the cell loss ratio is minimized. By accessing the buffer memories in parallel via crosspoint switches, the time required to access the buffer memories is greatly reduced. This feature enables high-speed operation of the switch. The shared multibuffer architecture was implemented in a switch LSI using 0.8-µm BiCMOS process technology. Experimental results revealed that this chip can operate at more than 125 MHz. Bit-sliced eight switch LSIs operating at 78 MHz construct a 622-Mb/s 88 ATM switching system with a buffer size of 1,024 ATM cells. Power consumption of the switch LSI was 3 W.

This paper proposes a compact high-speed ATM switching architecture that employs a novel arbitration method. The NN matrix shaped crosspoint switch is realized with D small switch blocks (SSBs). The number of crosspoints and address comparators is reduced from N2 to (N/D)2. Each block contains N/D input lines and N/D output lines. The association between output lines and output ports is logically changed each cell period. This arrangement permits each input port to be connected to N/D output ports in each cell period. Output-line contention control is realized block-by-block so high-speed operation is realized. The traffic characteristics of the proposed switch architecture are analyzed using computer simulations. According to the simulation results, the cell loss rate of 10-8 is achieved with only 100-cell input and output-buffers under the heavy random load of 0.9 for any size switch. The proposed ATM switching architecture can construct the Gbit/s high-speed ATM switch fabric needed for B-ISDN.

This paper proposes an ATM traffic management method that utilizes a deterministic source traffic descriptor, a deterministic Usage Parameter Control (UPC) algorithm and a conservative statistical bandwidth allocation method all of which were developed considering the Cell Delay Variation (CDV) typically experienced in ATM networks. For the source traffic descriptor, sliding time interval-type descriptors are proposed. A newly-structured UPC method which combines a sliding window-type circuit and a 2-phase credit window type circuit is proposed. The method is precise and accurate and requires only a small amount of hardware. The proposed parameter conversion method considers the CDV generated between User and UPC point. A bandwidth allocation method based on the worst clumping pattern and UPC output pattern is proposed. The network efficiency degradation caused by CDV is calculated. This traffic management method not only guarantees the QOS of all connections but also allows for large statistical multiplexing gains. The proposed method will, therefore, make it possible to create a more effective B-ISDN, one that can offer cost-effective broadband VBR services.

Widespread penetration of data communications in a LAN environment is generating a demand for high speed data transfer over wide area networks. It is anticipated that the connectionless (CL) service based on IEEE802.6 technology, called Switched Multi-megabit Data Service (SMDS), will be employed before this is realized by B-ISDN based technology. An important early application of B-ISDN will be interconnections between LANs, and continued support of the IEEE802.6 based CL service. This paper first reviews relevant technologies, clarifies comparison between IEEE802.6 based and B-ISDN based CL services, and points out that the important feature for users is that both CL services conform to the E.164 ISDN numbering plan for message addressing. Since an addressing scheme is the key to network services, conformity between the two will easily rationalize service migration from the IEEE802.6 based CL service to the B-ISDN based CL service. To permit such a service migration, this paper considers interworking scenarios for two CL services taking account of the penetration of inter-LAN communications. An exploring path is also presented to that users will not need to be aware of an alternation of network configuration, and smooth migration can take place. For facilitating high volume CL communications in the B-ISDN era, a virtual CL network is discussed to utilize ATM functionalities and to realize broadcasting and robust connectionless service capabilities. An overall comparison between a ring and mesh/star topology for the CL network is presented, and a detailed performance study is addressed in the context of Quality of Service which may depend on the particular application. This paper then describes a connectionless switch architecture in which a message switch combined with an ATM cell channel switch is presented. One scheme which receives specific attention here is a non-assembly message switching method to achieve robust switching capabilities. Typical performance evaluation results based on an M/G/1 queueing model are also reported.

Broadband multimedia information environments are part of the next big advance in communications and computer technology. The use of multimedia infrastructures in offices is becoming very important. This paper deals with a service concept and human interfaces based on a paper metaphor. The proposed service offers the advantages of paper and eliminates the disadvantages. The power of multimedia's expressiveness, user interaction, and hypermedia technology are key points of our solution. We propose a system configuration for implementing the service/human interface.

Broadband ISDN, using asynchronous transfer mode, are expected to carry traffic of different classes, each with its own set of traffic characteristics and performance requirements. To achieve the quality of service in ATM networks, a suitable buffer management scheme is needed. In this paper, we propose a buffer management scheme using a priority service discipline to improve the delay time of delay-sensitive class and the packet loss ratio of loss-sensitive class. The proposed priority scheme requires simple buffer management logic and minor processing overhead. We also analyze the delay time and the packet loss ratio for each class of service. The results indicate that the required buffer size of the proposed priority scheme is reduced and the delay time of each class of service is controlled by a parameter. If the control parameter is appropriately chosen, the quality of service of each class is improved.

Broadband ISDN based on ATM technologies is expected to offer enhanced and sophisticated services to customers. Since ATM will first be introduced in the business communication world, it will be worth to discuss the future image of desirable ATM customer premises network (CPN). In this paper, we first consider the possible migration scenario of Broadband CPN and some important requirements for the realization of the scenario. Then, we discuss the key issues to be solved for future ATM-CPN, which include network topology, traffic control and connectionless communication services.

This letter describes a new input and cross-point buffering matrix switching architecture for high-speed ATM switching systems. The proposed switch has input queuing buffers at each input port, and small size buffers for output port arbitration at each cross-point. These two types of buffers share loads using a simple and high-speed retry algorithm. Hardware size is only half that of conventional cross-point buffering switches. In addition, the switch achieves high-throughput at a condition that the switching speed matches the input and output port speed. This switch is expected to enable the development of high-speed ATM switching systems with each port supporting speeds in excess of 1Gbit/s.

This letter proposes a new UPC (Usage Parameter Control) method suitable for monitoring/controlling the ATM cell streams of VCs (Virtual Channels) and VPs (Virtual Paths) specified with a wide-range of traffic parameter values. The method, named the 2-phase T-X method, combines two credit window type monitoring circuits that are shifted in phase by T/2. The proposed method achieves the best of both the DB and T-X methods. Its cell mis-policing rate is very low (equivalent to that of the DB-method) while its minimal hardware requirements are equal to those of the T-X method. The proposed method ensures more effective network resource (link) utilization. As a result, the proposed method is shown to be a credible UPC technique for handling broadband VBR (Variable Bit Rate) traffic in ATM based multimedia networks.

This paper describes the architecture and the performances of a GaAs 88 self-routing switch LSI for ATM switching system. The communication system such as broadband integrated sevices digital network (B-ISDN) requires the hardware switch LSI which exchanges packet cells at a date rate up to several Gb/s. GaAs LSIs are suitable for such application because of its high speed operation and low power dissipation. To clarify the feasibility of GaAs LSI, an 88 self-routing switch LSI is fabricated using 0.5 µm gate GaAs MESFETs and its oerformances are examined. This LSI consists of a switching network for exchanging the packet cells and the "NEMAWASHI" network which detects the cell destined to the same output port. The basic network architecture is a self-routing switch using Batcher-Banyan network. This network consists of basic 22 switch element. Since each element switches the route accorging to the destination of the input cells, self-routing operation is performed without the external circuit for routing control. The LSI is fabricated using 0.5 µm gate GaAs MESFETs. 7003 logic gate are integrated on the chip of 8.2 mm7.4 mm. To reduce the impedance of ground line on the chip and to obtain the enough noise margin, the third level interconnection with low sheet resistance is implemented. As the results of functional evalution, the full function of switching network and "NEMAWASHI" network are verified. Maximum operation speed of 1 GHz is obtained.

The effectiveness of traffic shaping for VBR traffic is analyzed. Evaluation results prove that traffic shaping can improve link efficiency for most forms of bursty VBR traffic and that link efficiency gains of more than 250% can be expected without the shaping delay imposing any significant QOS deterioration. Traffic shaping increases the link efficiency to about 80% for traffic with short burst repetition periods. The traffic shaping techniques and analytical results described herein can be employed in the traffic management of future B-ISDN/ATM networks.

Fiber-optic subscriber loops are beginning to be constructed worldwide as an infrastructure for the 21st century. Making the most of the superior transmission capabilities of optical fiber cable, high-speed and broadband services such as so-called Broadband-ISDN (B-ISDN) services are expected to be achieved. We review current trends in fiber-optic systems and discuss how fiber-optic subscriber loops should be implemented from the points of view of services and technology. First, prospective services offered over fiber-optic subscriber loops and resulting requirements for such loops are presented. Various kinds of services produced through fiber-optic subscriber loops will further develop the information-oriented society and have a major influence not only on the industrial world but on family life as well. Next, basic concepts of totally fiber-optic subscriber loops and proposals for shifting from the existing metallic cable network to totally fiber-optic subscriber loops are discussed. In this regard, we must consider the advantages of optical fiber cables and improve upon the disadvantages of the existing metallic cable network. In particular, a Digital Loop Carrier (DLC) system or a Passive Double Star (PDS) have been proposed to shift from the existing metallic cable network to totally fiber-optic subscriber loops effectively and economically. Finally, line configuration topology and latest fiber-optic technologies such as high-count cable, construction techniques and operation systems for use in achieving totally fiber optic subscriber loops are shown. We believe a single star configuration is the most appropriate for totally fiber-optic subscriber loops.

This paper proposes a next-generation narrow-band ISDN (N-ISDN), including a suitable network and network node architecture. The proposed N-ISDN allows every subscriber to use H0/HI-class calls as easily as present telephone calls, and could rapidly expand ISDN services to all the subscribers of a public network. The present status of ISDN is first analyzed then the need for popularization of H0/HI-call services is discussed. The proposed key technologies to popularize HO/HI services are (1) on-chip integration of ISDN switching systems, (2) distribution of small on-chip switching systems over the subscriber switching area, (3) H0-based trunk circuit networks using H0 on-chip switching systems and (4) efficient and flexible call management for 64-kb/s basic-class calls. An estimation of hardware volume of switching nodes is used to show that the proposed architecture is more economical than other possible alternatives, i.e. conventional ISDN and B-ISDN.

Network planning for a public switched telephone network is essentially the same as the company's business strategy. The social environment providing the market for communications services is undergoing rapid change in Japan as it evolves from an era of one basic mainstay service-namely, plain-old telephone service-to one in which a wide range of advanced new services are, or soon will be, available and there is fierce competition to provide those services. This paper covers some of the thinking behind NTT's strategy to put in place a flexible and effectual network that fully reflects the needs and desires of customers in this fast-changing environment.

In this paper, restricted overflow strategy is proposed as a novel channel access strategy for the queueable hierarchical channel structure, which has been proposed as one of "Wideband-ISDN" channel structures. In this policy, overflow from higher bit rate channels to lower bit rate channels is partly restricted by the number of waiting customers in the higher channel's buffer. Therefore, thresholds, which restrict overflow, are considered on the buffer. First, we present the system model with two types of services and restricted overflow strategy. Next, we provide a queueing analysis of this strategy. After that, some numerical results of both conventional overflow strategy and restricted overflow strategy are presented, and we compare the average holding times under these strategies. Finally, we show that, if we choose appropriate thresholds, the average holding time of higher level traffic is improved.

This paper describes the application of a neural network to the optimal routing problem in broadband multimedia networks, where the objective is to maximize network utilization while considering the performance required for each call. In a multimedia environment, the performance required for each call is different, and an optimal path must be found whenever a call arrives. A neural network is appropriate for the computation of an optimal path, as it provides real-time solutions to difficult optimization problems. We formulated optimal routing based on the Hop field neural network model, and evaluated the basic behavior of neural networks. This evaluation confirmed the validity of the neural network formulation, which has a small computation time even if there are many nodes. This characteristic is especially suitable for a large-scale system. In addition, we performed a computer simulation of the proposed routing scheme and compared it with conventional alternate routing schemes. The results show the benefit of neural networks for the routing problem, as our scheme always balances the network load and attains high network utilization.

This paper provides an analytical method to evaluate the cell loss probability in ATM (Asyncronous Transfer Mode) networks employing statistical cell multiplexing. A fairly simple design procedure for path/link capacity is also developed. It is demonstrated that the proposed method yields a conservative capacity value over the entire range examined. This was confirmed by comparing the results obtained through the proposed method with computer simulation results. The method yields a link capacity design approach that can effectively handle different bandwidth and types of VPs within the same link. Evaluations show that the method allows 10% to 1400% more traffic than possible with the peak bandwidth allocation scheme in the parameter range we examined; the specified cell loss probability is set at 10-9. As a result, it is shown that the proposed analytical procedure to evaluate the cell loss probability in statistical cell multiplexing, and the path/link capacity design method are effective and practical even though they use fairly simple procedures.