The ring Fp + uFp + + uk-1Fp may be of interest in coding theory, which have already been used in the construction of optimal frequency-hopping sequence. In this work, cyclic codes over Fp + uFp + + uk-1Fp which is an open problem posed in [1] are considered. Namely, the structure of cyclic code over Fp + uFp + + uk-1Fp and that of their duals are derived.

This paper focuses on the characteristics of tunable half-wavelength resonators and their applications to bandpass filters (BPFs). First, the resonance characteristics of various tunable half-wavelength resonators are examined for the tunabilities of transmission zeros and the center frequency of the proposed BPFs. We examine four types of tunable half-wavelength resonators, namely, an end-coupling resonator and three types of tap-coupling resonators. Secondly, the proposition and design of two types of BPFs using acquired resonators are carried out. The fabrication and experimental application of the resonators and designed BPFs are also performed based on coplanar waveguide (CPW) technologies. Their calculated and measured results are compared with each other. The results show that tunabilities of the transmission zero and the center frequency of the proposed BPF are obtained as expected.

Cryptosystems for smartcard are required to provide protection from Differential Power Analysis (DPA) attack. Self-timed circuit based cryptosystems demonstrate considerable resistance against DPA attack, but they take substantial circuit area. A novel approach offering up to 30% area reduction and maintaining DPA protection level close to DIMS scheme is proposed.

Available Bit Rate (ABR) flow control is an effective measure in ATM network congestion control. In large scale and high-speed network, the simplicity of algorithm is crucial to optimize the switch performance. Although the binary flow control is very simple, the queue length and allowed cell rate (ACR) controlled by the standard EFCI algorithm oscillate with great amplitude, which has negative impact on the performance, so its applicability was doubted, and then the explicit rate feedback mechanism was introduced and explored. In this study, the model of binary flow control is built based on the fluid flow theory, and its correctness is validated by simulation experiments. The linear model describing the source end system how to regulate the cell rate is obtained through local linearization method. Then, we evaluate and analyze the standard EFCI algorithm using the describing function approach, which is well-developed in nonlinear control theory. The conclusion is that queue and ACR oscillations are caused by the inappropriate nonlinear control rule originated from intuition, but not intrinsic attribute of the binary flow control mechanism. The simulation experiments validate our analysis and conclusion. Finally, the new scheme about parameter settings is put forward to remedy the weakness existed in the standard EFCI switches without any change on the hardware architecture. The numerical results demonstrate that the new scheme is effective and fruitful.

Digital halftoning is used to quantize a grayscale image to a binary image. Error diffusion halftoning generates a high-quality binary image, but also generates some defects such as the warm effect, sharpening, and so forth. To reduce these defects, Kite proposed a modified threshold modulation method that utilizes a multiplicative parameter for controlling sharpening. Nevertheless, some degradation was observed near the edges of objects with a large luminance change. In this paper, we propose a method of controlling the multiplicative parameter in proportion to the magnitude of the local edge slope. The results of computer simulation show a greater reduction of sharpening in the halftone image. In particular, there is a great improvement in the quality of the edges of objects with a large luminance change.

This paper presents a novel self-excited ZVS half-bridge converter. This converter including a self-oscillating control circuit is very simply constructed. The converter achieves excellent efficiency, low voltage stress across the switches and low EMI noise by using zero-voltage-switching technique. This converter stores not only magnetic energy in the primary winding of the transformer but also electrostatic energy on the resonant capacitor during the on-periods, so that the converter realizes the miniaturization of the transformer, the reduced conduction losses and the low current stress in the switch. This paper analyzes the behavior of static characteristics by using an extending state-space-averaging method and presents design equations. Based on the analysis, two prototype converters are designed for a 120 W output and a 350 W output. Experimental results are given for two converters and they confirm the validity of the theory. The proposed converters have displayed excellent performance.

This paper introduces the problem of n mobile agents that repeatedly visit all n nodes of a given network, subject to the constraint that no two agents can simultaneously occupy a node. This paper first presents a self-stabilizing phase-based protocol for a tree network on a synchronous model. The protocol realizes agent traversal with O(Δn) time where n is the number of nodes and Δ is the maximum degree of any vertex in the communication network. The phase-based protocol can also be applied to an asynchronous model and a ring network. This paper also presents a self-stabilizing link-alternator-based protocol with agent traversal time of O(Δn) for a tree network on an asynchronous model. The protocols are proved to be asymptotically optimal with respect to the agent traversal time.

In recent years the size of transformer in a DC-DC converter becomes smaller and thinner for power module type application. It results in the increase of the leakage inductances because the number of turns of the secondary winding becomes smaller. This paper presents the analysis of static and dynamic characteristics of the novel flyback converter proposed before, and clarifies that the transformer's leakage inductances deteriorate the static load regulation, but improve the dynamic stability by increasing the dumping factor.

This letter presents a practical approach for high-quality built-in test using a test pattern generator called neighborhood pattern generator (NPG). NPG is practical mainly because its structure is independent of circuit under test and it can realize high fault coverage not only for stuck-at faults but also for transition faults. Some techniques are also proposed for further improvement in practical applicability of NPG. Experimental results for large industrial circuits illustrate the efficiency of the proposed approach.

A fully integrated current-steering 10-b CMOS Digital-to-Analog Converter with on-chip terminated resistors is presented. In order to improve the device-mismatching problem of internal termination resistors, a self-calibrated current bias circuit is designed. With the self-calibrated current bias circuit, the gain error of the output voltage swing is reduced within 0.5%. For the purpose of reducing glitch noises, furthermore, a novel current switch based on a deglitching circuit is proposed. The prototype circuit has been fabricated with a 3 V 0.35 µm 2-poly 3-metal CMOS technology, and it occupies 1350 µm750 µm silicon area with 45 mW power consumption. The measured INL and DNL are within 0.5LSB, respectively. The measured SFDR is about 65 dB, when an input signal is about 8 MHz at 100 MHz clock frequency.

This paper describes a new fast learning algorithm for Self-Organizing Map employing a "rough comparison winner-take-all" and its digital hardware architecture. In rough comparison winner-take-all algorithm, the winner unit is roughly and strictly assigned in early and later learning stage, respectively. It realizes both of high accuracy and fast learning. The digital hardware of the self-organizing map with proposed WTA algorithm is implemented using FPGA. Experimental results show that the designed hardware is superior to other hardware with respect to calculation speed.

Feedforward neural networks have been successfully developed and applied in many areas because of their universal approximation capability. However, there still remains the problem of determining a suitable network structure for the given task. In this paper, we propose a novel self-organizing neural network which automatically adjusts its structure according to the task. Utilizing both the constructive and the pruning procedures, the proposed algorithm finds a near-optimal network which is compact and shows good generalization performance. One of its important features is reliability, which means the randomness of neural networks is effectively reduced. The resultant networks can have suitable numbers of hidden neurons and hidden layers according to the complexity of the given task. The simulation results for the well-known function regression problems show that our method successfully organizes near-optimal networks.

In this paper we propose an inter-block evaluation method to further reduce evaluation numbers in GA-based image halftoning technique. We design the algorithm to avoid noise in the fitness function by evolving all image blocks concurrently, exploiting the inter-block correlation, and sharing information between neighbor image blocks. The effectiveness of the method when the population and image block size are reduced, and the configuration of selection and genetic operators are investigated in detail. Simulation results show that the proposed method can remarkably reduce the entire evaluation numbers to generate high quality bi-level halftone images by suppressing noise around block boundaries.

This paper presents a simple learning algorithm for network formation. The algorithm is based on self-organizing maps with growing cell structures and can adapt input data which correspond to nodes of the network. In basic numerical experiments, as a parameter is selected suitably, our algorithm can generate network having small-world-like structure. Such network structure appears in some natural networks and has advantages in practical systems.

We present a built-in self-reconfiguring system for a mesh-connected processor array where faulty processor elements are compensated for by spare processing elements located in one row and one column. It has advantages in that the number of spare processing elements is small and additional control circuits and networks for changing interconnections of processing elements is so simple that hardware overhead for reconfiguration is also small. First, to indicate the motivation to the proposed reconfiguration scheme, we briefly describe other schemes with the same number of spares as that of the proposed scheme where faulty processing elements are replaced using straight shifts toward spares, and compare their reconfiguration probabilities to each other. Then, we show that a variant of the proposed scheme has the highest probability. Next, we present a built-in self-reconfiguring system for the scheme and formally prove that it works correctly. It can automatically replace faulty processors by spare processors on detecting faults of processors.

Although production systems are widely used in artificial intelligence (AI) applications, they are seen to have certain disadvantages in terms of their need for special purpose assistance software to build and execute their knowledge-bases (KB), and in the fact that they will not run on any operating system (platform dependency). Furthermore, for AI applications such as learning assistance systems, there is a strong requirement for a self-adaptive function enabling a flexible change in the service contents provided, according to the user. Against such a background, a Java based production system (JPS) featuring no requirement for special purpose assistance software and no platform dependency, is proposed. Furthermore, a new self-adaptive Java production system (A-JPS) is proposed to realize the "user adaptation" requirement mentioned above. Its key characteristic is the combination of JPS with a Causal-network (CN) for obtaining a "user profile". In addition, the execution time of the JPS was studied using several benchmark problems with the aim of comparing the effectiveness of different matching algorithms in their recognize-act cycles as well as comparing their performance to that of traditional procedural programs for different problem types. Moreover, the effectiveness of the user adaptation function of the A-JPS was studied for the case of a CN with a general DAG structure, using the experimental KB of a learning assistance system.

Integrated implementation of RF front-end components has been shown to posses many benefits. Furthermore, it presents a new way of approaching RF design. This paper will discuss the recent developments by the author's group in the field of RF front-end technology. This will include stand-alone RF front-end components such as a self-heterodyne mixer as well as more functional front-end circuitry such as digital beamformer arrays, retrodirective arrays and an array error calibration scheme.

We study the statistical multiplexing performance of self-similar traffic. We consider that input streams have different QoS (Quality of Service) requirements such as loss and delay jitter. By applying the FBM (fractal Brownian motion) model, we present methods of estimating the effective bandwidth of aggregated traffic. We performed simulations to evaluate the QoS performances and the bandwidths required to satisfy them. The comparison between the estimation and the simulation confirms that the estimation could give rough data of the effective bandwidth. Finally, we analyze the bandwidth gain with priority multiplexing against non-prioritized multiplexing and suggest how to get better performance with the right configuration of QoS parameters.

This work explores generative models of handwritten digit images using natural elastic nets. The analysis aims to extract global features as well as distributed local features of handwritten digits. These features are expected to form a basis that is significant for discriminant analysis of handwritten digits and related analysis of character images or natural images.

A directional audible sound can be generated by amplitude-modulated (AM) into ultrasound wave from a parametric array. To synthesize audio signals produced by the self-demodulation effect of the AM sound wave, a quasi-linear analytical solution, which describes the nonlinear wave propagation, is developed for fast numerical evaluation. The radiated sound field is expressed as the superposition of Gaussian Beams. Numerical results are presented for a rectangular parametric loudspeaker, which are in good agreement with the experimental data published previously.