This paper proposes a multibeam digital predistorter (DPD) that suppresses intercarrier interference caused by nonlinear distortions of power amplifiers (PAs) while reducing the power consumption of a multibeam array antenna transmitter. The proposed DPD reduces power consumption by allowing the final PAs of the array antenna transmitter to operate in a highly efficient nonlinear mode and compensating for the nonlinear distortions of the PAs with a unified dedicated DPD per subarray. Additionally, it provides the required high-quality signal transmission for high throughputs, such as realizing a 256-quadrature amplitude modulation (QAM) transmission instead of a 64-QAM transmission. Specifically, it adds an inverse-component signal to cancel the interference from an adjacent carrier of another beam. Consequently, it can suppress the intercarrier interference in the beam direction and improve the error vector magnitude (EVM) during the multibeam transmission, in which the frequency bands of the beams are adjacent. The experimental results obtained for two beams at 28.0 and 28.4GHz demonstrate that, compared with the previous single-beam DPD, the proposed multibeam DPD can improve the EVM. Also, they demonstrate that the proposed DPD can achieve an EVM value of <3%, which completely satisfies the 3GPP requirements for a 256-QAM transmission.

Message franking is introduced by Facebook in end-to-end encrypted messaging services. It allows to produce verifiable reports of malicious messages by including cryptographic proofs, called reporting tags, generated by Facebook. Recently, Grubbs et al. (CRYPTO'17) proceeded with the formal study of message franking and introduced committing authenticated encryption with associated data (CAEAD) as a core primitive for obtaining message franking. In this work, we aim to enhance the security of message franking and introduce forward security and updates of reporting tags for message franking. Forward security guarantees the security associated with the past keys even if the current keys are exposed and updates of reporting tags allow for reporting malicious messages after keys are updated. To this end, we firstly propose the notion of key-evolving message franking with updatable reporting tags including additional key and reporting tag update algorithms. Then, we formalize five security requirements: confidentiality, ciphertext integrity, unforgeability, receiver binding, and sender binding. Finally, we show a construction of forward secure message franking with updatable reporting tags based on CAEAD, forward secure pseudorandom generator, and updatable message authentication code.

The design and adjustment of the divergence in audio applications using nonnegative matrix factorization (NMF) is still open problem. In this study, to deal with this problem, we explore a representation of the divergence using neural networks (NNs). Instead of the divergence, our approach extends the multiplicative update algorithm (MUA), which estimates the NMF parameters, using NNs. The design of the extended MUA incorporates NNs, and the new algorithm is referred to as the deep MUA (DeMUA) for NMF. While the DeMUA represents the algorithm for the NMF, interestingly, the divergence is obtained from the incorporated NN. In addition, we propose theoretical guides to design the incorporated NN such that it can be interpreted as a divergence. By appropriately designing the NN, MUAs based on existing divergences with a single hyper-parameter can be represented by the DeMUA. To train the DeMUA, we applied it to audio denoising and supervised signal separation. Our experimental results show that the proposed architecture can learn the MUA and the divergences in sparse denoising and speech separation tasks and that the MUA based on generalized divergences with multiple parameters shows favorable performances on these tasks.

Visual object tracking is always a challenging task in computer vision. During the tracking, the shape and appearance of the target may change greatly, and because of the lack of sufficient training samples, most of the online learning tracking algorithms will have performance bottlenecks. In this paper, an improved real-time algorithm based on deep learning features is proposed, which combines multi-feature fusion, multi-scale estimation, adaptive updating of target model and re-detection after target loss. The effectiveness and advantages of the proposed algorithm are proved by a large number of comparative experiments with other excellent algorithms on large benchmark datasets.

We propose a short signature scheme under the ring-SIS assumption in the standard model. Specifically, by revisiting an existing construction [Ducas and Micciancio, CRYPTO 2014], we demonstrate lattice-based signatures with improved reduction loss. As far as we know, there are no ways to use multiple tags in the signature simulation of security proof in the lattice tag-based signatures. We address the tag-collision possibility in the lattice setting, which improves reduction loss. Our scheme generates tags from messages by constructing a scheme under a mild security condition that is existentially unforgeable against random message attack with auxiliary information. Thus our scheme can reduce the signature size since it does not need to send tags with the signatures. Our scheme has short signature sizes of O(1) and achieves tighter reduction loss than that of Ducas et al.'s scheme. Our proposed scheme has two variants. Our scheme with one property has tighter reduction and the same verification key size of O(log n) as that of Ducas et al.'s scheme, where n is the security parameter. Our scheme with the other property achieves much tighter reduction loss of O(Q/n) and verification key size of O(n), where Q is the number of signing queries.

Sparse code division multiple access (SCMA) is a non-orthogonal multiple access (NOMA) technology that can improve frequency band utilization and allow many users to share quite a few resource elements (REs). This paper uses the modulation of lattice theory to develop a systematic construction procedure for the design of SCMA codebooks under Gaussian channel environments that can achieve near-optimal designs, especially for cases that consider large-scale SCMA parameters. However, under the condition of large-scale SCMA parameters, the mother constellation (MC) points will overlap, which can be solved by the method of the partial dimensions transformation (PDT). More importantly, we consider the upper bounded error probability of the signal transmission in the AWGN channels, and design a codeword allocation method to reduce the inter symbol interference (ISI) on the same RE. Simulation results show that under different codebook sizes and different overload rates, using two different message passing algorithms (MPA) to verify, the codebook proposed in this paper has a bit error rate (BER) significantly better than the reference codebooks, moreover the convergence time does not exceed that of the reference codebooks.

Recently, the performances of discriminative correlation filter (CF) trackers are getting better and better in visual tracking. In this paper, we propose spatial-temporal regularization with precise state estimation based on discriminative correlation filter (STPSE) in order to achieve more significant tracking performance. First, we consider the continuous change of the object state, using the information from the previous two filters for training the correlation filter model. Here, we train the correlation filter model with the hand-crafted features. Second, we introduce update control in which average peak-to-correlation energy (APCE) and the distance between the object locations obtained by HOG features and hand-crafted features are utilized to detect abnormality of the state around the object. APCE and the distance indicate the reliability of the filter response, thus if abnormality is detected, the proposed method does not update the scale and the object location estimated by the filter response. In the experiment, our tracker (STPSE) achieves significant and real-time performance with only CPU for the challenging benchmark sequence (OTB2013, OTB2015, and TC128).

This paper proposes a fast and scalable traffic monitoring system called Fast xFlow Proxy. For efficiently provisioning and operating networks, xFlow such as IPFIX and NetFlow is a promising technology for visualizing the detailed traffic matrix in a network. However, internet protocol (IP) packets in a large carrier network are encapsulated with various outer headers, e.g., layer 2 tunneling protocol (L2TP) or multi-protocol label switching (MPLS) labels. As native xFlow technologies are applied to the outer header, the desired inner information cannot be visualized. From this motivation, we propose Fast xFlow Proxy, which explores the complicated carrier's packet, extracts inner information properly, and relays the inner information to a general flow collector. Fast xFlow Proxy should be able to handle various packet processing operations possible (e.g., header analysis, header elimination, and statistics) at a wire rate. To realize the processing speed needed, we implement Fast xFlow Proxy using the data plane development kit (DPDK) and field-programmable gate array (FPGA). By optimizing deployment of processes between DPDK and FPGA, Fast xFlow Proxy achieves wire rate processing. From evaluations, we can achieve over 20 Gbps performance by using a single server and 100 Gbps performance by using scale-out architecture. We also show that this performance is sufficiently practical for monitoring a nationwide carrier network.

This paper proposes an analytical method to design septum-type polarizers by assuming a polarizer as a series of four septum elements with a short ridge-waveguide approximation. We determine parameters of respective elements in such a manner that, at the center frequency, the reflection coefficient of the first element is equal to that of the second one, the reflection of the third one equals to that of the forth, and the electrical lengths of the first, second and third elements are 90 deg. We name this method the Short Ridge-waveguide Approximation Method (SRAM). We fabricated an X-band polarizer, which achieves a cross polarization discrimination (XPD) value of 40.7-64.1 dB over 8.0-8.4 GHz, without any numerical optimization.

Differential Evolution (DE) algorithm is simple and effective. Since DE has been proposed, it has been widely used to solve various complex optimization problems. To further exploit the advantages of DE, we propose a new variant of DE, termed as ranking-based differential evolution (RDE), by performing ranking on the population. Progressively better individuals in the population are used for mutation operation, thus improving the algorithm's exploitation and exploration capability. Experimental results on a number of benchmark optimization functions show that RDE significantly outperforms the original DE and performs competitively in comparison with other two state-of-the-art DE variants.

Non-linear behavioral models play a key role in designing digital pre-distorters (DPDs) for non-linear power amplifiers (NLPAs). In general, more complex behavioral models have better capability, but they should be converted into simpler versions to assist implementation. In this paper, a conversion from a complex fifth order inverse of a parallel Wiener (PRW) model to a simpler memory polynomial (MP) model is developed by using frequency domain expressions. In the developed conversion, parameters of the converted MP model are calculated from those of original fifth order inverse and frequency domain statistics of the transmit signal. Since the frequency domain statistics of the transmit signal can be precalculated, the developed conversion is deterministic, unlike the conventional conversion that identifies a converted model from lengthy input and output data. Computer simulations are conducted to confirm that conversion error is sufficiently small and the converted MP model offers equivalent pre-distortion to the original fifth order inverse.

This paper reports the evaluation and simulated results of the nonlinear characteristics of the 4.65GHz Active Antenna System (AAS) for 5G mobile communication systems. The antenna element is composed of ±45° dual polarization shared patch antenna, and is equipped with total 64 elements with horizontal 8 × vertical 4 × 2 polarization configuration. A 32-element transceiver circuit was mounted on the back side of the antenna printed circuit board. With the above circuit configuration, a full digital beamforming method has been adopted that can realize high frequency utilization efficiency by using the Sub6GHz-band massive element AAS, and excellent spatial multiplexing performance by Massive MIMO has been pursued. However, it was found that the Downlink (DL) SINR (Signal to Interference and Noise Ratio) to each terminal deteriorated because of the nonlinear distorted radiation as the transmission output power was increased in the maximum rated direction. Therefore, it has been confirmed that the spatial multiplexing performance in the high output power region is significantly improved by installing DPD. In order to clarify the affection of nonlinear distorted radiation on spatial multiplexing performance, the radiation patterns were measured using OFDM signal (subcarrier spacing 60kHz × 1500 subcarriers in 90MHz bandwidth) in an anechoic chamber. And by the simulated analysis for the affection of nonlinear distortion on null characteristic, the accuracy of nulls generated in each user terminal direction does not depend on the degree of nonlinearity, but is affected by the residual amplitude and phase variation among all transmitters and receivers after calibration (CAL). Therefore, it was clarified that the double compensation configuration of DPD and high-precision CAL is effective for achieving excellent Massive MIMO performance. This paper is based on the IEICE Japanese Transactions on Communications (Vol.J102-B, No.11, pp.816-824, Nov. 2019).

In recent years FPGA has become popular in CNN acceleration, and many CNN-to-FPGA toolchains are proposed to fast deploy CNN on FPGA. However, for these toolchains, updating CNN network means regeneration of RTL code and re-implementation which is time-consuming and may suffer timing-closure problems. So, we propose HBDCA: a toolchain and corresponding accelerator. The CNN on HBDCA is defined by the content of BRAM. The toolchain integrates UpdateMEM utility of Xilinx, which updates content of BRAM without re-synthesis and re-implementation process. The toolchain also integrates TensorFlow Lite which provides high-accuracy quantization. HBDCA supports 8-bits per-channel quantization of weights and 8-bits per-layer quantization of activations. Upgrading CNN on accelerator means the kernel size of CNN may change. Flexible structure of HBDCA supports kernel-level parallelism with three different sizes (3×3, 5×5, 7×7). HBDCA implements four types of parallelism in convolution layer and two types of parallelism in fully-connected layer. In order to reduce access number to memory, both spatial and temporal data-reuse techniques were applied on convolution layer and fully-connect layer. Especially, temporal reuse is adopted at both row and column level of an Input Feature Map of convolution layer. Data can be just read once from BRAM and reused for the following clock. Experiments show by updating BRAM content with single UpdateMEM command, three CNNs with different kernel size (3×3, 5×5, 7×7) are implemented on HBDCA. Compared with traditional design flow, UpdateMEM reduces development time by 7.6X-9.1X for different synthesis or implementation strategy. For similar CNN which is created by toolchain, HBDCA has smaller latency (9.97µs-50.73µs), and eliminates re-implementation when update CNN. For similar CNN which is created by dedicated design, HBDCA also has the smallest latency 9.97µs, the highest accuracy 99.14% and the lowest power 1.391W. For different CNN which is created by similar toolchain which eliminate re-implementation process, HBDCA achieves higher speedup 120.28X.

One of the highest performing single-photon detectors in the visible and near-infrared regions is the superconducting nanostrip photon detector (SNSPD or SSPD), which usually uses NbN or NbTiN as the superconductor. Using other superconductors may significantly improve, for example, the operating temperature and count rate characteristics. This paper briefly reviews the current state of the potential, characteristics, thin film growth, and nanofabrication process of SNSPD using various superconductors.

There are enlarged requirements of millimeter-wave beamforming phased-array transceivers and high-order modulation multi-input multi-output (MIMO) transceivers. High-performance integrated RF switches are regarded as one of the most critical components for those transceivers to support signal channel distribution and path redundancy. This paper introduces a CMOS high-isolation and low-loss RF switch with a novel switched parallel LC resonance network. The proposed single-pole double-throw (SPDT) RF switch realizes 68dB port isolation and 1.0dB insertion loss with an active area of 0.034mm2. The SPDT RF switch is composed of two series-shunt transistor pairs with body-floating technology and a switched parallel LC network. The network uses a turned-off series transistor to resonate out off-capacitance Coff. The measured output third-order intercept (OIP3) is higher than 21dBm. The proposed SPDT RF switch maintains return losses of all working ports less than 10dB from 8GHz to 20GHz. The high-performance SPDT RF switch is fabricated in standard 65-nm CMOS technology.

IoT devices operate with a battery and have embedded firmware in flash memory. If the embedded firmware is not kept up to date, there is a possibility of problems that cannot be linked with other IoT networks, so it is necessary to maintain the latest firmware with frequent updates. However, because firmware updates require developers and equipment, they consume manpower and time. Additionally, because the device must be active during the update, a low-power operation is not possible due to frequent flash memory access. In addition, if an unexpected interruption occurs during an update, the device is unavailable and requires a reliable update. Therefore, this paper aims to improve the reliability of updates and low-power operation by proposing a technique of performing firmware updates at high speed. In this paper, we propose a technique to update only a part of the firmware stored in nonvolatile flash memory without pre-processing to generate delta files. The firmware is divided into function blocks, and their addresses are collectively managed in a separate area called a function map. When updating the firmware, only the new function block to be updated is transmitted from the host downloader, and the bootloader proceeds with the update using the function block stored in the flash memory. Instead of transmitting the entire new firmware and writing it in the memory, using only function block reduces the amount of resources required for updating. Function-blocks can be called indirectly through a function map, so that the update can be completed by modifying only the function map regardless of the physical location. Our evaluation results show that the proposed technique effectively reduces the time cost, energy consumption, and additional memory usage overhead that can occur when updating firmware.

In 2019, a completely new algorithm, spherical evolution (SE), was proposed. The brand new search style in SE has been proved to have a strong search capability. In order to take advantage of SE, we propose a novel method called the ladder descent (LD) method to improve the SE' population update strategy and thereafter propose a ladder spherical evolution search (LSE) algorithm. With the number of iterations increasing, the range of parent individuals eligible to produce offspring gradually changes from the entire population to the current optimal individual, thereby enhancing the convergence ability of the algorithm. Experiment results on IEEE CEC2017 benchmark functions indicate the effectiveness of LSE.

This paper reports our new communication components and downlink tests for realizing 2.65Gbps by utilizing two circular polarizations. We have developed an on-board X-band transmitter, an on-board dual circularly polarized-wave antenna, and a ground station. In the on-board transmitter, we optimized the bias conditions of GaN High Power Amplifier (HPA) to linearize AM-AM performance. We have also designed and fabricated a dual circularly polarized-wave antenna for low-crosstalk polarization multiplexing. The antenna is composed of a corrugated horn antenna and a septum-type polarizer. The antenna achieves Cross Polarization Discrimination (XPD) of 37-43dB in the target X-band. We also modify an existing 10m ground station antenna by replacing its primary radiator and adding a polarizer. We put the polarizer and Low Noise Amplifiers (LNAs) in a cryogenic chamber to reduce thermal noise. Total system noise temperature of the antenna is 58K (maximum) for 18K physical temperature when the angle of elevation is 90° on a fine winter day. The dual circularly polarized-wave ground station antenna has 39.0dB/K of Gain - system-noise Temperature ratio (G/T) and an XPD higher than 37dB. The downlinked signals are stored in a data recorder at the antenna site. Afterwards, we decoded the signals by using our non-real-time software demodulator. Our system has high frequency efficiency with a roll-off factor α=0.05 and polarization multiplexing of 64APSK. The communication bits per hertz corresponds to 8.41bit/Hz (2.65Gbit/315MHz). The system is demonstrated in orbit on board the RAPid Innovative payload demonstration Satellite (RAPIS-1). RAPIS-1 was launched from Uchinoura Space Center on January 19th, 2019. We decoded 1010 bits of downlinked R- and L-channel signals and found that the downlinked binary data was error free. Consequently, we have achieved 2.65Gbps communication speed in the X-band for earth observation satellites at 300 Mega symbols per second (Msps) and polarization multiplexing of 64APSK (coding rate: 4/5) for right- and left-hand circular polarizations.

Aggregate signature (AS) schemes enable anyone to compress signatures under different keys into one. In sequential aggregate signature (SAS) schemes, the aggregate signature is computed incrementally by the sighers. Several trapdoor-permutation-based SAS have been proposed. In this paper, we give a constructions of SAS based on the first SAS scheme with lazy verification proposed by Brogle et al. in ASIACRYPT 2012. In Brogle et al.'s scheme, the size of the aggregate signature is linear of the number of the signers. In our scheme, the aggregate signature has constant length which satisfies the original ideal of compressing the size of signatures.

In this paper, the effects of the TiN encapsulating layer and the dopant segregation process on the interface properties and the Schottky barrier height reduction of PdEr-silicide/n-Si(100) were investigated. The results show that controlling the initial location of the boron dopants by adding the TiN encapsulating layer lowered the Schottky barrier height (SBH) for hole to 0.20 eV. Furthermore, the density of interface states (Dit) on the order of 1011eV-1cm-2 was obtained indicating that the dopant segregation process with TiN encapsulating layer effectively annihilated the interface states.