We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions (4JL gates), and then investigated the voltage and current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.

This paper proposes a scheme for synchronization of stored video and audio streams in PHS. A video stream of H. 263 is transmitted over a PHS channel with ARQ control, while an audio stream of 32 kbit/s ADPCM is sent on another channel without any control. In order to preserve the temporal constraints within the video stream as well as the relationship between the video and audio streams, we adopt a new control scheme which modifies the target output time according to the amount of video data in the receive-buffer. Through simulation we assess the characteristics of this scheme in both random and burst error environments and confirm the effectiveness of the scheme.

Two approaches to the design of resonant-type switches with low distortion characteristics operating at a 2-V power supply voltage have been proposed for use in the 1. 9-GHz-band personal handy phone system (PHS). One approach is to use three stacked FETs at the receiver side. They are composed of a dual-gate FET and a single-gate FET. An insertion loss of 0. 41 dB and an isolation of 44. 0 dB were obtained at 1. 9 GHz. A third-order distortion value of -52 dBc was achieved at 19 dBm output power. Another approach is to insert a capacitor in the resonator. A third-order distortion of -49 dBc at 19-dBm output power when two stacked FETs were used at the receiver side. The layout area of the resonator is drastically reduced as compared with the above-mentioned case.

A GaAs power MESFET amplifier with a low-distortion, 10-dB gain-variable attenuator has been developed for 1. 9-GHz Japanese personal handy phone system (PHS). Independently of its gain, a very low 600-kHz adjacent channel leakage power (ACP) with sufficient output power was attained. In single low 2. 4-V supply operation, an output power of 21. 1 dBm, a low dissipated current of 157 mA and a high power-added efficiency (PAE) of 37. 2% were obtained with an ACP of -55 dBc.

A GaAs power amplifier IC has been developed for 1. 9-GHz digital mobile communication applications, such as the handsets of the Japanese personal handy phone system (PHS), which was assembled into a very small 0. 012-cc surface mount plastic package. This power amplifier using refractory WNx/W self-aligned gate MESFETs with p-pocket layers can operate with high efficiency and low distortion with a single 3-V supply. A very low dissipated current of 119 mA was obtained with an output power of 21. 1 dBm and a low 600-kHz adjacent channel leakage power (ACP) of -63 dBc for π/4-shifted quadrature phase shift keying (QPSK) modulated input.

For a given N-vertex graph H, a graph G obtained from H by adding t vertices and some edges is called a t-FT (t-fault-tolerant) graph for H if even after deleting any t vertices from G, the remaining graph contains H as a subgraph. For the n-dimensional cube Q(n) with N vertices, a t-FT graph with an optimal number O(tN+t2) of added edges and maximum degree of O(N+t), and a t-FT graph with O(tNlog N) added edges and maximum degree of O(tlog N) have been known. In this paper, we introduce some t-FT graphs for Q(n) with an optimal number O(tN+t2) of added edges and small maximum degree. In particular, we show a t-FT graph for Q(n) with 2ctN+ct2((logN)/C)C added edges and maximum degree of O(N/(logC/2N))+4ct.

This paper introduces a new analytic method that uses modified state equations to evaluate the performance of PCSD (Packet Channel Sharing protocol for DCA systems) with the goal of increasing the spectrum efficiency of DCA systems by realizing channel sharing between circuit-switched calls and packets. The results of this analysis show that PCSD is more suitable for microcellular systems than cellular systems, and that PCSD system performance improves as the average holding time of circuit-switched calls increases. Moreover, this paper proposes a novel scheme to determine the optimum release delay time of packet channels in order to achieve high throughput for packets as well as high channel capacity for circuit-switched calls. The proposed scheme shows that the optimum release delay time for PHS (Personal Handy-phone System) is greater than 60 frames and less than 100 frames.

Parallelism on heterogeneous machines brings cost effectiveness, but also raises a new set of complex and challenging problems. This paper addresses the problem of estimating the minimum time taken to execute a program on a fine-grained parallel machine composed of different types of processors. In an earlier publication, we took the first step in this direction by presenting a graph-construction method which partitions a given program into several homogeneous parts and incorporates timing constraints due to heterogeneous parallelism into each part. In this paper, to make the method easier to be applied in a scheduling framework and to demonstrate its practical utility, we present an efficient implementation method and compare the results of its use to the optimal schedule lengths obtained by enumerating all possible solutions. Experimental results for several different machine models indicate that this method can be effectively used to estimate a program's minimum execution time.

This paper presents a practical fault-tolerant architecture for mesh parallel machines that has t spare processors and has 2(t+2) communication links per processor while tolerating at most t+1 processor and link faults. We also show that the architecture presented here can be laid out efficiently in a linear area with wire length at most O(t).

This paper presents a technique to determine prime implicants in multi-level combinational networks. The method is based on a graph representation of Boolean functions called AND/OR reasoning graphs. This representation follows from a search strategy to solve the satisfiability problem that is radically different from conventional search for this purpose (such as exhaustive simulation, backtracking, BDDs). The paper shows how to build AND/OR reasoning graphs for arbitrary combinational circuits and proves basic theoretical properties of the graphs. It will be demonstrated that AND/OR reasoning graphs allow us to naturally extend basic notions of two-level switching circuit theory to multi-level circuits. In particular, the notions of prime implicants and permissible prime implicants are defined for multi-level circuits and it is proved that AND/OR reasoning graphs represent all these implicants. Experimental results are shown for PLA factorization.

Logic operations in principle have been demonstrated based on the planar high-Tc Superconducting QUantum Interference Device (SQUID). Two kinds of logic gates were produced by using the focused ion beam (FIB) superconducting weak links fabricated in NdBa2Cu3O7-δ (NBCO) thin films. Logic gates investigated in this paper are (1) an rf-SQUID based logic gate which utilizes threshold characteristics, and (2) a dc-SQUID based logic gate which is an elementary gate of RSFQ circuits. Elementary logic operation such as (1) AND/OR logic and (2) SET-RESET flip-flop operation were successfully obtained in the logic gates. In addition to the present experimental results, some problems and future prospects are also discussed.

We successfully observed curent-voltage (I-V) curves which showed the behavior of intrinsic Josephson junctions using Tl2Ba2CaCu2Ox (Tl-2212) thin films on MgO substrates by structuring mesas and measuring the electrical transport properties along the c-axis. For a 55 µm2 mesa, a hysteretic I-V curve was observed up to 80 K, which showed that series-connected SIS-type junctions are formed. Compared with the critical current density (Jc) of more than 106 A/cm2 parallel to the ab-plane, an anisotropic Jc of 1.4102 A/cm2 along the c-axis was observed at 4.9 K. By focusing on the I-V curve at lower bias current, the constant voltage jumps measured at the first seven branches were estimated to be 26 mV. The normal resistance (Rnk) of a unit SIS junction was estimated to be 580 Ω by substituting the measured voltage jump in the Ambegaokar and Baratoff relation. Using the calculation for McCumber parameter (βc), the capacitance (Ck) of the unit SIS junction was estimated to be 3.610-10 F/cm2 at 77 K. The IckRnk product was estimated to be 6.4 mV and the cut-off frequency (fc1/2πRnkCk) was calculated to be 3.1 THz at 77 K. The Jc and the hysteresis decreased with an increase in the mesa area, and finally, for a 300300µm2 mesa, a resistively shunted junction (RSI) like curve without hysteresis was observed up to 98 K. A Jc of 5.6101 A/cm2 along the c-axis was observed at 6.4 K. This may be explained by the higher content of conductive grain boundaries for a larger mesa area.

We report the strong microwave Josephson radiation from an array of high-Tc junctions on a MgO bicrystal substrate from centimeter- to millimeter-wave ranges. The dc bias current was fed to the junction array having parallel geometry with the pair of junctions shunted by superconducting loops. The configuration of bias leads was a series of interlocking dc SQUID's geometry which guaranteed the oscillation of all junctions at the same frequency. For a five-junctions array, we observed the coherent output power of about 13 pW at receiving frequency fREC22GHz without an external magnetic flux, which was nearly five times higher than that of a single bicrystal junction. We observed the Josephson linewidth of the selfradiation in coherent state less than 1 GHz by the adjustment of the external flux. The phase differences between adjacent junctions with different IcRn products could be controlled by an external small magnetic field. Submillimeter-wave detector response of the five-junction array was also studied experimentally at frequency f478 GHz.

The demand for data communication over Personal Handy-phone System (PHS) is expected to rapidly increase in the near future. Some applications based on the circuit-switched services have been recently developed. However, the packet-switched service is better than the circuit-switched service for personal data communications in terms of the flexible utilization of radio resources. In this paper, we propose PHS with packet data communications system (PHS-PD), which has four system concepts; (i) to supprot the Internet access, (ii) to realize compatibility with circuit-switching services, (iii) to share the common radio channels with circuit-switched calls, and (iv) to utilize idle time slots for packet data. Moreover, a novel packet channel structure for sharing radio resources with circuit-switched calls is introduced. Although packet data are transferred using common radio resources, the proposed channel structure prevents any degradation in call loss performance of the circuit-switching service. An evaluation of the maximum packet transmission rate shows that PHS-PD can offer a data communication rate of 20.1 kbps even if circuit-switched calls are in progress. Furthermore, up to 83.6 kbps is possible if circuit-switched calls are quiescent. It is also shown that enough capacity for a practical e-mail service can be ensured by PHS-PD even if the degradation of throughput performance due to packet collisions on random access channels is considered.

This paper proposes a unified approach by means of the binary decision diagram, BDD in short, to solve #P-hand problems of counting the number of paths between two terminals in undirected and directed graphs. Our approach provides algorithms running in O (2O (n) ) time for typical planar graphs such as grid graphs. In fact, for any class of graphs having a good elimination ordering, this paradigm provides efficient solutions.

In this paper, we consider the following node-to-set disjoint paths problem: given a node s and a set T = {t1,...,tk} of k nodes in a k-connected graph G, find k node-disjoint paths s ti, 1 i k. We give an O(n2) time algorithm for the node-to-set disjoint paths problem in n-dimensional star graphs Gn which are (n - 1)-connected. The algorithm finds the n - 1 node-disjoint paths of length at most d(Gn) + 1 for n 4,6 and at most d(Gn) + 2 for n = 4,6, where d(Gn) = 3(n-1)/2 is the diameter of Gn. d(Gn) + 1 and d(Gn) + 2 are also the lower bounds on the length of the paths for the above problem in Gn for n 4,6 and n = 4,6, respectively.

This paper describes a new approach to the scheduling problem that assigns tasks of a parallel program described as a task graph onto parallel machines. The approach handles interprocessor communication and heterogeneity, based on using both the theoretical results developed so far and a lookahead scheduling strategy. The experimental results on randomly generated task graphs demonstrate the effectiveness of this scheduling heuristic.

This paper proposes a synthesis method to obtain speed-independent asynchronous circuits directly from signal transition graph (STG) specifications with single cycle signals which can be non-persistent and have free-choice operations. The resulting circuits are implemented with basic gates and asynchronous latches, and operate correctly under finite but unbounded gate delays and the zero wire delay assumptions. The proposed method introduces 5 types of lock relations to implement a non-persistent STG. A non-persistent STG can be implemented if every non-persistent signal to a signal t is super-locked with t. The resulting circuits are optimized by extracting of literals, mapping onto asymmetric C-elements, etc. Experimental results show that the proposed synthesis method outperforms the existing synthesis systems such as SYN and SIS.

Location theory on networks is concerned with the problem of selecting the best location in a specified network for facilities. Many studies for the theory have been done. We have studied location theory from the standpoint of measuring the closeness between two vertices by the capacity (maximum flow value) between two vertices. In a previous paper, we have considered location problems, called covering problems and proposed polynomial time algorithms for these problems. These problems are applicable to assigning files to some computers in a computer network. This paper is concerned with a covering problem called the single cover problem defined in the previous paper. First, we define a generalized single cover problem and show that an algorithm proposed in the previous paper can be applicable to solving the generalized single cover problem. Then, we define a single cover problem satisfying cardinality constrains and show that the problem is solved in a polynomial time.

A graph G is called an n-channel graph at vertex r if there are n independent spanning trees rooted at r. A graph G is called an n-channel graph if G is an n-channel graph at every vertex. Independent spanning trees of a graph play an important role in fault-tolerant broadcasting in the graph. In this paper we show that if G1 is an n1-channel graph and G2 is an n2-channel graph, then G1G2 is an (n1 + n2)-channel graph. We prove this fact by a construction of n1+n2 independent spanning trees of G1G2 from n1 independent spanning trees of G1 and n2 independent spanning trees of G2. As an application we describe a fault-tolerant broadcasting scheme along independent spanning trees.